static void cpu_base_init(void) { int i = 0; NX_RSTCON_Initialize(); NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress())); NX_TIEOFF_Initialize(); NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress())); NX_CLKGEN_Initialize(); for (i = 0; NX_CLKGEN_GetNumberOfModule() > i; i++) NX_CLKGEN_SetBaseAddress(i, (void*)IO_ADDRESS(NX_CLKGEN_GetPhysicalAddress(i))); NX_GPIO_Initialize(); for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) { NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i))); NX_GPIO_OpenModule(i); } NX_ALIVE_Initialize(); NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress())); NX_ALIVE_OpenModule(); NX_CLKPWR_Initialize(); NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress())); NX_CLKPWR_OpenModule(); /* * NOTE> ALIVE Power Gate must enable for RTC register access. * must be clear wfi jump address */ NX_ALIVE_SetWriteEnable(CTRUE); __raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT); // write 0xf0 on alive scratchpad reg for boot success check NX_ALIVE_SetScratchReg(NX_ALIVE_GetScratchReg() | 0xF0); NX_WDT_Initialize(); NX_WDT_SetBaseAddress(0, (void*)IO_ADDRESS(NX_WDT_GetPhysicalAddress(0))); NX_WDT_OpenModule(0); // watchdog disable if (NX_WDT_GetEnable(0)) { NX_WDT_SetEnable(0, CFALSE); NX_WDT_SetResetEnable(0, CFALSE); NX_WDT_ClearInterruptPending(0, NX_WDT_GetInterruptNumber(0)); } }
static void cpu_base_init(void) { U32 tie_reg, val; int i = 0; NX_RSTCON_Initialize(); NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress())); NX_TIEOFF_Initialize(); NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress())); NX_CLKGEN_Initialize(); for (i = 0; NX_CLKGEN_GetNumberOfModule() > i; i++) NX_CLKGEN_SetBaseAddress(i, (void*)IO_ADDRESS(NX_CLKGEN_GetPhysicalAddress(i))); NX_GPIO_Initialize(); for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) { NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i))); NX_GPIO_OpenModule(i); } NX_ALIVE_Initialize(); NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress())); NX_ALIVE_OpenModule(); NX_CLKPWR_Initialize(); NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress())); NX_CLKPWR_OpenModule(); /* * NOTE> ALIVE Power Gate must enable for RTC register access. * must be clear wfi jump address */ NX_ALIVE_SetWriteEnable(CTRUE); __raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT); /* * NOTE> Control for ACP register access. */ tie_reg = (U32)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress()); val = __raw_readl(tie_reg + 0x70) & ~((3 << 30) | (3 << 10)); writel(val, (tie_reg + 0X70)); val = __raw_readl(tie_reg + 0x80) & ~(3 << 3); writel(val, (tie_reg + 0x80)); /* add by cym 20150811 */ #ifdef CONFIG_MACH_S5P6818 /* end add */ // write 0xf0 on alive scratchpad reg for boot success check NX_ALIVE_SetScratchReg(NX_ALIVE_GetScratchReg() | 0xF0); NX_WDT_Initialize(); NX_WDT_SetBaseAddress(0, (void*)IO_ADDRESS(NX_WDT_GetPhysicalAddress(0))); NX_WDT_OpenModule(0); // watchdog disable if (NX_WDT_GetEnable(0)) { NX_WDT_SetEnable(0, CFALSE); NX_WDT_SetResetEnable(0, CFALSE); NX_WDT_ClearInterruptPending(0, NX_WDT_GetInterruptNumber(0)); } /* add by cym 20150811 */ #endif /* end add */ }