/**
* \brief Erases the specified block of the device.
* \param pNorFlashInfo Pointer to an struct NorFlashInfo instance.
* \param address Address offset to be erase.
* \returns 0 if the operation was successful; otherwise returns an error code.
*/
uint8_t INTEL_EraseSector(
struct NorFlashInfo *pNorFlashInfo,
uint32_t address)
{
uint32_t status;
uint32_t busAddress;
uint8_t busWidth;
uint8_t done = 0;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
// Issue Read Array Command - just in case that the flash is not in Read Array mode
intel_Reset(pNorFlashInfo, address);
// Check the lock status is locked.
status = intel_GetBlockLockStatus(pNorFlashInfo, address);
if(( status & INTEL_LOCKSTATUS_LOCKED ) == INTEL_LOCKSTATUS_LOCKED){
intel_UnlockSector(pNorFlashInfo, address);
}
// Clear the status register first.
intel_ClearStatus(pNorFlashInfo);
busAddress = NorFlash_GetAddressInChip(pNorFlashInfo,address);
// Block erase operations are initiated by writing the Block Erase Setup command to the address of the block to be erased.
WriteCommand(busWidth, busAddress, INTEL_CMD_BLOCK_ERASE_1);
// Next, the Block Erase Confirm command is written to the address of the block to be erased.
WriteCommand(busWidth, busAddress, INTEL_CMD_BLOCK_ERASE_2);
// Status register polling
do {
status = intel_ReadStatus(pNorFlashInfo,address);
// Check if the device is ready.
if ((status & INTEL_STATUS_DWS) == INTEL_STATUS_DWS ) {
// check if VPP within acceptable limits during program or erase operation.
if ((status & INTEL_STATUS_VPPS) == INTEL_STATUS_VPPS ) {
intel_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTWRITE;
}
// Check if the erase block operation is completed.
if ((status & INTEL_STATUS_PS) == INTEL_STATUS_PS ) {
intel_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTWRITE;
}
// Check if the erase block operation is completed.
if ((status & INTEL_STATUS_ES) == INTEL_STATUS_ES ) {
intel_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTWRITE;
}
// check if Block locked during program or erase, operation aborted.
else if ((status & INTEL_STATUS_BLS) == INTEL_STATUS_BLS ) {
intel_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTWRITE;
}
else {
done = 1;
}
}
} while (!done);
intel_Reset(pNorFlashInfo, address);
return 0;
}
void intel_Reset(struct NorFlashInfo *pNorFlashInfo, uint32_t address)
{
uint32_t busAddress;
uint32_t busWidth;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
busAddress = NorFlash_GetAddressInChip(pNorFlashInfo, address);
WriteCommand(busWidth, busAddress, INTEL_CMD_RESET);
}
/**
* \brief It implement a program word command.
* \param pNorFlashInfo Pointer to an struct NorFlashInfo instance.
* \param address Start address offset to be wrote.
* \param data word to be written.
* \returns 0 if the operation was successful; otherwise returns an error code.
*/
uint8_t intel_Program(
struct NorFlashInfo *pNorFlashInfo,
uint32_t address,
uint32_t data
)
{
uint32_t status;
uint32_t datain;
volatile uint32_t busAddress;
uint8_t done = 0;
uint8_t busWidth;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
// Issue Read Array Command - just in case that the flash is not in Read Array mode
intel_Reset(pNorFlashInfo, address);
busAddress = NorFlash_GetAddressInChip(pNorFlashInfo, address);
/*
// Check if the data already have been erased.
ReadRawData(busWidth, busAddress, (uint8_t*)&datain);
if((datain & data)!= data) {
return NorCommon_ERROR_CANNOTWRITE;
}
*/
// Word programming operations are initiated by writing the Word Program Setup command to the device.
WriteCommand(busWidth, busAddress, INTEL_CMD_PROGRAM_WORD);
// This is followed by a second write to the device with the address and data to be programmed.
WriteRawData(busWidth, busAddress, (uint8_t*)&data);
// Status register polling
do {
status = intel_ReadStatus(pNorFlashInfo,address);
// Check if the device is ready.
if ((status & INTEL_STATUS_DWS) == INTEL_STATUS_DWS ) {
// check if VPP within acceptable limits during program or erase operation.
if ((status & INTEL_STATUS_VPPS) == INTEL_STATUS_VPPS ) {
return NorCommon_ERROR_CANNOTWRITE;
}
// Check if the erase block operation is completed.
if ((status & INTEL_STATUS_PS) == INTEL_STATUS_PS ) {
return NorCommon_ERROR_CANNOTWRITE;
}
// check if Block locked during program or erase, operation aborted.
else if ((status & INTEL_STATUS_BLS) == INTEL_STATUS_BLS ) {
return NorCommon_ERROR_CANNOTWRITE;
}
else {
done = 1;
}
}
} while (!done);
intel_ClearStatus(pNorFlashInfo);
intel_Reset(pNorFlashInfo, address);
return 0;
}
void intel_ClearStatus(struct NorFlashInfo *pNorFlashInfo)
{
uint8_t busWidth;
uint32_t address;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
// Issue the Clear Status Register command at any address
address = NorFlash_GetAddressInChip(pNorFlashInfo, 0),
WriteCommand(busWidth, address, INTEL_CMD_CLEAR_STATUS);
}
/**
* \brief Reads data from the NandFlash chip into the provided buffer.
*
* \param pNorFlash Pointer to a NorFlash instance.
* \param address Start address offset to be wrote.
* \param buffer Buffer where the data will be stored.
* \param size Number of bytes that will be read.
*/
uint8_t NORFLASH_ReadData( NorFlash *pNorFlash, uint32_t address, uint8_t *buffer, uint32_t size)
{
uint32_t busAddress;
uint8_t busWidth;
uint32_t i;
busWidth = NorFlash_GetDataBusWidth(&(pNorFlash->norFlashInfo));
busAddress = NorFlash_GetAddressInChip(&(pNorFlash->norFlashInfo), address);
if ((busWidth / 8 ) == FLASH_CHIP_WIDTH_16BITS )
{
size = (size + 1) >> 1;
}
/**
* \brief Return the status register value.
* \param pNorFlashInfo Pointer to an struct NorFlashInfo instance.
* \return Status value.
*/
uint8_t intel_ReadStatus(struct NorFlashInfo *pNorFlashInfo, uint32_t address)
{
uint32_t status;
uint8_t busWidth;
uint32_t budAddress;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
/* Issue the Read Status Register command at any address. */
budAddress = NorFlash_GetAddressInChip(pNorFlashInfo, address),
WriteCommand(busWidth, budAddress, INTEL_CMD_READ_STATUS);
ReadRawData(busWidth, budAddress, (uint8_t*)&status);
return status;
}
//------------------------------------------------------------------------------
/// Reads data from the NandFlash chip into the provided buffer.
/// \param pNorFlash Pointer to a NorFlash instance.
/// \param buffer Buffer where the data will be stored.
/// \param size Number of bytes that will be read.
//------------------------------------------------------------------------------
unsigned char NORFLASH_ReadData(
struct NorFlash *pNorFlash,
unsigned int address,
unsigned char *buffer,
unsigned int size)
{
unsigned int busAddress;
unsigned char busWidth;
unsigned int i;
busWidth = NorFlash_GetDataBusWidth(&(pNorFlash->norFlashInfo));
busAddress = NorFlash_GetAddressInChip(&(pNorFlash->norFlashInfo), address);
if ((busWidth / 8 ) == FLASH_CHIP_WIDTH_16BITS ){
size = (size + 1) >> 1;
}
/**
* \brief Unlocks the specified block of the device.
* \param pNorFlashInfo Pointer to an struct NorFlashInfo instance.
* \param address Address in sector.
*/
void intel_UnlockSector(struct NorFlashInfo *pNorFlashInfo, uint32_t address)
{
uint32_t busAddress;
uint8_t busWidth;
// Issue Read Array Command - just in case that the flash is not in Read Array mode
intel_Reset(pNorFlashInfo, 0);
// Clear the status register first.
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
busAddress = NorFlash_GetAddressInChip(pNorFlashInfo,address);
WriteCommand(busWidth, busAddress, INTEL_CMD_BLOCK_LOCKSTART);
WriteCommand(busWidth, busAddress, INTEL_CMD_BLOCK_UNLOCK);
intel_Reset(pNorFlashInfo, 0);
}
uint32_t intel_ReadIdentification(
struct NorFlashInfo *pNorFlashInfo,
uint32_t offset)
{
uint32_t data;
uint8_t busWidth;
uint32_t address;
// Issue Read Array Command - just in case that the flash is not in Read Array mode
intel_Reset(pNorFlashInfo, 0);
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
address = NorFlash_GetAddressInChip(pNorFlashInfo, offset);
// Issue the Read Device Identifier command at specified address.
WriteCommand(busWidth, address, INTEL_CMD_IDIN);
ReadRawData(busWidth, address, (uint8_t*)&data);
intel_Reset(pNorFlashInfo, 0);
return data;
}
