void
fdt_reset_register_provider(device_t provider)
{
OF_device_register_xref(
OF_xref_from_node(ofw_bus_get_node(provider)), provider);
}
static int
ti_gpio_pic_attach(struct ti_gpio_softc *sc)
{
int error;
uint32_t irq;
const char *name;
sc->sc_isrcs = malloc(sizeof(*sc->sc_isrcs) * sc->sc_maxpin, M_DEVBUF,
M_WAITOK | M_ZERO);
name = device_get_nameunit(sc->sc_dev);
for (irq = 0; irq < sc->sc_maxpin; irq++) {
sc->sc_isrcs[irq].tgi_irq = irq;
sc->sc_isrcs[irq].tgi_mask = TI_GPIO_MASK(irq);
sc->sc_isrcs[irq].tgi_mode = GPIO_INTR_CONFORM;
error = intr_isrc_register(&sc->sc_isrcs[irq].tgi_isrc,
sc->sc_dev, 0, "%s,%u", name, irq);
if (error != 0)
return (error); /* XXX deregister ISRCs */
}
if (intr_pic_register(sc->sc_dev,
OF_xref_from_node(ofw_bus_get_node(sc->sc_dev))) == NULL)
return (ENXIO);
return (0);
}
static int
rt1310_pic_attach(struct rt1310_intc_softc *sc)
{
struct intr_pic *pic;
int error;
uint32_t irq;
const char *name;
intptr_t xref;
name = device_get_nameunit(sc->dev);
for (irq = 0; irq < INTC_NIRQS; irq++) {
sc->ri_isrcs[irq].ri_irq = irq;
error = intr_isrc_register(&sc->ri_isrcs[irq].ri_isrc,
sc->dev, 0, "%s,%u", name, irq);
if (error != 0)
return (error);
}
xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
pic = intr_pic_register(sc->dev, xref);
if (pic == NULL)
return (ENXIO);
return (intr_pic_claim_root(sc->dev, xref, rt1310_intr, sc, 0));
}
static int
mv_cp110_icu_attach(device_t dev)
{
struct mv_cp110_icu_softc *sc;
phandle_t node, msi_parent;
sc = device_get_softc(dev);
sc->dev = dev;
node = ofw_bus_get_node(dev);
if (OF_getencprop(node, "msi-parent", &msi_parent,
sizeof(phandle_t)) <= 0) {
device_printf(dev, "cannot find msi-parent property\n");
return (ENXIO);
}
if ((sc->parent = OF_device_from_xref(msi_parent)) == NULL) {
device_printf(dev, "cannot find msi-parent device\n");
return (ENXIO);
}
if (bus_alloc_resources(dev, mv_cp110_icu_res_spec, &sc->res) != 0) {
device_printf(dev, "cannot allocate resources for device\n");
return (ENXIO);
}
if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
device_printf(dev, "Cannot register ICU\n");
goto fail;
}
return (0);
fail:
bus_release_resources(dev, mv_cp110_icu_res_spec, &sc->res);
return (ENXIO);
}
static int
tegra_gpio_pic_attach(struct tegra_gpio_softc *sc)
{
int error;
uint32_t irq;
const char *name;
sc->isrcs = malloc(sizeof(*sc->isrcs) * sc->gpio_npins, M_DEVBUF,
M_WAITOK | M_ZERO);
name = device_get_nameunit(sc->dev);
for (irq = 0; irq < sc->gpio_npins; irq++) {
sc->isrcs[irq].irq = irq;
sc->isrcs[irq].cfgreg = 0;
error = intr_isrc_register(&sc->isrcs[irq].isrc,
sc->dev, 0, "%s,%u", name, irq);
if (error != 0)
return (error); /* XXX deregister ISRCs */
}
if (intr_pic_register(sc->dev,
OF_xref_from_node(ofw_bus_get_node(sc->dev))) == NULL)
return (ENXIO);
return (0);
}
static int
opaldev_probe(device_t dev)
{
phandle_t iparent;
pcell_t *irqs;
int i, n_irqs;
if (!ofw_bus_is_compatible(dev, "ibm,opal-v3"))
return (ENXIO);
if (opal_check() != 0)
return (ENXIO);
device_set_desc(dev, "OPAL Abstraction Firmware");
/* Manually add IRQs before attaching */
if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) {
iparent = OF_finddevice("/interrupt-controller@0");
iparent = OF_xref_from_node(iparent);
n_irqs = OF_getproplen(ofw_bus_get_node(dev),
"opal-interrupts") / sizeof(*irqs);
irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK);
OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs,
n_irqs * sizeof(*irqs));
for (i = 0; i < n_irqs; i++)
bus_set_resource(dev, SYS_RES_IRQ, i,
ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1);
free(irqs, M_DEVBUF);
}
return (BUS_PROBE_SPECIFIC);
}
void
ofw_gpiobus_unregister_provider(device_t provider)
{
phandle_t node;
node = ofw_bus_get_node(provider);
OF_device_register_xref(OF_xref_from_node(node), NULL);
}
static inline intptr_t
pic_xref(device_t dev)
{
#ifdef FDT
return (OF_xref_from_node(ofw_bus_get_node(dev)));
#else
return (0);
#endif
}
static int
axgbephy_attach(device_t dev)
{
phandle_t node;
node = ofw_bus_get_node(dev);
OF_device_register_xref(OF_xref_from_node(node), dev);
return (0);
}
void
phy_register_provider(device_t provider_dev)
{
phandle_t xref, node;
node = ofw_bus_get_node(provider_dev);
if (node <= 0)
panic("%s called on not ofw based device.\n", __func__);
xref = OF_xref_from_node(node);
OF_device_register_xref(xref, provider_dev);
}
static int
aw_nmi_attach(device_t dev)
{
struct aw_nmi_softc *sc;
phandle_t xref;
sc = device_get_softc(dev);
sc->dev = dev;
if (bus_alloc_resources(dev, aw_nmi_res_spec, sc->res) != 0) {
device_printf(dev, "can't allocate device resources\n");
return (ENXIO);
}
if ((bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC,
aw_nmi_intr, NULL, sc, &sc->intrcookie))) {
device_printf(dev, "unable to register interrupt handler\n");
bus_release_resources(dev, aw_nmi_res_spec, sc->res);
return (ENXIO);
}
switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
case A20_NMI:
sc->enable_reg = A20_NMI_IRQ_ENABLE_REG;
break;
case A31_NMI:
sc->enable_reg = A31_NMI_IRQ_ENABLE_REG;
break;
}
/* Disable and clear interrupts */
SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
SC_NMI_WRITE(sc, NMI_IRQ_PENDING_REG, NMI_IRQ_ACK);
xref = OF_xref_from_node(ofw_bus_get_node(dev));
/* Register our isrc */
sc->intr.irq = 0;
sc->intr.pol = INTR_POLARITY_CONFORM;
sc->intr.tri = INTR_TRIGGER_CONFORM;
if (intr_isrc_register(&sc->intr.isrc, sc->dev, 0, "%s,%u",
device_get_nameunit(sc->dev), sc->intr.irq) != 0)
goto error;
if (intr_pic_register(dev, (intptr_t)xref) == NULL) {
device_printf(dev, "could not register pic\n");
goto error;
}
return (0);
error:
bus_teardown_intr(dev, sc->res[1], sc->intrcookie);
bus_release_resources(dev, aw_nmi_res_spec, sc->res);
return (ENXIO);
}
static int
mtk_gpio_detach(device_t dev)
{
struct mtk_gpio_softc *sc = device_get_softc(dev);
phandle_t node;
node = ofw_bus_get_node(dev);
intr_pic_deregister(dev, OF_xref_from_node(node));
if (sc->intrhand != NULL)
bus_teardown_intr(dev, sc->res[1], sc->intrhand);
bus_release_resources(dev, mtk_gpio_spec, sc->res);
MTK_GPIO_LOCK_DESTROY(sc);
return (0);
}
static int
bcm_intc_attach(device_t dev)
{
struct bcm_intc_softc *sc = device_get_softc(dev);
int rid = 0;
intptr_t xref;
sc->sc_dev = dev;
if (bcm_intc_sc)
return (ENXIO);
sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (sc->intc_res == NULL) {
device_printf(dev, "could not allocate memory resource\n");
return (ENXIO);
}
xref = OF_xref_from_node(ofw_bus_get_node(dev));
if (bcm_intc_pic_register(sc, xref) != 0) {
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->intc_res);
device_printf(dev, "could not register PIC\n");
return (ENXIO);
}
rid = 0;
sc->intc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
RF_ACTIVE);
if (sc->intc_irq_res == NULL) {
if (intr_pic_claim_root(dev, xref, bcm2835_intc_intr, sc, 0) != 0) {
/* XXX clean up */
device_printf(dev, "could not set PIC as a root\n");
return (ENXIO);
}
} else {
if (bus_setup_intr(dev, sc->intc_irq_res, INTR_TYPE_CLK,
bcm2835_intc_intr, NULL, sc, &sc->intc_irq_hdl)) {
/* XXX clean up */
device_printf(dev, "could not setup irq handler\n");
return (ENXIO);
}
}
sc->intc_bst = rman_get_bustag(sc->intc_res);
sc->intc_bsh = rman_get_bushandle(sc->intc_res);
bcm_intc_sc = sc;
return (0);
}
static int
tegra_lic_attach(device_t dev)
{
struct tegra_lic_sc *sc;
phandle_t node;
phandle_t parent_xref;
int i, rv;
sc = device_get_softc(dev);
sc->dev = dev;
node = ofw_bus_get_node(dev);
rv = OF_getencprop(node, "interrupt-parent", &parent_xref,
sizeof(parent_xref));
if (rv <= 0) {
device_printf(dev, "Cannot read parent node property\n");
goto fail;
}
sc->parent = OF_device_from_xref(parent_xref);
if (sc->parent == NULL) {
device_printf(dev, "Cannott find parent controller\n");
goto fail;
}
if (bus_alloc_resources(dev, lic_spec, sc->mem_res)) {
device_printf(dev, "Cannott allocate resources\n");
goto fail;
}
/* Disable all interrupts, route all to irq */
for (i = 0; i < nitems(lic_spec); i++) {
if (sc->mem_res[i] == NULL)
continue;
WR4(sc, i, LIC_CPU_IER_CLR, 0xFFFFFFFF);
WR4(sc, i, LIC_CPU_IEP_CLASS, 0);
}
if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
device_printf(dev, "Cannot register PIC\n");
goto fail;
}
return (0);
fail:
bus_release_resources(dev, lic_spec, sc->mem_res);
return (ENXIO);
}
/*
* Get interrupt parent for given node.
* Returns 0 if interrupt parent doesn't exist.
*/
phandle_t
ofw_bus_find_iparent(phandle_t node)
{
phandle_t iparent;
if (OF_searchencprop(node, "interrupt-parent", &iparent,
sizeof(iparent)) == -1) {
for (iparent = node; iparent != 0;
iparent = OF_parent(iparent)) {
if (OF_hasprop(iparent, "interrupt-controller"))
break;
}
iparent = OF_xref_from_node(iparent);
}
return (iparent);
}
static int
msgdma_attach(device_t dev)
{
struct msgdma_softc *sc;
phandle_t xref, node;
int err;
sc = device_get_softc(dev);
sc->dev = dev;
if (bus_alloc_resources(dev, msgdma_spec, sc->res)) {
device_printf(dev, "could not allocate resources for device\n");
return (ENXIO);
}
/* CSR memory interface */
sc->bst = rman_get_bustag(sc->res[0]);
sc->bsh = rman_get_bushandle(sc->res[0]);
/* Descriptor memory interface */
sc->bst_d = rman_get_bustag(sc->res[1]);
sc->bsh_d = rman_get_bushandle(sc->res[1]);
/* Setup interrupt handler */
err = bus_setup_intr(dev, sc->res[2], INTR_TYPE_MISC | INTR_MPSAFE,
NULL, msgdma_intr, sc, &sc->ih);
if (err) {
device_printf(dev, "Unable to alloc interrupt resource.\n");
return (ENXIO);
}
node = ofw_bus_get_node(dev);
xref = OF_xref_from_node(node);
OF_device_register_xref(xref, dev);
if (msgdma_reset(sc) != 0)
return (-1);
WRITE4(sc, DMA_CONTROL, CONTROL_GIEM);
return (0);
}
static int
omap4_wugen_attach(device_t dev)
{
struct omap4_wugen_sc *sc;
phandle_t node;
phandle_t parent_xref;
int rid, rv;
sc = device_get_softc(dev);
sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
rv = OF_getencprop(node, "interrupt-parent", &parent_xref,
sizeof(parent_xref));
if (rv <= 0) {
device_printf(dev, "can't read parent node property\n");
goto fail;
}
sc->sc_parent = OF_device_from_xref(parent_xref);
if (sc->sc_parent == NULL) {
device_printf(dev, "can't find parent controller\n");
goto fail;
}
rid = 0;
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->sc_mem_res == NULL) {
device_printf(dev, "can't allocate resources\n");
return (ENXIO);
}
if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
device_printf(dev, "can't register PIC\n");
goto fail;
}
return (0);
fail:
omap4_wugen_detach(dev);
return (ENXIO);
}
static int
thunder_mdio_fdt_attach(device_t dev)
{
phandle_t node;
int ret;
/* Call core attach */
ret = thunder_mdio_attach(dev);
if (ret != 0)
return (ret);
/*
* Register device to this node/xref.
* Thanks to that we will be able to retrieve device_t structure
* while holding only node reference acquired from FDT.
*/
node = ofw_bus_get_node(dev);
OF_device_register_xref(OF_xref_from_node(node), dev);
return (0);
}
int
nvmem_write_cell_by_idx(phandle_t node, int idx, void *cell, size_t buflen)
{
phandle_t cell_node, prov_node;
device_t provider;
uint32_t reg[2];
int rv;
rv = nvmem_get_cell_node(node, idx, &cell_node);
if (rv != 0)
return (rv);
prov_node = OF_parent(cell_node);
if (OF_hasprop(prov_node, "read-only"))
return (ENXIO);
/* Validate the reg property */
if (OF_getencprop(cell_node, "reg", reg, sizeof(reg)) != sizeof(reg)) {
if (bootverbose)
printf("nvmem_get_cell_by_idx: Cannot parse reg property of cell %d\n",
idx);
return (ENXIO);
}
if (buflen != reg[1])
return (EINVAL);
provider = OF_device_from_xref(OF_xref_from_node(prov_node));
if (provider == NULL) {
if (bootverbose)
printf("nvmem_get_cell_by_idx: Cannot find the nvmem device\n");
return (ENXIO);
}
rv = NVMEM_WRITE(provider, reg[0], reg[1], cell);
if (rv != 0) {
return (rv);
}
return (0);
}
int
ofw_bus_intr_to_rl(device_t dev, phandle_t node,
struct resource_list *rl, int *rlen)
{
phandle_t iparent;
uint32_t icells, *intr;
int err, i, irqnum, nintr, rid;
boolean_t extended;
nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr),
(void **)&intr);
if (nintr > 0) {
iparent = ofw_bus_find_iparent(node);
if (iparent == 0) {
device_printf(dev, "No interrupt-parent found, "
"assuming direct parent\n");
iparent = OF_parent(node);
iparent = OF_xref_from_node(iparent);
}
if (OF_searchencprop(OF_node_from_xref(iparent),
"#interrupt-cells", &icells, sizeof(icells)) == -1) {
device_printf(dev, "Missing #interrupt-cells "
"property, assuming <1>\n");
icells = 1;
}
if (icells < 1 || icells > nintr) {
device_printf(dev, "Invalid #interrupt-cells property "
"value <%d>, assuming <1>\n", icells);
icells = 1;
}
extended = false;
} else {
nintr = OF_getencprop_alloc(node, "interrupts-extended",
sizeof(*intr), (void **)&intr);
if (nintr <= 0)
return (0);
extended = true;
}
err = 0;
rid = 0;
for (i = 0; i < nintr; i += icells) {
if (extended) {
iparent = intr[i++];
if (OF_searchencprop(OF_node_from_xref(iparent),
"#interrupt-cells", &icells, sizeof(icells)) == -1) {
device_printf(dev, "Missing #interrupt-cells "
"property\n");
err = ENOENT;
break;
}
if (icells < 1 || (i + icells) > nintr) {
device_printf(dev, "Invalid #interrupt-cells "
"property value <%d>\n", icells);
err = ERANGE;
break;
}
}
irqnum = ofw_bus_map_intr(dev, iparent, icells, &intr[i]);
resource_list_add(rl, SYS_RES_IRQ, rid++, irqnum, irqnum, 1);
}
if (rlen != NULL)
*rlen = rid;
free(intr, M_OFWPROP);
return (err);
}
static int
ofw_iicbus_attach(device_t dev)
{
struct iicbus_softc *sc = IICBUS_SOFTC(dev);
struct ofw_iicbus_devinfo *dinfo;
phandle_t child, node, root;
pcell_t freq, paddr;
device_t childdev;
ssize_t compatlen;
char compat[255];
char *curstr;
u_int iic_addr_8bit = 0;
sc->dev = dev;
mtx_init(&sc->lock, "iicbus", NULL, MTX_DEF);
/*
* If there is a clock-frequency property for the device node, use it as
* the starting value for the bus frequency. Then call the common
* routine that handles the tunable/sysctl which allows the FDT value to
* be overridden by the user.
*/
node = ofw_bus_get_node(dev);
freq = 0;
OF_getencprop(node, "clock-frequency", &freq, sizeof(freq));
iicbus_init_frequency(dev, freq);
iicbus_reset(dev, IIC_FASTEST, 0, NULL);
bus_generic_probe(dev);
bus_enumerate_hinted_children(dev);
/*
* Check if we're running on a PowerMac, needed for the I2C
* address below.
*/
root = OF_peer(0);
compatlen = OF_getprop(root, "compatible", compat,
sizeof(compat));
if (compatlen != -1) {
for (curstr = compat; curstr < compat + compatlen;
curstr += strlen(curstr) + 1) {
if (strncmp(curstr, "MacRISC", 7) == 0)
iic_addr_8bit = 1;
}
}
/*
* Attach those children represented in the device tree.
*/
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
/*
* Try to get the I2C address first from the i2c-address
* property, then try the reg property. It moves around
* on different systems.
*/
if (OF_getencprop(child, "i2c-address", &paddr,
sizeof(paddr)) == -1)
if (OF_getencprop(child, "reg", &paddr,
sizeof(paddr)) == -1)
continue;
/*
* Now set up the I2C and OFW bus layer devinfo and add it
* to the bus.
*/
dinfo = malloc(sizeof(struct ofw_iicbus_devinfo), M_DEVBUF,
M_NOWAIT | M_ZERO);
if (dinfo == NULL)
continue;
/*
* FreeBSD drivers expect I2C addresses to be expressed as
* 8-bit values. Apple OFW data contains 8-bit values, but
* Linux FDT data contains 7-bit values, so shift them up to
* 8-bit format.
*/
if (iic_addr_8bit)
dinfo->opd_dinfo.addr = paddr;
else
dinfo->opd_dinfo.addr = paddr << 1;
if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
0) {
free(dinfo, M_DEVBUF);
continue;
}
childdev = device_add_child(dev, NULL, -1);
resource_list_init(&dinfo->opd_dinfo.rl);
ofw_bus_intr_to_rl(childdev, child,
&dinfo->opd_dinfo.rl, NULL);
device_set_ivars(childdev, dinfo);
}
/* Register bus */
OF_device_register_xref(OF_xref_from_node(node), dev);
return (bus_generic_attach(dev));
}
static inline intptr_t
pic_xref(device_t dev)
{
return (OF_xref_from_node(ofw_bus_get_node(dev)));
}
static int
mtk_gpio_attach(device_t dev)
{
struct mtk_gpio_softc *sc;
phandle_t node;
uint32_t i, num_pins;
sc = device_get_softc(dev);
sc->dev = dev;
if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
device_printf(dev, "could not allocate resources for device\n");
return (ENXIO);
}
MTK_GPIO_LOCK_INIT(sc);
node = ofw_bus_get_node(dev);
if (OF_hasprop(node, "clocks"))
mtk_soc_start_clock(dev);
if (OF_hasprop(node, "resets"))
mtk_soc_reset_device(dev);
if (OF_getprop(node, "ralink,register-map", sc->regs,
GPIO_PIOMAX) <= 0) {
device_printf(dev, "Failed to read register map\n");
return (ENXIO);
}
if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
"ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
sc->num_pins = num_pins;
else
sc->num_pins = MTK_GPIO_PINS;
for (i = 0; i < sc->num_pins; i++) {
sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
device_get_unit(dev) + 'a', i);
sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
mtk_gpio_pin_probe(sc, i);
}
if (mtk_pic_register_isrcs(sc) != 0) {
device_printf(dev, "could not register PIC ISRCs\n");
goto fail;
}
if (intr_pic_register(dev, OF_xref_from_node(node)) != 0) {
device_printf(dev, "could not register PIC\n");
goto fail;
}
if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
goto fail_pic;
sc->busdev = gpiobus_attach_bus(dev);
if (sc->busdev == NULL)
goto fail_pic;
return (0);
fail_pic:
intr_pic_deregister(dev, OF_xref_from_node(node));
fail:
if(sc->intrhand != NULL)
bus_teardown_intr(dev, sc->res[1], sc->intrhand);
bus_release_resources(dev, mtk_gpio_spec, sc->res);
MTK_GPIO_LOCK_DESTROY(sc);
return (ENXIO);
}
static int
gic_v3_fdt_attach(device_t dev)
{
struct gic_v3_softc *sc;
pcell_t redist_regions;
intptr_t xref;
int err;
sc = device_get_softc(dev);
sc->dev = dev;
/*
* Recover number of the Re-Distributor regions.
*/
if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
&redist_regions, sizeof(redist_regions)) <= 0)
sc->gic_redists.nregions = 1;
else
sc->gic_redists.nregions = redist_regions;
err = gic_v3_attach(dev);
if (err != 0)
goto error;
xref = OF_xref_from_node(ofw_bus_get_node(dev));
sc->gic_pic = intr_pic_register(dev, xref);
if (sc->gic_pic == NULL) {
device_printf(dev, "could not register PIC\n");
err = ENXIO;
goto error;
}
/* Register xref */
OF_device_register_xref(xref, dev);
if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
err = ENXIO;
goto error;
}
/*
* Try to register ITS to this GIC.
* GIC will act as a bus in that case.
* Failure here will not affect main GIC functionality.
*/
if (gic_v3_ofw_bus_attach(dev) != 0) {
if (bootverbose) {
device_printf(dev,
"Failed to attach ITS to this GIC\n");
}
}
if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
sc->gic_nchildren = 0;
return (err);
error:
if (bootverbose) {
device_printf(dev,
"Failed to attach. Error %d\n", err);
}
/* Failure so free resources */
gic_v3_detach(dev);
return (err);
}
static int
pl190_intc_attach(device_t dev)
{
struct pl190_intc_softc *sc;
uint32_t id;
int i, rid;
struct pl190_intc_irqsrc *isrcs;
struct intr_pic *pic;
int error;
uint32_t irq;
const char *name;
phandle_t xref;
sc = device_get_softc(dev);
sc->dev = dev;
mtx_init(&sc->mtx, device_get_nameunit(dev), "pl190",
MTX_SPIN);
/* Request memory resources */
rid = 0;
sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->intc_res == NULL) {
device_printf(dev, "Error: could not allocate memory resources\n");
return (ENXIO);
}
/*
* All interrupts should use IRQ line
*/
INTC_VIC_WRITE_4(sc, VICINTSELECT, 0x00000000);
/* Disable all interrupts */
INTC_VIC_WRITE_4(sc, VICINTENCLEAR, 0xffffffff);
id = 0;
for (i = 3; i >= 0; i--) {
id = (id << 8) |
(INTC_VIC_READ_4(sc, VICPERIPHID + i*4) & 0xff);
}
device_printf(dev, "Peripheral ID: %08x\n", id);
id = 0;
for (i = 3; i >= 0; i--) {
id = (id << 8) |
(INTC_VIC_READ_4(sc, VICPRIMECELLID + i*4) & 0xff);
}
device_printf(dev, "PrimeCell ID: %08x\n", id);
/* PIC attachment */
isrcs = sc->isrcs;
name = device_get_nameunit(sc->dev);
for (irq = 0; irq < VIC_NIRQS; irq++) {
isrcs[irq].irq = irq;
error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
0, "%s,%u", name, irq);
if (error != 0)
return (error);
}
xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
pic = intr_pic_register(sc->dev, xref);
if (pic == NULL)
return (ENXIO);
return (intr_pic_claim_root(sc->dev, xref, pl190_intc_intr, sc, 0));
}
int
ofw_bus_intr_by_rid(device_t dev, phandle_t node, int wanted_rid,
phandle_t *producer, int *ncells, pcell_t **cells)
{
phandle_t iparent;
uint32_t icells, *intr;
int err, i, nintr, rid;
boolean_t extended;
nintr = OF_getencprop_alloc_multi(node, "interrupts", sizeof(*intr),
(void **)&intr);
if (nintr > 0) {
iparent = ofw_bus_find_iparent(node);
if (iparent == 0) {
device_printf(dev, "No interrupt-parent found, "
"assuming direct parent\n");
iparent = OF_parent(node);
iparent = OF_xref_from_node(iparent);
}
if (OF_searchencprop(OF_node_from_xref(iparent),
"#interrupt-cells", &icells, sizeof(icells)) == -1) {
device_printf(dev, "Missing #interrupt-cells "
"property, assuming <1>\n");
icells = 1;
}
if (icells < 1 || icells > nintr) {
device_printf(dev, "Invalid #interrupt-cells property "
"value <%d>, assuming <1>\n", icells);
icells = 1;
}
extended = false;
} else {
nintr = OF_getencprop_alloc_multi(node, "interrupts-extended",
sizeof(*intr), (void **)&intr);
if (nintr <= 0)
return (ESRCH);
extended = true;
}
err = ESRCH;
rid = 0;
for (i = 0; i < nintr; i += icells, rid++) {
if (extended) {
iparent = intr[i++];
if (OF_searchencprop(OF_node_from_xref(iparent),
"#interrupt-cells", &icells, sizeof(icells)) == -1) {
device_printf(dev, "Missing #interrupt-cells "
"property\n");
err = ENOENT;
break;
}
if (icells < 1 || (i + icells) > nintr) {
device_printf(dev, "Invalid #interrupt-cells "
"property value <%d>\n", icells);
err = ERANGE;
break;
}
}
if (rid == wanted_rid) {
*cells = malloc(icells * sizeof(**cells), M_OFWPROP,
M_WAITOK);
*producer = iparent;
*ncells= icells;
memcpy(*cells, intr + i, icells * sizeof(**cells));
err = 0;
break;
}
}
free(intr, M_OFWPROP);
return (err);
}
static int
a10dmac_attach(device_t dev)
{
struct a10dmac_softc *sc;
unsigned int index;
clk_t clk;
int error;
sc = device_get_softc(dev);
if (bus_alloc_resources(dev, a10dmac_spec, sc->sc_res)) {
device_printf(dev, "cannot allocate resources for device\n");
return (ENXIO);
}
mtx_init(&sc->sc_mtx, "a10 dmac", NULL, MTX_SPIN);
/* Activate DMA controller clock */
error = clk_get_by_ofw_index(dev, 0, 0, &clk);
if (error != 0) {
device_printf(dev, "cannot get clock\n");
return (error);
}
error = clk_enable(clk);
if (error != 0) {
device_printf(dev, "cannot enable clock\n");
return (error);
}
/* Disable all interrupts and clear pending status */
DMA_WRITE(sc, AWIN_DMA_IRQ_EN_REG, 0);
DMA_WRITE(sc, AWIN_DMA_IRQ_PEND_STA_REG, ~0);
/* Initialize channels */
for (index = 0; index < NDMA_CHANNELS; index++) {
sc->sc_ndma_channels[index].ch_sc = sc;
sc->sc_ndma_channels[index].ch_index = index;
sc->sc_ndma_channels[index].ch_type = CH_NDMA;
sc->sc_ndma_channels[index].ch_callback = NULL;
sc->sc_ndma_channels[index].ch_callbackarg = NULL;
sc->sc_ndma_channels[index].ch_regoff = AWIN_NDMA_REG(index);
DMACH_WRITE(&sc->sc_ndma_channels[index], AWIN_NDMA_CTL_REG, 0);
}
for (index = 0; index < DDMA_CHANNELS; index++) {
sc->sc_ddma_channels[index].ch_sc = sc;
sc->sc_ddma_channels[index].ch_index = index;
sc->sc_ddma_channels[index].ch_type = CH_DDMA;
sc->sc_ddma_channels[index].ch_callback = NULL;
sc->sc_ddma_channels[index].ch_callbackarg = NULL;
sc->sc_ddma_channels[index].ch_regoff = AWIN_DDMA_REG(index);
DMACH_WRITE(&sc->sc_ddma_channels[index], AWIN_DDMA_CTL_REG, 0);
}
error = bus_setup_intr(dev, sc->sc_res[1], INTR_MPSAFE | INTR_TYPE_MISC,
NULL, a10dmac_intr, sc, &sc->sc_ih);
if (error != 0) {
device_printf(dev, "could not setup interrupt handler\n");
bus_release_resources(dev, a10dmac_spec, sc->sc_res);
mtx_destroy(&sc->sc_mtx);
return (ENXIO);
}
OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
return (0);
}
