static uint32
sb_read_sbreg(si_info_t *sii, volatile uint32 *sbr)
{
uint8 tmp;
uint32 val, intr_val = 0;
/*
* compact flash only has 11 bits address, while we needs 12 bits address.
* MEM_SEG will be OR'd with other 11 bits address in hardware,
* so we program MEM_SEG with 12th bit when necessary(access sb regsiters).
* For normal PCMCIA bus(CFTable_regwinsz > 2k), do nothing special
*/
if (PCMCIA(sii)) {
INTR_OFF(sii, intr_val);
tmp = 1;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
}
val = R_REG(sii->osh, sbr);
if (PCMCIA(sii)) {
tmp = 0;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
INTR_RESTORE(sii, intr_val);
}
return (val);
}
static void
sb_write_sbreg(si_info_t *sii, volatile uint32 *sbr, uint32 v)
{
uint8 tmp;
volatile uint32 dummy;
uint32 intr_val = 0;
/*
* compact flash only has 11 bits address, while we needs 12 bits address.
* MEM_SEG will be OR'd with other 11 bits address in hardware,
* so we program MEM_SEG with 12th bit when necessary(access sb regsiters).
* For normal PCMCIA bus(CFTable_regwinsz > 2k), do nothing special
*/
if (PCMCIA(sii)) {
INTR_OFF(sii, intr_val);
tmp = 1;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
}
if (BUSTYPE(sii->pub.bustype) == PCMCIA_BUS) {
#ifdef IL_BIGENDIAN
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, ((volatile uint16 *)sbr + 1), (uint16)((v >> 16) & 0xffff));
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, (volatile uint16 *)sbr, (uint16)(v & 0xffff));
#else
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, (volatile uint16 *)sbr, (uint16)(v & 0xffff));
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, ((volatile uint16 *)sbr + 1), (uint16)((v >> 16) & 0xffff));
#endif /* IL_BIGENDIAN */
} else
/* write a word to the PCMCIA srom */
static int
sprom_write_pcmcia(void *osh, uint16 addr, uint16 data)
{
uint8 addr_l, addr_h, data_l, data_h;
addr_l = (uint8)((addr * 2) & 0xff);
addr_h = (uint8)(((addr * 2) >> 8) & 0xff);
data_l = (uint8)(data & 0xff);
data_h = (uint8)((data >> 8) & 0xff);
/* set address */
OSL_PCMCIA_WRITE_ATTR(osh, SROM_ADDRH, &addr_h, 1);
OSL_PCMCIA_WRITE_ATTR(osh, SROM_ADDRL, &addr_l, 1);
/* write data */
OSL_PCMCIA_WRITE_ATTR(osh, SROM_DATAH, &data_h, 1);
OSL_PCMCIA_WRITE_ATTR(osh, SROM_DATAL, &data_l, 1);
/* do write */
return sprom_cmd_pcmcia(osh, SROM_WRITE);
}
/* read a word from the PCMCIA srom */
static int
sprom_read_pcmcia(void *osh, uint16 addr, uint16 *data)
{
uint8 addr_l, addr_h, data_l, data_h;
addr_l = (uint8)((addr * 2) & 0xff);
addr_h = (uint8)(((addr * 2) >> 8) & 0xff);
/* set address */
OSL_PCMCIA_WRITE_ATTR(osh, SROM_ADDRH, &addr_h, 1);
OSL_PCMCIA_WRITE_ATTR(osh, SROM_ADDRL, &addr_l, 1);
/* do read */
if (sprom_cmd_pcmcia(osh, SROM_READ))
return 1;
/* read data */
OSL_PCMCIA_READ_ATTR(osh, SROM_DATAH, &data_h, 1);
OSL_PCMCIA_READ_ATTR(osh, SROM_DATAL, &data_l, 1);
*data = (data_h << 8) | data_l;
return 0;
}
static uint32
sb_read_sbreg(si_info_t *sii, volatile uint32 *sbr)
{
uint8 tmp;
uint32 val, intr_val = 0;
if (PCMCIA(sii)) {
INTR_OFF(sii, intr_val);
tmp = 1;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11));
}
val = R_REG(sii->osh, sbr);
if (PCMCIA(sii)) {
tmp = 0;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
INTR_RESTORE(sii, intr_val);
}
return (val);
}
/* set PCMCIA sprom command register */
static int
sprom_cmd_pcmcia(void *osh, uint8 cmd)
{
uint8 status;
uint wait_cnt = 1000;
/* write sprom command register */
OSL_PCMCIA_WRITE_ATTR(osh, SROM_CS, &cmd, 1);
/* wait status */
while (wait_cnt--) {
OSL_PCMCIA_READ_ATTR(osh, SROM_CS, &status, 1);
if (status & SROM_DONE)
return 0;
}
return 1;
}
static void
sb_write_sbreg(si_info_t *sii, volatile uint32 *sbr, uint32 v)
{
uint8 tmp;
volatile uint32 dummy;
uint32 intr_val = 0;
/*
* compact flash only has 11 bits address, while we needs 12 bits address.
* MEM_SEG will be OR'd with other 11 bits address in hardware,
* so we program MEM_SEG with 12th bit when necessary(access sb regsiters).
* For normal PCMCIA bus(CFTable_regwinsz > 2k), do nothing special
*/
if (PCMCIA(sii)) {
INTR_OFF(sii, intr_val);
tmp = 1;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
}
/*
* WAR for PR18509, PR3864 and PR17322
* The config registers are always written as 32-bits. If write 16 bits,
* the other 16 bits are random, which needs to be controlled to avoid side-effect.
* This is required only for PCMCIA bus.
*/
if (BUSTYPE(sii->pub.bustype) == PCMCIA_BUS) {
#ifdef IL_BIGENDIAN
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, ((volatile uint16 *)sbr + 1), (uint16)((v >> 16) & 0xffff));
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, (volatile uint16 *)sbr, (uint16)(v & 0xffff));
#else
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, (volatile uint16 *)sbr, (uint16)(v & 0xffff));
dummy = R_REG(sii->osh, sbr);
W_REG(sii->osh, ((volatile uint16 *)sbr + 1), (uint16)((v >> 16) & 0xffff));
#endif /* IL_BIGENDIAN */
} else
static void
sb_write_sbreg(si_info_t *sii, volatile uint32 *sbr, uint32 v)
{
uint8 tmp;
volatile uint32 dummy;
uint32 intr_val = 0;
if (PCMCIA(sii)) {
INTR_OFF(sii, intr_val);
tmp = 1;
OSL_PCMCIA_WRITE_ATTR(sii->osh, MEM_SEG, &tmp, 1);
sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11));
}
if (BUSTYPE(sii->pub.bustype) == PCMCIA_BUS) {
dummy = R_REG(sii->osh, sbr);
BCM_REFERENCE(dummy);
W_REG(sii->osh, (volatile uint16 *)sbr, (uint16)(v & 0xffff));
dummy = R_REG(sii->osh, sbr);
BCM_REFERENCE(dummy);
W_REG(sii->osh, ((volatile uint16 *)sbr + 1), (uint16)((v >> 16) & 0xffff));
} else
