/*****************************************************************************
函 数 名 : spm_alloc_arp_cb
功能描述 : 申请ARP节点的内存空间
输入参数 : NBB_CCXT_T NBB_CXT
输出参数 : 无
返 回 值 : SPM_ARP_CB
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2012年11月10日
作 者 : xiaoxiang
修改内容 : 新生成函数
*****************************************************************************/
SPM_ARP_CB *spm_alloc_arp_cb(NBB_CXT_T NBB_CXT)
{
SPM_ARP_CB *pst_arp = NULL;
NBB_TRC_ENTRY("spm_alloc_arp_cb");
/* 分配一个新的VC表配置条目。*/
pst_arp = (SPM_ARP_CB *)NBB_MM_ALLOC(sizeof(SPM_ARP_CB), NBB_NORETRY_ACT, MEM_SPM_ARP_CB);
if (pst_arp == NULL)
{
goto EXIT_LABEL;
}
/* 初始化VC表配置条目 */
OS_MEMSET(pst_arp, 0, sizeof(SPM_ARP_CB));
pst_arp->basic_cfg_cb = NULL;
/* 建立用于该VC表配置条目的句柄，作为异步消息交换的相关器。*/
pst_arp->spm_arp_handle = NBB_CREATE_HANDLE(pst_arp, HDL_SPM_ARP_CB);
/* 成功分配一个新的接口物理配置条目。*/
NBB_TRC_DETAIL((NBB_FORMAT "SPM_ARP_CB allocated at %p with handle %#lx",
pst_arp, pst_arp->spm_arp_handle));
/* Initialize the AVLL node. */
AVLL_INIT_NODE(pst_arp->spm_arp_node);
EXIT_LABEL: NBB_TRC_EXIT();
return(pst_arp);
}
/*!
* This function is directly exported.
*
* @param driver_handle
* @param info
*
* @return 0
*/
int igd_get_config_info(igd_driver_h driver_handle,
igd_config_info_t *config_info)
{
igd_context_t *context = (igd_context_t *)driver_handle;
EMGD_TRACE_ENTER;
EMGD_ASSERT(context, "Null context!", -IGD_ERROR_INVAL);
EMGD_ASSERT(config_info, "Null config_info!", -IGD_ERROR_INVAL);
OS_MEMSET(config_info, 0, sizeof(igd_config_info_t));
/* Config information already obtained from driver_config() */
config_info->mmio_base_phys = context->device_context.mmadr;
config_info->mmio_base_virt = context->device_context.virt_mmadr;
config_info->gtt_memory_base_phys = context->device_context.fb_adr;
/* config_info->gtt_memory_base_virt = context->device_context.virt_fb_adr; */
config_info->gtt_memory_size = context->device_context.mem_size;
config_info->revision_id = context->device_context.rid;
config_info->hw_status_offset = context->device_context.hw_status_offset;
config_info->stolen_memory_base_virt = 0; /* FIXME: remove this */
/* get the portions held in the dsp module */
if(context->mod_dispatch.dsp_get_config_info) {
context->mod_dispatch.dsp_get_config_info(context, config_info);
}
/* get the portions held in the pi module */
if(context->mod_dispatch.pi_get_config_info) {
context->mod_dispatch.pi_get_config_info(context, config_info);
}
EMGD_TRACE_EXIT;
return 0;
}
int alter_ovl2_tnc(igd_display_context_t *display,
igd_surface_t *src_surf,
igd_rect_t *src_rect,
igd_rect_t *dest_rect,
igd_ovl_info_t *ovl_info,
unsigned int flags)
{
ovl2_reg_tnc_t spritec_regs_tnc;
int ret=0;
EMGD_TRACE_ENTER;
/* Initialize structure so compilers don't complain */
OS_MEMSET(&spritec_regs_tnc, 0, sizeof(ovl2_reg_tnc_t));
if (micro_prepare_ovl2_tnc(display, src_surf, src_rect, dest_rect,
ovl_info, &spritec_regs_tnc, flags)) {
return -IGD_ERROR_HWERROR;
}
/* Send the instructions to the command queue */
ret = ovl2_send_instr_tnc(display, &spritec_regs_tnc, flags);
EMGD_DEBUG("Sprite C= %s",flags & IGD_OVL_ALTER_ON?"ON":"OFF");
EMGD_TRACE_EXIT;
return ret;
}
/*****************************************************************************
函 数 名 : spm_alloc_vpls_uni_cb
功能描述 : 申请VPLS条目UNI配置的内存空间
输入参数 : NBB_CCXT_T NBB_CXT
输出参数 : 无
返 回 值 : SPM_VPLS_UNI_CB
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2016年1月23日
作 者 : huxl
修改内容 : 新生成函数
*****************************************************************************/
SPM_VPLS_UNI_CB * spm_alloc_vpls_uni_cb(NBB_CXT_T NBB_CXT)
{
SPM_VPLS_UNI_CB *pst_vpls_uni_cb = NULL;
NBB_TRC_ENTRY("__FUNCTION__");
/* 分配一个新的VPLS_NNI配置条目。*/
pst_vpls_uni_cb = (SPM_VPLS_UNI_CB *)NBB_MM_ALLOC(sizeof(SPM_VPLS_UNI_CB),
NBB_NORETRY_ACT, MEM_SPM_VPLS_UNI_CB);
if (pst_vpls_uni_cb == NULL)
{
goto EXIT_LABEL;
}
/* 初始化VPLS_UNI配置条目 */
OS_MEMSET(pst_vpls_uni_cb, 0, sizeof(SPM_VPLS_UNI_CB));
/* 建立用于该VPLS_UNI配置条目的句柄，作为异步消息交换的相关器。*/
pst_vpls_uni_cb->spm_vpls_uni_handle = NBB_CREATE_HANDLE(pst_vpls_uni_cb, HDL_SPM_VPLS_UNI_CB);
/* 成功分配一个新的VPLS_UNI配置条目。*/
NBB_TRC_DETAIL((NBB_FORMAT "SPM_VPLS_UNI_CB allocated at %p with handle %#lx",
pst_vpls_uni_cb, pst_vpls_uni_cb->spm_vpls_uni_handle));
/* Initialize the AVLL node. */
AVLL_INIT_NODE(pst_vpls_uni_cb->spm_vpls_uni_node);
EXIT_LABEL : NBB_TRC_EXIT();
return(pst_vpls_uni_cb);
}
/*
* Send Keepalive command to FW to probe a single associated station.
* Make sure the client is awake before sending RTT measurement command.
*/
void
ol_ath_rtt_keepalive_req(wmi_unified_t wmi_handle, struct ieee80211vap *vap,
struct ieee80211_node *ni, bool stop)
{
static u_int16_t req_id = 1;
wmi_buf_t buf;
wmi_rtt_keepalive_cmd *cmd;
int ret;
u_int16_t len;
u_int8_t *ptr;
struct ieee80211com *ic = NULL;
struct ol_ath_softc_net80211 *scn = NULL;
if (!vap || !ni) {
adf_os_print("%s: Invalid parameter\n", __func__);
req_id++;
return;
}
ic = ni->ni_ic;
scn = OL_ATH_SOFTC_NET80211(ic);
wmi_handle = scn->wmi_handle;
if (!wmi_handle || vap!=ni->ni_vap) {
adf_os_print("%s: Invalid parameter\n", __func__);
req_id++;
return;
}
len = sizeof(wmi_rtt_keepalive_cmd);
buf = wmi_buf_alloc(wmi_handle, len);
if(!buf) {
adf_os_print("No WMI resource\n");
return;
}
ptr = (u_int8_t *)wmi_buf_data(buf);
OS_MEMSET(ptr, 0, len);
cmd = (wmi_rtt_keepalive_cmd *)wmi_buf_data(buf);
WMI_RTT_REQ_ID_SET(cmd->req_id, req_id);
WMI_RTT_KEEPALIVE_ACTION_SET(cmd->req_id, stop);
WMI_RTT_VDEV_ID_SET(cmd->probe_info, (OL_ATH_VAP_NET80211(vap))->av_if_id);
/* 3ms probe interval by default */
WMI_RTT_KEEPALIVE_PERIOD_SET(cmd->probe_info, 3);
/* max retry of 50 by default */
WMI_RTT_TIMEOUT_SET(cmd->probe_info, 20);
/* set frame type */
WMI_RTT_FRAME_TYPE_SET(cmd->control_flag, RTT_MEAS_FRAME_KEEPALIVE);
WMI_CHAR_ARRAY_TO_MAC_ADDR(ni->ni_macaddr, &cmd->sta_mac);
ret = wmi_unified_cmd_send(wmi_handle, buf, len, WMI_RTT_KEEPALIVE_CMDID);
adf_os_print("send rtt keepalive cmd to FW with length %d and return %d\n", len, ret);
req_id++;
return;
}
/*
* Process an Owl-style phy error.
*
* Return 1 on success or 0 on failure.
*/
int
dfs_process_phyerr_owl(struct ath_dfs *dfs, void *buf, uint16_t datalen,
uint8_t rssi, uint8_t ext_rssi, uint32_t rs_tstamp,
uint64_t fulltsf, struct dfs_phy_err *e)
{
const char *cbuf = (const char *)buf;
uint8_t dur;
int event_width;
/* XXX this shouldn't be kept count here */
dfs->ath_dfs_stats.owl_phy_errors++;
/*
* HW cannot detect extension channel radar so it only passes us
* primary channel radar data
*/
if (datalen == 0)
dur = 0;
else
dur = ((uint8_t *) cbuf)[0];
/*
* This is a spurious event; toss.
*/
if (rssi == 0 && dur == 0)
dfs->ath_dfs_stats.datalen_discards++;
return 0;
/*
* Fill out dfs_phy_err with the information we have
* at hand.
*/
OS_MEMSET(e, 0, sizeof(*e));
e->rssi = rssi;
e->dur = dur;
e->is_pri = 1;
e->is_ext = 0;
e->is_dc = 0;
e->is_early = 1;
e->fulltsf = fulltsf;
e->rs_tstamp = rs_tstamp;
/*
* Owl only ever reports events on the primary channel;
* it doesn't even see events on the secondary channel.
*/
event_width = dfs_get_event_freqwidth(dfs);
e->freq = dfs_get_event_freqcentre(dfs, 1, 0, 0) * 1000;
e->freq_lo = e->freq - (event_width / 2) * 1000;
e->freq_hi = e->freq + (event_width / 2) * 1000;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR_SUM,
"%s: rssi=%u dur=%u,freq=%dMHz, freq_lo=%dMHz, freq_hi=%dMHz\n",
__func__, rssi, dur, e->freq / 1000, e->freq_lo / 1000,
e->freq_hi / 1000);
return 1;
}
void ath_clear_audio_channel_list(struct ieee80211com *ic, u_int32_t val)
{
struct ath_softc_net80211 *scn = ATH_SOFTC_NET80211(ic);
struct ath_softc *sc = ATH_DEV_TO_SC(scn->sc_dev);
int i = 0;
int j = 0;
int k = 0;
/* clear the mapped receiver count */
sc->sc_aow.mapped_recv_cnt = 0;
if (val < 0) {
IEEE80211_AOW_DPRINTF("AoW Error: Invalid channel index\n");
return;
}
if (val < AOW_MAX_AUDIO_CHANNELS) {
sc->sc_aow.chan_addr[val].channel = 0;
sc->sc_aow.chan_addr[val].valid = AH_FALSE;
sc->sc_aow.chan_addr[val].seqno = 0;
sc->sc_aow.chan_addr[val].dst_cnt = 0;
for ( k = 0; k < AOW_MAX_RECEIVER_COUNT; k++) {
OS_MEMSET(&sc->sc_aow.chan_addr[val].addr[k], 0x00, sizeof(struct ether_addr));
}
/* clear the set channel map */
ic->ic_aow.channel_set_flag &= ~(1 << val);
} else {
for (i = 0; i < AOW_MAX_AUDIO_CHANNELS; i++) {
sc->sc_aow.chan_addr[i].channel = 0;
sc->sc_aow.chan_addr[i].valid = AH_FALSE;
sc->sc_aow.chan_addr[i].seqno = 0;
sc->sc_aow.chan_addr[i].dst_cnt = 0;
for (j = 0; j < AOW_MAX_RECEIVER_COUNT; j++)
OS_MEMSET(&sc->sc_aow.chan_addr[i].addr[j], 0x00, sizeof(struct ether_addr));
}
/* clear the set channel map */
ic->ic_aow.channel_set_flag = 0;
}
}
static __inline__ mi_node_t *
mi_node_alloc(void)
{
mi_node_t *fn;
if ((fn = (mi_node_t *)OS_MALLOC(NULL, sizeof(mi_node_t), GFP_KERNEL)) != NULL) {
OS_MEMSET(fn, 0, sizeof(mi_node_t));
}
return fn;
}
/* Copies the video quality info to the cache */
void copy_vq_tnc(igd_ovl_info_t *ovl_info, povl_tnc_cache_t ovl_cache)
{
if (ovl_info) {
OS_MEMCPY(&ovl_cache->ovl_info.video_quality,
&(ovl_info->video_quality),
sizeof(igd_ovl_video_quality_info_t));
} else {
OS_MEMSET(&ovl_cache->ovl_info.video_quality,
0,
sizeof(igd_ovl_video_quality_info_t));
}
}
/* Copies the color key to the cache */
void copy_color_key_tnc( igd_ovl_info_t *ovl_info, povl_tnc_cache_t ovl_cache)
{
if (ovl_info) {
OS_MEMCPY(&ovl_cache->ovl_info.color_key,
&(ovl_info->color_key),
sizeof(igd_ovl_color_key_info_t));
} else {
OS_MEMSET(&ovl_cache->ovl_info.color_key,
0,
sizeof(igd_ovl_color_key_info_t));
}
}
/* Copies a surface to the cache */
void copy_surf_tnc(igd_surface_t *src_surf, povl_tnc_cache_t ovl_cache)
{
if (src_surf) {
OS_MEMCPY(&ovl_cache->src_surf,
src_surf,
sizeof(igd_surface_t));
} else {
OS_MEMSET(&ovl_cache->src_surf,
0,
sizeof(igd_surface_t));
}
}
/* Copies a dest rectangle to the cache */
void copy_dest_rect_tnc( igd_rect_t *dest_rect, povl_tnc_cache_t ovl_cache)
{
if (dest_rect) {
OS_MEMCPY(&ovl_cache->dest_rect,
dest_rect,
sizeof(igd_rect_t));
} else {
OS_MEMSET(&ovl_cache->dest_rect,
0,
sizeof(igd_rect_t));
}
}
/* Copies a source rectangle to the cache */
void copy_src_rect_tnc(igd_rect_t *src_rect, povl_tnc_cache_t ovl_cache)
{
if (src_rect) {
OS_MEMCPY(&ovl_cache->src_rect,
src_rect,
sizeof(igd_rect_t));
} else {
OS_MEMSET(&ovl_cache->src_rect,
0,
sizeof(igd_rect_t));
}
}
/* Copies the gamma to the cache */
void copy_gamma_tnc(igd_ovl_info_t *ovl_info, povl_tnc_cache_t ovl_cache)
{
if (ovl_info) {
OS_MEMCPY(&ovl_cache->ovl_info.gamma,
&(ovl_info->gamma),
sizeof(igd_ovl_gamma_info_t));
} else {
OS_MEMSET(&ovl_cache->ovl_info.gamma,
0,
sizeof(igd_ovl_gamma_info_t));
}
}
/**
* dbiCreateIntance
*
*/
static IEC_UINT dbiCreateIntance(SDBIInstance **ppInst)
{
*ppInst = (SDBIInstance *)osMalloc(sizeof(SDBIInstance));
if (*ppInst == NULL)
{
RETURN(ERR_OUT_OF_MEMORY);
}
OS_MEMSET(*ppInst, 0x00, sizeof(SDBIInstance));
RETURN(OK);
}
/**
* osInitialize
*
* Do operating system dependent on time initializations here.
*
* @return OK if successful else error number.
*/
IEC_UINT osInitialize(void)
{
IEC_UINT uRes = OK;
OS_MEMSET(&g_hVM, 0x00, sizeof(g_hVM));
uRes = osInitializeShared();
if (uRes != OK)
{
RETURN(uRes);
}
RETURN(uRes);
}
void ieee80211_prdperfstat_thrput_start(struct ieee80211com *ic)
{
struct ieee80211_prdperfstat_thrput *thrput = &ic->ic_thrput;
OS_MEMSET(thrput->histogram, 0, thrput->histogram_size * sizeof(u_int32_t));
thrput->histogram_head = 0;
thrput->histogram_tail = 0;
thrput->is_histogram_full = 0;
thrput->histogram_bytecount = 0;
thrput->curr_bytecount = 0;
thrput->last_save_ms = OS_GET_TIMESTAMP();
thrput->timer_count = 0;
thrput->is_started = 1;
}
/**
* visLogout
*
* Logout from a connected remote ATCMControl Run Time System.
*
* Important: After calling this function, any stored ATCMControl interpreter
* addresses must be abandoned and reloaded after a new login.
*
* return OK if successful, else error number.
*/
VIS_UINT visLogout(void)
{
SVisInfo *pVI = &g_VI;
IEC_UINT uRes = OK;
if (pVI->bInitialized == FALSE)
{
RETURN(ERR_INIT);
}
uRes = domLogout(pVI);
pVI->bLogin = FALSE;
OS_MEMSET(pVI->pProjectID, 0x00, VMM_GUID);
RETURN(uRes);
}
/**
* osGetStat
*
*/
IEC_UINT osGetStat(SProcTime *pPT)
{
IEC_UINT uRes = OK;
#if defined(RTS_CFG_LINUX)
IEC_UDINT hFile = 0;
IEC_CHAR szBuff[2048];
uRes = fileOpen(&hFile, FILE_STAT, FIO_MODE_READ, TRUE);
if (uRes != OK)
{
RETURN(uRes);
}
uRes = fileReadLine(hFile, szBuff, sizeof(szBuff));
if (uRes != OK)
{
fileClose(hFile);
RETURN(uRes);
}
fileClose(hFile);
/* User | Nice | System | Idle
* (in jiffies)
*/
uRes = (IEC_UINT)OS_SSCANF(szBuff, "cpu %u %u %u %u", &pPT->ulUser, &pPT->ulNice, &pPT->ulSyst, &pPT->ulIdle);
if (uRes != 4)
{
RETURN(ERR_INVALID_DATA);
}
uRes = OK;
#else
OS_MEMSET(pPT, 0x00, sizeof(SProcTime));
#endif
RETURN(uRes);
}
/*****************************************************************************
函 数 名 : spm_alloc_vpls_cb
功能描述 : 申请VPLS条目的内存空间
输入参数 : NBB_CCXT_T NBB_CXT
输出参数 : 无
返 回 值 : SPM_VPLS_CB
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2012年10月30日
作 者 : xiaoxiang
修改内容 : 新生成函数
*****************************************************************************/
SPM_VPLS_CB * spm_alloc_vpls_cb(NBB_CXT_T NBB_CXT)
{
NBB_INT i = 0;
SPM_VPLS_CB *pstVpls = NULL;
NBB_TRC_ENTRY("spm_alloc_vpls_cb");
/* 分配一个新的VPWS配置条目。*/
pstVpls = (SPM_VPLS_CB *)NBB_MM_ALLOC(sizeof(SPM_VPLS_CB), NBB_NORETRY_ACT, MEM_SPM_VPLS_CB);
if (pstVpls == NULL)
{
goto EXIT_LABEL;
}
/* 初始化VPWS配置条目 */
OS_MEMSET(pstVpls, 0, sizeof(SPM_VPLS_CB));
pstVpls->basic_cfg_cb = NULL;
//初始化NNI配置树
AVLL_INIT_TREE(pstVpls->nni_cfg_tree, compare_ushort,
(NBB_USHORT)NBB_OFFSETOF(SPM_VPLS_NNI_CB, nni_no),
(NBB_USHORT)NBB_OFFSETOF(SPM_VPLS_NNI_CB, spm_vpls_nni_node));
//初始化UNI配置树
AVLL_INIT_TREE(pstVpls->uni_cfg_tree, compare_ushort,
(NBB_USHORT)NBB_OFFSETOF(SPM_VPLS_UNI_CB, uni_no),
(NBB_USHORT)NBB_OFFSETOF(SPM_VPLS_UNI_CB, spm_vpls_uni_node));
/* 建立用于该VC表配置条目的句柄，作为异步消息交换的相关器。*/
pstVpls->spm_vpls_handle = NBB_CREATE_HANDLE(pstVpls, HDL_SPM_VPLS_CB);
/* 成功分配一个新的VPLS配置条目。*/
NBB_TRC_DETAIL((NBB_FORMAT "SPM_VPLS_CB allocated at %p with handle %#lx",
pstVpls, pstVpls->spm_vpls_handle));
/* Initialize the AVLL node. */
AVLL_INIT_NODE(pstVpls->spm_vpls_node);
EXIT_LABEL : NBB_TRC_EXIT();
return(pstVpls);
}
void ieee80211_prdperfstat_per_start(struct ieee80211com *ic)
{
struct ieee80211_prdperfstat_per *per = &ic->ic_per;
OS_MEMSET(per->histogram,
0,
per->histogram_size * sizeof(struct per_components));
per->histogram_head = 0;
per->histogram_tail = 0;
per->is_histogram_full = 0;
per->histogram_hw_retries = 0;
per->histogram_hw_success = 0;
per->last_save_hw_retries = ic->ic_get_tx_hw_retries(ic);
per->last_save_hw_success = ic->ic_get_tx_hw_success(ic);
per->timer_count = 0;
per->is_started = 1;
}
/**
* visCreateVisuVar
*
* Creates an empty VisuComm variable (XVisuVar object) which can be used as a
* root element in order to retrieve the children of the IEC project on the
* highest level.
*
* If the provided pointer is not NULL the old memory is freed by this function.
* The memory allocated by this function must be freed by using the visFree()
* function.
*
* IO ppDBIVar I Pointer to an old VisuComm object (will be freed).
* O Pointer to an empty(root) VisuComm variable.
* Note: This function allocates memory for the result.
* This memory must be released by the caller!
*
* IO upDBIVar I Length (in bytes) of VisuComm variable.
* O Length (in bytes) of VisuComm variable.
*
* return OK if successful else error number.
*
*/
VIS_UINT visCreateVisuVar(VIS_DATA **ppDBIVar, VIS_UINT *upDBIVar)
{
if (*ppDBIVar != NULL)
{
visFree(ppDBIVar);
}
*upDBIVar = sizeof(XDBIVar) + 1;
*ppDBIVar = visAlloc(*upDBIVar);
if (*ppDBIVar == NULL)
{
RETURN(ERR_OUT_OF_MEMORY);
}
OS_MEMSET(*ppDBIVar, 0x00, *upDBIVar);
((XVisuVar *)*ppDBIVar)->xVar.uInst = 0xFFFFu;
RETURN(OK);
}
void ieee80211_distroy_blacklist(void)
{
OS_MEMSET(openessid_blacklist, '\0', sizeof(openessid_blacklist));
blacklist_cnt = 0;
}
void ieee80211_distroy_whitelist(void)
{
OS_MEMSET(openessid_whitelist, '\0', sizeof(openessid_whitelist));
whitelist_cnt = 0;
}
void
dfs_process_phyerr(struct ieee80211com *ic, void *buf, uint16_t datalen,
uint8_t r_rssi, uint8_t r_ext_rssi, uint32_t r_rs_tstamp,
uint64_t r_fulltsf, bool enable_log)
{
struct ath_dfs *dfs = (struct ath_dfs *)ic->ic_dfs;
struct dfs_ieee80211_channel *chan = ic->ic_curchan;
struct dfs_event *event;
struct dfs_phy_err e;
int empty;
if (dfs == NULL) {
CDF_TRACE(CDF_MODULE_ID_SAP, CDF_TRACE_LEVEL_ERROR,
"%s: sc_dfs is NULL\n", __func__);
return;
}
dfs->dfs_phyerr_count++;
dump_phyerr_contents(buf, datalen);
/*
* XXX The combined_rssi_ok support has been removed.
* This was only clear for Owl.
*
* XXX TODO: re-add this; it requires passing in the ctl/ext
* RSSI set from the RX status descriptor.
*
* XXX TODO TODO: this may be done for us from the legacy
* phy error path in ath_dev; please review that code.
*/
/*
* At this time we have a radar pulse that we need to examine and
* queue. But if dfs_process_radarevent already detected radar and set
* CHANNEL_INTERFERENCE flag then do not queue any more radar data.
* When we are in a new channel this flag will be clear and we will
* start queueing data for new channel. (EV74162)
*/
if (dfs->dfs_debug_mask & ATH_DEBUG_DFS_PHYERR_PKT)
dump_phyerr_contents(buf, datalen);
if (chan == NULL) {
CDF_TRACE(CDF_MODULE_ID_SAP, CDF_TRACE_LEVEL_ERROR,
"%s: chan is NULL\n", __func__);
return;
}
cdf_spin_lock_bh(&ic->chan_lock);
if (IEEE80211_IS_CHAN_RADAR(chan)) {
cdf_spin_unlock_bh(&ic->chan_lock);
DFS_DPRINTK(dfs, ATH_DEBUG_DFS1,
"%s: Radar already found in the channel, "
" do not queue radar data\n", __func__);
return;
}
cdf_spin_unlock_bh(&ic->chan_lock);
dfs->ath_dfs_stats.total_phy_errors++;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS2,
"%s[%d] phyerr %d len %d\n",
__func__, __LINE__,
dfs->ath_dfs_stats.total_phy_errors, datalen);
/*
* hardware stores this as 8 bit signed value.
* we will cap it at 0 if it is a negative number
*/
if (r_rssi & 0x80)
r_rssi = 0;
if (r_ext_rssi & 0x80)
r_ext_rssi = 0;
OS_MEMSET(&e, 0, sizeof(e));
/*
* This is a bit evil - instead of just passing in
* the chip version, the existing code uses a set
* of HAL capability bits to determine what is
* possible.
*
* The way I'm decoding it is thus:
*
* + DFS enhancement? Merlin or later
* + DFS extension channel? Sowl or later. (Howl?)
* + otherwise, Owl (and legacy.)
*/
if (dfs->dfs_caps.ath_chip_is_bb_tlv) {
if (dfs_process_phyerr_bb_tlv(dfs, buf, datalen, r_rssi,
r_ext_rssi, r_rs_tstamp,
r_fulltsf, &e,
enable_log) == 0) {
dfs->dfs_phyerr_reject_count++;
return;
} else {
if (dfs->dfs_phyerr_freq_min > e.freq)
dfs->dfs_phyerr_freq_min = e.freq;
if (dfs->dfs_phyerr_freq_max < e.freq)
dfs->dfs_phyerr_freq_max = e.freq;
}
} else if (dfs->dfs_caps.ath_dfs_use_enhancement) {
if (dfs_process_phyerr_merlin(dfs, buf, datalen, r_rssi,
r_ext_rssi, r_rs_tstamp,
r_fulltsf, &e) == 0) {
return;
}
} else if (dfs->dfs_caps.ath_dfs_ext_chan_ok) {
if (dfs_process_phyerr_sowl(dfs, buf, datalen, r_rssi,
r_ext_rssi, r_rs_tstamp, r_fulltsf,
&e) == 0) {
return;
}
} else {
if (dfs_process_phyerr_owl(dfs, buf, datalen, r_rssi,
r_ext_rssi, r_rs_tstamp, r_fulltsf,
&e) == 0) {
return;
}
}
CDF_TRACE(CDF_MODULE_ID_SAP, CDF_TRACE_LEVEL_INFO,
"\n %s: Frequency at which the phyerror was injected = %d",
__func__, e.freq);
/*
* If the hardware supports radar reporting on the extension channel
* it will supply FFT data for longer radar pulses.
*
* TLV chips don't go through this software check - the hardware
* check should be enough. If we want to do software checking
* later on then someone will have to craft an FFT parser
* suitable for the TLV FFT data format.
*/
if ((!dfs->dfs_caps.ath_chip_is_bb_tlv) &&
dfs->dfs_caps.ath_dfs_ext_chan_ok) {
/*
* HW has a known issue with chirping pulses injected at or
* around DC in 40MHz mode. Such pulses are reported with
* much lower durations and SW then discards them because
* they do not fit the minimum bin5 pulse duration.
*
* To work around this issue, if a pulse is within a 10us
* range of the bin5 min duration, check if the pulse is
* chirping. If the pulse is chirping, bump up the duration
* to the minimum bin5 duration.
*
* This makes sure that a valid chirping pulse will not be
* discarded because of incorrect low duration.
*
* TBD - Is it possible to calculate the 'real' duration of
* the pulse using the slope of the FFT data?
*
* TBD - Use FFT data to differentiate between radar pulses
* and false PHY errors.
* This will let us reduce the number of false alarms seen.
*
* BIN 5 chirping pulses are only for FCC or Japan MMK4 domain
*/
if (((dfs->dfsdomain == DFS_FCC_DOMAIN) ||
(dfs->dfsdomain == DFS_MKK4_DOMAIN)) &&
(e.dur >= MAYBE_BIN5_DUR) && (e.dur < MAX_BIN5_DUR)) {
int add_dur;
int slope = 0, dc_found = 0;
/*
* Set the event chirping flags; as we're doing
* an actual chirp check.
*/
e.do_check_chirp = 1;
e.is_hw_chirp = 0;
e.is_sw_chirp = 0;
/*
* dfs_check_chirping() expects is_pri and is_ext
* to be '1' for true and '0' for false for now,
* as the function itself uses these values in
* constructing things rather than testing them
* for 'true' or 'false'.
*/
add_dur = dfs_check_chirping(dfs, buf, datalen,
(e.is_pri ? 1 : 0),
(e.is_ext ? 1 : 0),
&slope, &dc_found);
if (add_dur) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"old dur %d slope =%d\n", e.dur,
slope);
e.is_sw_chirp = 1;
/* bump up to a random bin5 pulse duration */
if (e.dur < MIN_BIN5_DUR) {
e.dur = dfs_get_random_bin5_dur(dfs,
e.fulltsf);
}
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"new dur %d\n", e.dur);
} else {
/* set the duration so that it is rejected */
e.is_sw_chirp = 0;
e.dur = MAX_BIN5_DUR + 100;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"is_chirping = %d dur=%d\n",
add_dur, e.dur);
}
} else {
/*
* We have a pulse that is either bigger than
* MAX_BIN5_DUR or * less than MAYBE_BIN5_DUR
*/
if ((dfs->dfsdomain == DFS_FCC_DOMAIN) ||
(dfs->dfsdomain == DFS_MKK4_DOMAIN)) {
/*
* XXX Would this result in very large pulses
* wrapping around to become short pulses?
*/
if (e.dur >= MAX_BIN5_DUR) {
/*
* set the duration so that it is
* rejected
*/
e.dur = MAX_BIN5_DUR + 50;
}
}
}
}
/*
* Add the parsed, checked and filtered entry to the radar pulse
* event list. This is then checked by dfs_radar_processevent().
*
* XXX TODO: some filtering is still done below this point - fix
* XXX this!
*/
ATH_DFSEVENTQ_LOCK(dfs);
empty = STAILQ_EMPTY(&(dfs->dfs_eventq));
ATH_DFSEVENTQ_UNLOCK(dfs);
if (empty) {
return;
}
/*
* If the channel is a turbo G channel, then the event is
* for the adaptive radio (AR) pattern matching rather than
* radar detection.
*/
cdf_spin_lock_bh(&ic->chan_lock);
if ((chan->ic_flags & CHANNEL_108G) == CHANNEL_108G) {
cdf_spin_unlock_bh(&ic->chan_lock);
if (!(dfs->dfs_proc_phyerr & DFS_AR_EN)) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS2,
"%s: DFS_AR_EN not enabled\n", __func__);
return;
}
ATH_DFSEVENTQ_LOCK(dfs);
event = STAILQ_FIRST(&(dfs->dfs_eventq));
if (event == NULL) {
ATH_DFSEVENTQ_UNLOCK(dfs);
DFS_DPRINTK(dfs, ATH_DEBUG_DFS,
"%s: no more events space left\n",
__func__);
return;
}
STAILQ_REMOVE_HEAD(&(dfs->dfs_eventq), re_list);
ATH_DFSEVENTQ_UNLOCK(dfs);
event->re_rssi = e.rssi;
event->re_dur = e.dur;
event->re_full_ts = e.fulltsf;
event->re_ts = (e.rs_tstamp) & DFS_TSMASK;
event->re_chanindex = dfs->dfs_curchan_radindex;
event->re_flags = 0;
event->sidx = e.sidx;
/*
* Handle chirp flags.
*/
if (e.do_check_chirp) {
event->re_flags |= DFS_EVENT_CHECKCHIRP;
if (e.is_hw_chirp)
event->re_flags |= DFS_EVENT_HW_CHIRP;
if (e.is_sw_chirp)
event->re_flags |= DFS_EVENT_SW_CHIRP;
}
ATH_ARQ_LOCK(dfs);
STAILQ_INSERT_TAIL(&(dfs->dfs_arq), event, re_list);
ATH_ARQ_UNLOCK(dfs);
} else {
if (IEEE80211_IS_CHAN_DFS(chan)) {
cdf_spin_unlock_bh(&ic->chan_lock);
if (!(dfs->dfs_proc_phyerr & DFS_RADAR_EN)) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS3,
"%s: DFS_RADAR_EN not enabled\n",
__func__);
return;
}
/*
* rssi is not accurate for short pulses, so do
* not filter based on that for short duration pulses
*
* XXX do this filtering above?
*/
if (dfs->dfs_caps.ath_dfs_ext_chan_ok) {
if ((e.rssi < dfs->dfs_rinfo.rn_minrssithresh &&
(e.dur > 4)) ||
e.dur > (dfs->dfs_rinfo.rn_maxpulsedur)) {
dfs->ath_dfs_stats.rssi_discards++;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS1,
"Extension channel pulse is "
"discarded: dur=%d, "
"maxpulsedur=%d, rssi=%d, "
"minrssi=%d\n",
e.dur,
dfs->dfs_rinfo.
rn_maxpulsedur, e.rssi,
dfs->dfs_rinfo.
rn_minrssithresh);
return;
}
} else {
if (e.rssi < dfs->dfs_rinfo.rn_minrssithresh ||
e.dur > dfs->dfs_rinfo.rn_maxpulsedur) {
/* XXX TODO add a debug statement? */
dfs->ath_dfs_stats.rssi_discards++;
return;
}
}
/*
* Add the event to the list, if there's space.
*/
ATH_DFSEVENTQ_LOCK(dfs);
event = STAILQ_FIRST(&(dfs->dfs_eventq));
if (event == NULL) {
ATH_DFSEVENTQ_UNLOCK(dfs);
DFS_DPRINTK(dfs, ATH_DEBUG_DFS,
"%s: no more events space left\n",
__func__);
return;
}
STAILQ_REMOVE_HEAD(&(dfs->dfs_eventq), re_list);
ATH_DFSEVENTQ_UNLOCK(dfs);
dfs->dfs_phyerr_queued_count++;
dfs->dfs_phyerr_w53_counter++;
event->re_dur = e.dur;
event->re_full_ts = e.fulltsf;
event->re_ts = (e.rs_tstamp) & DFS_TSMASK;
event->re_rssi = e.rssi;
event->sidx = e.sidx;
/*
* Handle chirp flags.
*/
if (e.do_check_chirp) {
event->re_flags |= DFS_EVENT_CHECKCHIRP;
if (e.is_hw_chirp)
event->re_flags |= DFS_EVENT_HW_CHIRP;
if (e.is_sw_chirp)
event->re_flags |= DFS_EVENT_SW_CHIRP;
}
/*
* Correctly set which channel is being reported on
*/
if (e.is_pri) {
event->re_chanindex = dfs->dfs_curchan_radindex;
} else {
if (dfs->dfs_extchan_radindex == -1) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"%s - phyerr on ext channel\n",
__func__);
}
event->re_chanindex = dfs->dfs_extchan_radindex;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"%s New extension channel event is added "
"to queue\n", __func__);
}
ATH_DFSQ_LOCK(dfs);
STAILQ_INSERT_TAIL(&(dfs->dfs_radarq), event, re_list);
ATH_DFSQ_UNLOCK(dfs);
} else {
cdf_spin_unlock_bh(&ic->chan_lock);
}
}
/*
* Schedule the radar/AR task as appropriate.
*
* XXX isn't a lock needed for ath_radar_tasksched?
*/
/*
* Commenting out the dfs_process_ar_event() since the function is never
* called at run time as dfs_arq will be empty and the function
* dfs_process_ar_event is obsolete and function definition is removed
* as part of dfs_ar.c file
*
* if (!STAILQ_EMPTY(&dfs->dfs_arq))
* // XXX shouldn't this be a task/timer too?
* dfs_process_ar_event(dfs, ic->ic_curchan);
*/
if (!STAILQ_EMPTY(&dfs->dfs_radarq) && !dfs->ath_radar_tasksched) {
dfs->ath_radar_tasksched = 1;
OS_SET_TIMER(&dfs->ath_dfs_task_timer, 0);
}
#undef EXT_CH_RADAR_FOUND
#undef PRI_CH_RADAR_FOUND
#undef EXT_CH_RADAR_EARLY_FOUND
}
/*
* Process a Sowl/Howl style phy error.
*/
int
dfs_process_phyerr_sowl(struct ath_dfs *dfs, void *buf, uint16_t datalen,
uint8_t rssi, uint8_t ext_rssi, uint32_t rs_tstamp,
uint64_t fulltsf, struct dfs_phy_err *e)
{
#define EXT_CH_RADAR_FOUND 0x02
#define PRI_CH_RADAR_FOUND 0x01
#define EXT_CH_RADAR_EARLY_FOUND 0x04
const char *cbuf = (const char *)buf;
uint8_t dur = 0;
uint8_t pulse_bw_info, pulse_length_ext, pulse_length_pri;
int pri_found = 0, ext_found = 0;
int early_ext = 0;
int event_width;
/*
* If radar can be detected on the extension channel, datalen zero
* pulses are bogus, discard them.
*/
if (!datalen) {
dfs->ath_dfs_stats.datalen_discards++;
return 0;
}
/* Ensure that we have at least three bytes of payload */
if (datalen < 3) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS,
"%s: short error frame (%d bytes)\n",
__func__, datalen);
dfs->ath_dfs_stats.datalen_discards++;
return 0;
}
/*
* Fetch the payload directly - the compiler will happily generate
* byte-read instructions with a const char * cbuf pointer.
*/
pulse_length_pri = cbuf[datalen - 3];
pulse_length_ext = cbuf[datalen - 2];
pulse_bw_info = cbuf[datalen - 1];
/*
* Only the last 3 bits of the BW info are relevant, they indicate
* which channel the radar was detected in.
*/
pulse_bw_info &= 0x07;
/*
* If pulse on DC, both primary and extension flags will be set
*/
if (((pulse_bw_info & EXT_CH_RADAR_FOUND) &&
(pulse_bw_info & PRI_CH_RADAR_FOUND))) {
/*
* Conducted testing, when pulse is on DC, both
* pri and ext durations are reported to be same.
*
* Radiated testing, when pulse is on DC, different
* pri and ext durations are reported, so take the
* larger of the two
*/
if (pulse_length_ext >= pulse_length_pri) {
dur = pulse_length_ext;
ext_found = 1;
} else {
dur = pulse_length_pri;
pri_found = 1;
}
dfs->ath_dfs_stats.dc_phy_errors++;
} else {
if (pulse_bw_info & EXT_CH_RADAR_FOUND) {
dur = pulse_length_ext;
pri_found = 0;
ext_found = 1;
dfs->ath_dfs_stats.ext_phy_errors++;
}
if (pulse_bw_info & PRI_CH_RADAR_FOUND) {
dur = pulse_length_pri;
pri_found = 1;
ext_found = 0;
dfs->ath_dfs_stats.pri_phy_errors++;
}
if (pulse_bw_info & EXT_CH_RADAR_EARLY_FOUND) {
dur = pulse_length_ext;
pri_found = 0;
ext_found = 1;
early_ext = 1;
dfs->ath_dfs_stats.early_ext_phy_errors++;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"EARLY ext channel dur=%u rssi=%u datalen=%d\n",
dur, rssi, datalen);
}
if (!pulse_bw_info) {
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR,
"dur=%u rssi=%u bw_info=0x%x datalen = %d\n",
dur, rssi, pulse_bw_info, (datalen & 0x3));
/*
* Bogus bandwidth info received in descriptor,
* so ignore this PHY error
*/
dfs->ath_dfs_stats.bwinfo_errors++;
return 0;
}
}
/*
* Always use combined RSSI reported, unless RSSI reported on
* extension is stronger
*/
if ((ext_rssi > rssi) && (ext_rssi < 128))
rssi = ext_rssi;
/*
* Fill out the rssi/duration fields from above.
*/
OS_MEMSET(e, 0, sizeof(*e));
e->rssi = rssi;
e->dur = dur;
e->is_pri = pri_found;
e->is_ext = ext_found;
e->is_dc = !!(((pulse_bw_info & EXT_CH_RADAR_FOUND) &&
(pulse_bw_info & PRI_CH_RADAR_FOUND)));
e->is_early = early_ext;
e->fulltsf = fulltsf;
e->rs_tstamp = rs_tstamp;
/*
* Sowl and later can report pri/ext events.
*/
event_width = dfs_get_event_freqwidth(dfs);
e->freq = dfs_get_event_freqcentre(dfs, e->is_pri, e->is_ext, e->is_dc)
* 1000;
e->freq_lo = e->freq - (event_width / 2) * 1000;
e->freq_hi = e->freq + (event_width / 2) * 1000;
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR_SUM,
"%s: pulse_bw_info=0x%x pulse_length_ext=%u pulse_length_pri=%u "
"rssi=%u ext_rssi=%u, freq=%d MHz, freq_lo=%d MHz, "
"freq_hi=%d MHz\n",
__func__,
pulse_bw_info,
pulse_length_ext,
pulse_length_pri,
rssi,
ext_rssi,
e->freq / 1000, e->freq_lo / 1000, e->freq_hi / 1000);
return 1;
}
NBB_INT spm_arp_basic_data_proc(ATG_DCI_SET_ARP *pst_set_arp,NBB_ULONG ul_oper_basic,
SPM_ARP_CB *pst_arp)
{
NBB_CHAR uc_message[SPM_MSG_INFO_LEN];
NBB_INT ret = SUCCESS;
ATG_DCI_ARP_BASIC_DATA *pst_basic_data = NULL;
NBB_BYTE *puc_basic_data_start = NULL;
ARP_T stArp;
NBB_TRC_ENTRY("spm_vc_basic_data_proc");
if (NULL == pst_set_arp)
{
return ADD_ARP_BASIC_ARP_IPS_IS_NULL;
}
if (NULL == pst_arp)
{
return ADD_ARP_BASIC_ARP_CFG_IS_NULL;
}
OS_MEMSET(&stArp,0,sizeof(ARP_T));
if(ATG_DCI_OPER_ADD == ul_oper_basic)
{
/* 计算第一个entry的地址。*/
puc_basic_data_start = (NBB_BYTE *)NTL_OFFLEN_GET_POINTER(pst_set_arp, &pst_set_arp->basic_data);
/* 如果指针为NULL，无数据 */
if (puc_basic_data_start == NULL)
{
return ADD_ARP_BASIC_DATA_START_IS_NULL;
}
else
{
pst_basic_data = (ATG_DCI_ARP_BASIC_DATA *)puc_basic_data_start;
if (arp_cfg_print_setting == SPM_PRINT_CFG)
{
printf(" 1）基本配置\n");
spm_dbg_print_arp_basic_cfg(pst_basic_data);
}
OS_SPRINTF(uc_message, " 1）基本配置\n");
BMU_SLOG(BMU_INFO, SPM_L2_LOG_DIR, uc_message);
spm_dbg_record_arp_basic_cfg(pst_basic_data);
//先保存配置
if (pst_arp->basic_cfg_cb == NULL)
{
pst_arp->basic_cfg_cb = (ATG_DCI_ARP_BASIC_DATA *)NBB_MM_ALLOC(sizeof(ATG_DCI_ARP_BASIC_DATA),
NBB_NORETRY_ACT,
MEM_SPM_ARP_BASIC_CB);
if(NULL == pst_arp->basic_cfg_cb)
{
return ADD_ARP_BASIC_MEM_BASIC_NULL;
}
}
OS_MEMCPY(pst_arp->basic_cfg_cb, pst_basic_data, sizeof(ATG_DCI_ARP_BASIC_DATA));
ret = spm_arp_drv_add_arp(pst_arp);
}
}
return ret;
}
/*****************************************************************************
函 数 名 : spm_rcv_dci_set_arp
功能描述 : 处理ARP表的IPS消息
输入参数 : ATG_DCI_SET_ARP *pst_set_arp NBB_CCXT_T NBB_CXT
输出参数 : 无
返 回 值 :
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2012年11月10日
作 者 : xiaoxiang
修改内容 : 新生成函数
*****************************************************************************/
NBB_VOID spm_rcv_dci_set_arp(ATG_DCI_SET_ARP *pst_set_arp)
{
NBB_CHAR uc_message[SPM_MSG_INFO_LEN];
NBB_BYTE uc_messageLen = 0;
NBB_INT ret = SUCCESS;
NBB_BYTE ucC3Unit = 0;
SPM_ARP_CB *pst_arp = NULL;
SPM_LOGICAL_PORT_CB *pstLogicalPort = NULL;
NBB_ULONG ulOperBasic = ATG_DCI_OPER_NULL;
SPM_PORT_INFO_CB stPortInfo;
ATG_DCI_ARP_KEY stArpKey;
NBB_BYTE ucIfExist = ATG_DCI_EXIST;
NBB_TRC_ENTRY("spm_rcv_dci_set_arp");
/* 输入参数指针必须有效 */
NBB_ASSERT(pst_set_arp != NULL);
if (pst_set_arp == NULL)
{
ret = set_ARP_IPS_NULL;
goto EXIT_LABEL;
}
pst_set_arp->return_code = ATG_DCI_RC_OK;
pst_set_arp->basic_return_code = ATG_DCI_RC_OK;
OS_MEMSET(&stPortInfo, 0, sizeof(SPM_PORT_INFO_CB));
stArpKey.index = pst_set_arp->key.index;
stArpKey.ip_addr = pst_set_arp->key.ip_addr;
pst_arp = AVLL_FIND(SHARED.arp_tree, &stArpKey);
if (pst_arp == NULL)
{
ucIfExist = ATG_DCI_UNEXIST;
}
pstLogicalPort = AVLL_FIND(SHARED.logical_port_tree, &stArpKey.index);
if ((NULL == pstLogicalPort) || (NULL == pstLogicalPort->basic_cfg_cb))
{
ret = set_ARP_LOGICAL_PORT_NULL;
goto EXIT_LABEL;
}
if (ATG_DCI_L2 == pstLogicalPort->basic_cfg_cb->port_route_type)
{
ret = set_ARP_ROUTE_L2;
goto EXIT_LABEL;
}
/* 获取子配置操作 */
ulOperBasic = pst_set_arp->oper_basic;
//根据端口逻辑配置中的端口子类型，获取端口的port_id
spm_get_portid_from_logical_port_index(pst_set_arp->key.index, &stPortInfo NBB_CCXT);
/* 删除整个条目 */
if (pst_set_arp->delete_struct == TRUE)
{
/* 如果条目不存在，不删除 */
if (ucIfExist == ATG_DCI_UNEXIST)
{
goto EXIT_LABEL;
}
/* 存在，删除 */
else
{
spm_dbg_print_arp_head(&stArpKey, SPM_OPER_DEL);
spm_dbg_record_arp_head(&stArpKey, SPM_OPER_DEL);
#ifdef SPU
ret = spm_arp_drv_del_arp(pst_arp);
if(SUCCESS != ret)
{
pst_arp->total_ret_code = ret;
goto EXIT_LABEL;
}
#endif
if (pst_arp != NULL)
{
AVLL_DELETE(SHARED.arp_tree, pst_arp->spm_arp_node);
//释放ARP表节点的内存空间
spm_free_arp_cb(pst_arp NBB_CCXT);
}
}
}
/* 增加或更新条目 */
else
{
/* 如果条目不存在，新申请内存空间保存数据 */
if (ucIfExist == ATG_DCI_UNEXIST)
{
spm_dbg_print_arp_head(&stArpKey, SPM_OPER_ADD);
spm_dbg_record_arp_head(&stArpKey, SPM_OPER_ADD);
/* 申请一个新条目的内存空间 */
pst_arp = spm_alloc_arp_cb(NBB_CXT);
if (pst_arp != NULL)
{
//插入到tree中
OS_MEMCPY(&pst_arp->arp_key, &stArpKey, sizeof(ATG_DCI_ARP_KEY));
AVLL_INSERT(SHARED.arp_tree, pst_arp->spm_arp_node);
}
}
else
{
spm_dbg_print_arp_head(&stArpKey, SPM_OPER_UPD);
spm_dbg_record_arp_head(&stArpKey, SPM_OPER_UPD);
}
/***************************************************************************/
/* 获取配置，逐条处理 */
/***************************************************************************/
/******************************** 基本配置 *********************************/
if (ATG_DCI_OPER_NULL != ulOperBasic)
{
ret = spm_arp_basic_data_proc(pst_set_arp,ulOperBasic,pst_arp);
if (SUCCESS != ret)
{
SPM_L2_ERROR_PRINT_LOG(uc_message,"arp basic proc r1=%d\n",ret);
pst_arp->basic_ret_code = ret;
}
}
}
EXIT_LABEL: NBB_TRC_EXIT();
return;
}
/*!
* This function is directly exported.
*
* @param found_device
* @param pdev
*
* @return igd_driver_h
* @return NULL on failure
*/
igd_driver_h igd_driver_init( igd_init_info_t *init_info )
{
igd_context_t *context;
os_pci_dev_t pdev = (os_pci_dev_t)NULL;
os_pci_dev_t vga_disable_dev;
iegd_pci_t *found_device;
int ret;
int i;
EMGD_TRACE_ENTER;
/* Allocate a context */
context = (void *) OS_ALLOC(sizeof(igd_context_t));
fixme_vbios_context = context;
if(!context) {
EMGD_ERROR_EXIT("igd_driver_init failed to create context");
return NULL;
}
OS_MEMSET(context, 0, sizeof(igd_context_t));
/* Search VGA devices for a supported one */
ret = detect_device(&found_device, &pdev);
if(ret) {
OS_FREE(context);
return NULL;
}
/*
* Some platforms (currently only Atom E6xx) use two PCI devices (the
* second device being for SDVO) and this causes the VGA arbiter to get
* involved. Legacy VGA decoding must be disabled for all PCI devices
* except one, otherwise the VGA arbiter will prevent DRI usage in the
* X server.
*/
for (i = 0; i < MAX_LEGACY_VGA_DISABLE; i++) {
vga_disable_dev = os_pci_find_device(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_SDVO_TNC, 0xFFFF, 0, 0, NULL);
if (vga_disable_dev) {
printk(KERN_INFO "VGA arbiter detected; disabling legacy VGA"
" decoding on SDVO device\n");
os_pci_disable_legacy_vga_decoding(vga_disable_dev);
os_pci_free_device(vga_disable_dev);
}
}
context->device_context.did = found_device->device_id;
init_dispatch = (init_dispatch_t *)dispatch_acquire(context,
init_dispatch_table);
if(!init_dispatch) {
EMGD_ERROR_EXIT("No dispatch found for listed device");
return NULL;
}
ret = init_dispatch->query(context, init_dispatch, pdev, &init_info->bus,
&init_info->slot, &init_info->func);
if(ret) {
OS_FREE(context);
EMGD_ERROR_EXIT("Device Dependent Query Failed");
return NULL;
}
/* init info */
init_info->vendor_id = found_device->vendor_id;
init_info->device_id = found_device->device_id;
init_info->name = init_dispatch->name;
init_info->chipset = init_dispatch->chipset;
init_info->default_pd_list = init_dispatch->default_pd_list;
EMGD_TRACE_EXIT;
return (igd_driver_h)context;
}
/*
* This is the public facing function which parses the PHY error
* and populates the dfs_phy_err struct.
*/
int
dfs_process_phyerr_bb_tlv(struct ath_dfs *dfs, void *buf, u_int16_t datalen,
u_int8_t rssi, u_int8_t ext_rssi, u_int32_t rs_tstamp, u_int64_t fulltsf,
struct dfs_phy_err *e)
{
struct rx_radar_status rs;
struct rx_search_fft_report rsfr;
OS_MEMZERO(&rs, sizeof(rs));
/*
* Add the ppdu_start/ppdu_end fields given to us by the upper
* layers. The firmware gives us a summary set of parameters rather
* than the whole PPDU_START/PPDU_END descriptor contenst.
*/
rs.rssi = rssi;
rs.raw_tsf = rs_tstamp;
/*
* Try parsing the TLV set.
*/
if (! tlv_parse_frame(dfs, &rs, &rsfr, buf, datalen, rssi))
return (0);
/* For debugging, print what we have parsed */
radar_summary_print(dfs, &rs);
/* Populate dfs_phy_err from rs */
OS_MEMSET(e, 0, sizeof(*e));
e->rssi = rs.rssi;
e->dur = rs.pulse_duration;
e->is_pri = 1; /* XXX always PRI for now */
e->is_ext = 0;
e->is_dc = 0;
e->is_early = 0;
/*
* XXX TODO: add a "chirp detection enabled" capability or config
* bit somewhere, in case for some reason the hardware chirp
* detection AND FFTs are disabled.
*/
/* For now, assume this hardware always does chirp detection */
e->do_check_chirp = 1;
e->is_hw_chirp = !! (rs.is_chirp);
e->is_sw_chirp = 0; /* We don't yet do software chirp checking */
e->fulltsf = fulltsf;
e->rs_tstamp = rs.raw_tsf - rs.tsf_offset;
/* XXX error check */
(void) tlv_calc_event_freq(dfs, &rs, &e->freq, &e->freq_lo,
&e->freq_hi);
DFS_DPRINTK(dfs, ATH_DEBUG_DFS_PHYERR_SUM,
"%s: fbin=%d, freq=%d.%d MHz, raw tsf=%u, offset=%d, "
"cooked tsf=%u, rssi=%d, dur=%d, is_chirp=%d, fulltsf=%llu, "
"freq=%d.%d MHz, freq_lo=%d.%dMHz, freq_hi=%d.%d MHz\n",
__func__,
rs.sidx,
(int) (rs.freq_offset / 1000),
(int) abs(rs.freq_offset % 1000),
rs.raw_tsf,
rs.tsf_offset,
e->rs_tstamp,
rs.rssi,
rs.pulse_duration,
(int) rs.is_chirp,
(unsigned long long) fulltsf,
(int) e->freq / 1000,
(int) abs(e->freq) % 1000,
(int) e->freq_lo / 1000,
(int) abs(e->freq_lo) % 1000,
(int) e->freq_hi / 1000,
(int) abs(e->freq_hi) % 1000);
return (1);
}
