static int pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) { unsigned long flags; if ((bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) return -EINVAL; if (dev & 0x10) return PCIBIOS_DEVICE_NOT_FOUND; spin_lock_irqsave(&pci_config_lock, flags); outb((u8)(0xF0 | (fn << 1)), 0xCF8); outb((u8)bus, 0xCFA); switch (len) { case 1: outb ((u8)value, PCI_CONF2_ADDRESS(dev, reg)); break; case 2: outw ((u16)value, PCI_CONF2_ADDRESS(dev, reg)); break; case 4: outl ((u32)value, PCI_CONF2_ADDRESS(dev, reg)); break; } outb (0, 0xCF8); spin_unlock_irqrestore(&pci_config_lock, flags); return 0; }
static int pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) { unsigned long flags; if (bus > 255 || dev > 31 || fn > 7 || reg > 255) return -EINVAL; if (dev & 0x10) return PCIBIOS_DEVICE_NOT_FOUND; spin_lock_irqsave(&pci_config_lock, flags); outb((u8)(0xF0 | (fn << 1)), 0xCF8); outb((u8)bus, 0xCFA); switch (len) { case 1: *value = inb(PCI_CONF2_ADDRESS(dev, reg)); break; case 2: *value = inw(PCI_CONF2_ADDRESS(dev, reg)); break; case 4: *value = inl(PCI_CONF2_ADDRESS(dev, reg)); break; } outb (0, 0xCF8); spin_unlock_irqrestore(&pci_config_lock, flags); return 0; }
static int pci_conf2_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) { unsigned long flags; int dev, fn; WARN_ON(seg); if ((bus > 255) || (devfn > 255) || (reg > 255)) { *value = -1; return -EINVAL; } dev = PCI_SLOT(devfn); fn = PCI_FUNC(devfn); if (dev & 0x10) return PCIBIOS_DEVICE_NOT_FOUND; raw_spin_lock_irqsave(&pci_config_lock, flags); outb((u8)(0xF0 | (fn << 1)), 0xCF8); outb((u8)bus, 0xCFA); switch (len) { case 1: *value = inb(PCI_CONF2_ADDRESS(dev, reg)); break; case 2: *value = inw(PCI_CONF2_ADDRESS(dev, reg)); break; case 4: *value = inl(PCI_CONF2_ADDRESS(dev, reg)); break; } outb(0, 0xCF8); raw_spin_unlock_irqrestore(&pci_config_lock, flags); return 0; }