};
static const unsigned bxt_north_pwm0_pins[] = { 34 };
static const unsigned bxt_north_pwm1_pins[] = { 35 };
static const unsigned bxt_north_pwm2_pins[] = { 36 };
static const unsigned bxt_north_pwm3_pins[] = { 37 };
static const unsigned bxt_north_uart0_pins[] = { 38, 39, 40, 41 };
static const unsigned bxt_north_uart1_pins[] = { 42, 43, 44, 45 };
static const unsigned bxt_north_uart2_pins[] = { 46, 47, 48, 49 };
static const unsigned bxt_north_uart0b_pins[] = { 50, 51, 52, 53 };
static const unsigned bxt_north_uart1b_pins[] = { 54, 55, 56, 57 };
static const unsigned bxt_north_uart2b_pins[] = { 58, 59, 60, 61 };
static const unsigned bxt_north_uart3_pins[] = { 58, 59, 60, 61 };
static const struct intel_pingroup bxt_north_groups[] = {
PIN_GROUP("pwm0_grp", bxt_north_pwm0_pins, 1),
PIN_GROUP("pwm1_grp", bxt_north_pwm1_pins, 1),
PIN_GROUP("pwm2_grp", bxt_north_pwm2_pins, 1),
PIN_GROUP("pwm3_grp", bxt_north_pwm3_pins, 1),
PIN_GROUP("uart0_grp", bxt_north_uart0_pins, 1),
PIN_GROUP("uart1_grp", bxt_north_uart1_pins, 1),
PIN_GROUP("uart2_grp", bxt_north_uart2_pins, 1),
PIN_GROUP("uart0b_grp", bxt_north_uart0b_pins, 2),
PIN_GROUP("uart1b_grp", bxt_north_uart1b_pins, 2),
PIN_GROUP("uart2b_grp", bxt_north_uart2b_pins, 2),
PIN_GROUP("uart3_grp", bxt_north_uart3_pins, 3),
};
static const char * const bxt_north_pwm0_groups[] = { "pwm0_grp" };
static const char * const bxt_north_pwm1_groups[] = { "pwm1_grp" };
static const char * const bxt_north_pwm2_groups[] = { "pwm2_grp" };
static const unsigned int icllp_spi1_modes[] = { 1, 1, 1, 1, 3 };
static const unsigned int icllp_spi2_pins[] = { 92, 93, 94, 95, 98 };
static const unsigned int icllp_spi2_modes[] = { 3, 3, 3, 3, 2 };
static const unsigned int icllp_i2c0_pins[] = { 169, 170 };
static const unsigned int icllp_i2c1_pins[] = { 171, 172 };
static const unsigned int icllp_i2c2_pins[] = { 63, 64 };
static const unsigned int icllp_i2c3_pins[] = { 65, 66 };
static const unsigned int icllp_i2c4_pins[] = { 67, 68 };
static const unsigned int icllp_uart0_pins[] = { 161, 162, 163, 164 };
static const unsigned int icllp_uart1_pins[] = { 165, 166, 167, 168 };
static const unsigned int icllp_uart2_pins[] = { 173, 174, 175, 176 };
static const struct intel_pingroup icllp_groups[] = {
PIN_GROUP("spi0_grp", icllp_spi0_pins, icllp_spi0_modes),
PIN_GROUP("spi1_grp", icllp_spi1_pins, icllp_spi1_modes),
PIN_GROUP("spi2_grp", icllp_spi2_pins, icllp_spi2_modes),
PIN_GROUP("i2c0_grp", icllp_i2c0_pins, 1),
PIN_GROUP("i2c1_grp", icllp_i2c1_pins, 1),
PIN_GROUP("i2c2_grp", icllp_i2c2_pins, 1),
PIN_GROUP("i2c3_grp", icllp_i2c3_pins, 1),
PIN_GROUP("i2c4_grp", icllp_i2c4_pins, 1),
PIN_GROUP("uart0_grp", icllp_uart0_pins, 1),
PIN_GROUP("uart1_grp", icllp_uart1_pins, 1),
PIN_GROUP("uart2_grp", icllp_uart2_pins, 1),
};
static const char * const icllp_spi0_groups[] = { "spi0_grp" };
static const char * const icllp_spi1_groups[] = { "spi1_grp" };
static const char * const icllp_spi2_groups[] = { "spi2_grp" };
/* Family 17: HSIC (0 pins) */
/* Family 18: Broadcast (0 pins) */
};
static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 };
static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 };
static const unsigned int mrfld_uart0_pins[] = { 124, 125, 126, 127 };
static const unsigned int mrfld_uart1_pins[] = { 128, 129, 130, 131 };
static const unsigned int mrfld_uart2_pins[] = { 132, 133, 134, 135 };
static const unsigned int mrfld_pwm0_pins[] = { 144 };
static const unsigned int mrfld_pwm1_pins[] = { 145 };
static const unsigned int mrfld_pwm2_pins[] = { 132 };
static const unsigned int mrfld_pwm3_pins[] = { 133 };
static const struct intel_pingroup mrfld_groups[] = {
PIN_GROUP("sdio_grp", mrfld_sdio_pins, 1),
PIN_GROUP("spi5_grp", mrfld_spi5_pins, 1),
PIN_GROUP("uart0_grp", mrfld_uart0_pins, 1),
PIN_GROUP("uart1_grp", mrfld_uart1_pins, 1),
PIN_GROUP("uart2_grp", mrfld_uart2_pins, 1),
PIN_GROUP("pwm0_grp", mrfld_pwm0_pins, 1),
PIN_GROUP("pwm1_grp", mrfld_pwm1_pins, 1),
PIN_GROUP("pwm2_grp", mrfld_pwm2_pins, 1),
PIN_GROUP("pwm3_grp", mrfld_pwm3_pins, 1),
};
static const char * const mrfld_sdio_groups[] = { "sdio_grp" };
static const char * const mrfld_spi5_groups[] = { "spi5_grp" };
static const char * const mrfld_uart0_groups[] = { "uart0_grp" };
static const char * const mrfld_uart1_groups[] = { "uart1_grp" };
static const char * const mrfld_uart2_groups[] = { "uart2_grp" };
static const unsigned sptlp_i2c1_pins[] = { 66, 67 };
static const unsigned sptlp_i2c2_pins[] = { 124, 125 };
static const unsigned sptlp_i2c3_pins[] = { 126, 127 };
static const unsigned sptlp_i2c4_pins[] = { 128, 129 };
static const unsigned sptlp_i2c4b_pins[] = { 85, 86 };
static const unsigned sptlp_i2c5_pins[] = { 130, 131 };
static const unsigned sptlp_ssp2_pins[] = { 120, 121, 122, 123 };
static const unsigned sptlp_emmc_pins[] = {
132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
};
static const unsigned sptlp_sd_pins[] = {
144, 145, 146, 147, 148, 149, 150, 151,
};
static const struct intel_pingroup sptlp_groups[] = {
PIN_GROUP("spi0_grp", sptlp_spi0_pins, 1),
PIN_GROUP("spi1_grp", sptlp_spi1_pins, 1),
PIN_GROUP("uart0_grp", sptlp_uart0_pins, 1),
PIN_GROUP("uart1_grp", sptlp_uart1_pins, 1),
PIN_GROUP("uart2_grp", sptlp_uart2_pins, 1),
PIN_GROUP("i2c0_grp", sptlp_i2c0_pins, 1),
PIN_GROUP("i2c1_grp", sptlp_i2c1_pins, 1),
PIN_GROUP("i2c2_grp", sptlp_i2c2_pins, 1),
PIN_GROUP("i2c3_grp", sptlp_i2c3_pins, 1),
PIN_GROUP("i2c4_grp", sptlp_i2c4_pins, 1),
PIN_GROUP("i2c4b_grp", sptlp_i2c4b_pins, 3),
PIN_GROUP("i2c5_grp", sptlp_i2c5_pins, 1),
PIN_GROUP("ssp2_grp", sptlp_ssp2_pins, 1),
PIN_GROUP("emmc_grp", sptlp_emmc_pins, 1),
PIN_GROUP("sd_grp", sptlp_sd_pins, 1),
};
PINCTRL_PIN(151, "EMMC_D6"),
PINCTRL_PIN(152, "EMMC_D7"),
PINCTRL_PIN(153, "GPIO_3"),
};
static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
static const unsigned int dnv_emmc_pins[] = {
142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
};
static const struct intel_pingroup dnv_groups[] = {
PIN_GROUP("uart0_grp", dnv_uart0_pins, dnv_uart0_modes),
PIN_GROUP("uart1_grp", dnv_uart1_pins, 1),
PIN_GROUP("uart2_grp", dnv_uart2_pins, dnv_uart2_modes),
PIN_GROUP("emmc_grp", dnv_emmc_pins, 1),
};
static const char * const dnv_uart0_groups[] = { "uart0_grp" };
static const char * const dnv_uart1_groups[] = { "uart1_grp" };
static const char * const dnv_uart2_groups[] = { "uart2_grp" };
static const char * const dnv_emmc_groups[] = { "emmc_grp" };
static const struct intel_function dnv_functions[] = {
FUNCTION("uart0", dnv_uart0_groups),
FUNCTION("uart1", dnv_uart1_groups),
FUNCTION("uart2", dnv_uart2_groups),
FUNCTION("emmc", dnv_emmc_groups),
