/**
* Initialise a single USART device
*/
int32_t PIOS_USART_Init(uint32_t * usart_id, const struct pios_usart_cfg * cfg)
{
	PIOS_DEBUG_Assert(usart_id);
	PIOS_DEBUG_Assert(cfg);

	struct pios_usart_dev * usart_dev;

	usart_dev = (struct pios_usart_dev *) PIOS_USART_alloc();
	if (!usart_dev) goto out_fail;

	/* Bind the configuration to the device instance */
	usart_dev->cfg = cfg;

	/* Clear buffer counters */
	fifoBuf_init(&usart_dev->rx, usart_dev->rx_buffer, sizeof(usart_dev->rx_buffer));
	fifoBuf_init(&usart_dev->tx, usart_dev->tx_buffer, sizeof(usart_dev->tx_buffer));

	/* Enable the USART Pins Software Remapping */
	if (usart_dev->cfg->remap) {
		GPIO_PinRemapConfig(usart_dev->cfg->remap, ENABLE);
	}

	/* Initialize the USART Rx and Tx pins */
	GPIO_Init(usart_dev->cfg->rx.gpio, &usart_dev->cfg->rx.init);
	GPIO_Init(usart_dev->cfg->tx.gpio, &usart_dev->cfg->tx.init);

	/* Enable USART clock */
	switch ((uint32_t)usart_dev->cfg->regs) {
	case (uint32_t)USART1:
		RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
		break;
	case (uint32_t)USART2:
		RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
		break;
	case (uint32_t)USART3:
		RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
		break;
	}
  
	/* Configure the USART */
	USART_Init(usart_dev->cfg->regs, &usart_dev->cfg->init);
  
	*usart_id = (uint32_t)usart_dev;

	/* Configure USART Interrupts */
	NVIC_Init(&usart_dev->cfg->irq.init);
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE,  ENABLE);
  
	/* Enable USART */
	USART_Cmd(usart_dev->cfg->regs, ENABLE);

	return(0);

out_fail:
	return(-1);
}
Example #2
0
/**
 * Initialise a single USART device
 */
int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
{
    PIOS_DEBUG_Assert(usart_id);
    PIOS_DEBUG_Assert(cfg);

    struct pios_usart_dev *usart_dev;

    usart_dev = (struct pios_usart_dev *)PIOS_USART_alloc();
    if (!usart_dev) {
        return -1;
    }

    /* Bind the configuration to the device instance */
    usart_dev->cfg = cfg;

    /* Enable the USART Pins Software Remapping */
    if (usart_dev->cfg->remap) {
        GPIO_PinAFConfig(cfg->rx.gpio, __builtin_ctz(cfg->rx.init.GPIO_Pin), cfg->remap);
        GPIO_PinAFConfig(cfg->tx.gpio, __builtin_ctz(cfg->tx.init.GPIO_Pin), cfg->remap);
    }

    /* Initialize the USART Rx and Tx pins */
    GPIO_Init(cfg->rx.gpio, (GPIO_InitTypeDef *)&cfg->rx.init);
    GPIO_Init(cfg->tx.gpio, (GPIO_InitTypeDef *)&cfg->tx.init);

    /* Enable USART clock */
    switch ((uint32_t)cfg->regs) {
    case (uint32_t)USART1:
        RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
        PIOS_USART_1_id = (uint32_t)usart_dev;
        break;
    case (uint32_t)USART2:
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
        PIOS_USART_2_id = (uint32_t)usart_dev;
        break;
    case (uint32_t)USART3:
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
        PIOS_USART_3_id = (uint32_t)usart_dev;
        break;
    }

    /* Configure the USART */
    USART_Init(cfg->regs, (USART_InitTypeDef *)&cfg->init);
    *usart_id = (uint32_t)usart_dev;

    NVIC_Init((NVIC_InitTypeDef *)&cfg->irq.init);
    USART_ITConfig(cfg->regs, USART_IT_RXNE, ENABLE);
    USART_ITConfig(cfg->regs, USART_IT_TXE, ENABLE);
    USART_ITConfig(cfg->regs, USART_IT_ORE, DISABLE);
    USART_ITConfig(cfg->regs, USART_IT_TC, DISABLE);
    /* Enable USART */
    USART_Cmd(cfg->regs, ENABLE);

    return 0;
}
Example #3
0
/**
* Initialise a single USART device
*/
int32_t PIOS_USART_Init(uintptr_t * usart_id, const struct pios_usart_cfg * cfg)
{
	PIOS_DEBUG_Assert(usart_id);
	PIOS_DEBUG_Assert(cfg);

	struct pios_usart_dev * usart_dev;

	usart_dev = (struct pios_usart_dev *) PIOS_USART_alloc();
	if (!usart_dev) goto out_fail;

	/* Bind the configuration to the device instance */
	usart_dev->cfg = cfg;

	/* Map pins to USART function */
	/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
	if (usart_dev->cfg->remap) {
		if (usart_dev->cfg->rx.gpio != 0)
			GPIO_PinAFConfig(usart_dev->cfg->rx.gpio,
				__builtin_ctz(usart_dev->cfg->rx.init.GPIO_Pin),
				usart_dev->cfg->remap);
		if (usart_dev->cfg->tx.gpio != 0)
			GPIO_PinAFConfig(usart_dev->cfg->tx.gpio,
				__builtin_ctz(usart_dev->cfg->tx.init.GPIO_Pin),
				usart_dev->cfg->remap);
	}

	/* Initialize the USART Rx and Tx pins */
	if (usart_dev->cfg->rx.gpio != 0)
		GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
	if (usart_dev->cfg->tx.gpio != 0)
		GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);

	/* Configure the USART */
	USART_Init(usart_dev->cfg->regs, (USART_InitTypeDef *)&usart_dev->cfg->init);

	*usart_id = (uintptr_t)usart_dev;

	/* Configure USART Interrupts */
	switch ((uint32_t)usart_dev->cfg->regs) {
	case (uint32_t)USART1:
		PIOS_USART_1_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)USART2:
		PIOS_USART_2_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)USART3:
		PIOS_USART_3_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)UART4:
		PIOS_USART_4_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)UART5:
		PIOS_USART_5_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)USART6:
		PIOS_USART_6_id = (uintptr_t)usart_dev;
		break;
	}
	NVIC_Init((NVIC_InitTypeDef *)&(usart_dev->cfg->irq.init));
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE,  ENABLE);

	// FIXME XXX Clear / reset uart here - sends NUL char else

	/* Enable USART */
	USART_Cmd(usart_dev->cfg->regs, ENABLE);

	return(0);

out_fail:
	return(-1);
}
Example #4
0
/**
* Initialise a single USART device
*/
int32_t PIOS_USART_Init(uintptr_t * usart_id, const struct pios_usart_cfg * cfg)
{
	PIOS_DEBUG_Assert(usart_id);
	PIOS_DEBUG_Assert(cfg);

	struct pios_usart_dev * usart_dev;

	usart_dev = (struct pios_usart_dev *) PIOS_USART_alloc();
	if (!usart_dev) goto out_fail;

	/* Bind the configuration to the device instance */
	usart_dev->cfg = cfg;

	/* Map pins to USART function */
	if (usart_dev->cfg->remap) {
		if (usart_dev->cfg->rx.gpio != 0)
			GPIO_PinAFConfig(usart_dev->cfg->rx.gpio,
				usart_dev->cfg->rx.pin_source,
				usart_dev->cfg->remap);
		if (usart_dev->cfg->tx.gpio != 0)
			GPIO_PinAFConfig(usart_dev->cfg->tx.gpio,
				usart_dev->cfg->tx.pin_source,
				usart_dev->cfg->remap);
	}

	/* Initialize the USART Rx and Tx pins */
	if (usart_dev->cfg->rx.gpio != 0)
		GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
	if (usart_dev->cfg->tx.gpio != 0)
		GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);

	/* Apply inversion and swap settings */
	if (usart_dev->cfg->rx_invert == true)
		USART_InvPinCmd(usart_dev->cfg->regs, USART_InvPin_Rx, ENABLE);
	else
		USART_InvPinCmd(usart_dev->cfg->regs, USART_InvPin_Rx, DISABLE);

	if (usart_dev->cfg->tx_invert == true)
		USART_InvPinCmd(usart_dev->cfg->regs, USART_InvPin_Tx, ENABLE);
	else
		USART_InvPinCmd(usart_dev->cfg->regs, USART_InvPin_Tx, DISABLE);

	if (usart_dev->cfg->rxtx_swap == true)
		USART_SWAPPinCmd(usart_dev->cfg->regs, ENABLE);
	else
		USART_SWAPPinCmd(usart_dev->cfg->regs, DISABLE);

	if (usart_dev->cfg->single_wire == true)
		USART_HalfDuplexCmd(usart_dev->cfg->regs, ENABLE);
	else
		USART_HalfDuplexCmd(usart_dev->cfg->regs, DISABLE);

	/* Configure the USART */
	USART_Init(usart_dev->cfg->regs, (USART_InitTypeDef *)&usart_dev->cfg->init);

	*usart_id = (uintptr_t)usart_dev;

	/* Configure USART Interrupts */
	switch ((uint32_t)usart_dev->cfg->regs) {
	case (uint32_t)USART1:
		PIOS_USART_1_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)USART2:
		PIOS_USART_2_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)USART3:
		PIOS_USART_3_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)UART4:
		PIOS_UART_4_id = (uintptr_t)usart_dev;
		break;
	case (uint32_t)UART5:
		PIOS_UART_5_id = (uintptr_t)usart_dev;
		break;
	}
	NVIC_Init((NVIC_InitTypeDef *)&(usart_dev->cfg->irq.init));
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
	USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE,  ENABLE);

	// FIXME XXX Clear / reset uart here - sends NUL char else

	/* Enable USART */
	USART_Cmd(usart_dev->cfg->regs, ENABLE);

	return(0);

out_fail:
	return(-1);
}