/**
Display CPUID_EXTENDED_STATE main leaf and sub-leafs.
**/
VOID
CpuidExtendedStateMainLeaf (
VOID
)
{
CPUID_EXTENDED_STATE_MAIN_LEAF_EAX Eax;
UINT32 Ebx;
UINT32 Ecx;
UINT32 Edx;
if (CPUID_EXTENDED_STATE > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_EXTENDED_STATE, CPUID_EXTENDED_STATE_MAIN_LEAF,
&Eax.Uint32, &Ebx, &Ecx, &Edx
);
Print (L"CPUID_EXTENDED_STATE (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_STATE, CPUID_EXTENDED_STATE_MAIN_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx, Ecx, Edx);
PRINT_BIT_FIELD (Eax, x87);
PRINT_BIT_FIELD (Eax, SSE);
PRINT_BIT_FIELD (Eax, AVX);
PRINT_BIT_FIELD (Eax, MPX);
PRINT_BIT_FIELD (Eax, AVX_512);
PRINT_BIT_FIELD (Eax, IA32_XSS);
PRINT_BIT_FIELD (Eax, PKRU);
PRINT_VALUE (Ebx, EnabledSaveStateSize);
PRINT_VALUE (Ecx, SupportedSaveStateSize);
PRINT_VALUE (Edx, XCR0_Supported_32_63);
CpuidExtendedStateSubLeaf ();
CpuidExtendedStateSizeOffset ();
}
/**
Display CPUID_EXTENDED_STATE sub-leaf.
**/
VOID
CpuidExtendedStateSubLeaf (
VOID
)
{
CPUID_EXTENDED_STATE_SUB_LEAF_EAX Eax;
UINT32 Ebx;
CPUID_EXTENDED_STATE_SUB_LEAF_ECX Ecx;
UINT32 Edx;
AsmCpuidEx (
CPUID_EXTENDED_STATE, CPUID_EXTENDED_STATE_SUB_LEAF,
&Eax.Uint32, &Ebx, &Ecx.Uint32, &Edx
);
Print (L"CPUID_EXTENDED_STATE (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_STATE, CPUID_EXTENDED_STATE_SUB_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx, Ecx.Uint32, Edx);
PRINT_BIT_FIELD (Eax, XSAVEOPT);
PRINT_BIT_FIELD (Eax, XSAVEC);
PRINT_BIT_FIELD (Eax, XGETBV);
PRINT_BIT_FIELD (Eax, XSAVES);
PRINT_VALUE (Ebx, EnabledSaveStateSize_XCR0_IA32_XSS);
PRINT_BIT_FIELD (Ecx, XCR0);
PRINT_BIT_FIELD (Ecx, PT);
PRINT_BIT_FIELD (Ecx, XCR0_1);
PRINT_VALUE (Edx, IA32_XSS_Supported_32_63);
}
/**
Display CPUID_EXTENDED_STATE size and offset information sub-leaf.
**/
VOID
CpuidExtendedStateSizeOffset (
VOID
)
{
UINT32 Eax;
UINT32 Ebx;
CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX Ecx;
UINT32 Edx;
UINT32 SubLeaf;
for (SubLeaf = CPUID_EXTENDED_STATE_SIZE_OFFSET; SubLeaf < 32; SubLeaf++) {
AsmCpuidEx (
CPUID_EXTENDED_STATE, SubLeaf,
&Eax, &Ebx, &Ecx.Uint32, &Edx
);
if (Edx != 0) {
Print (L"CPUID_EXTENDED_STATE (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_STATE, SubLeaf);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx, Ecx.Uint32, Edx);
PRINT_VALUE (Eax, FeatureSaveStateSize);
PRINT_VALUE (Ebx, FeatureSaveStateOffset);
PRINT_BIT_FIELD (Ecx, XSS);
PRINT_BIT_FIELD (Ecx, Compacted);
}
}
}
/**
Display CPUID_SOC_VENDOR main leaf and sub-leafs.
**/
VOID
CpuidSocVendor (
VOID
)
{
UINT32 Eax;
CPUID_SOC_VENDOR_MAIN_LEAF_EBX Ebx;
UINT32 Ecx;
UINT32 Edx;
if (CPUID_SOC_VENDOR > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_SOC_VENDOR, CPUID_SOC_VENDOR_MAIN_LEAF,
&Eax, &Ebx.Uint32, &Ecx, &Edx
);
Print (L"CPUID_SOC_VENDOR (Leaf %08x, Sub-Leaf %08x)\n", CPUID_SOC_VENDOR, CPUID_SOC_VENDOR_MAIN_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx.Uint32, Ecx, Edx);
if (Eax < 3) {
Print (L" Not Supported\n");
return;
}
PRINT_VALUE (Eax, MaxSOCID_Index);
PRINT_BIT_FIELD (Ebx, SocVendorId);
PRINT_BIT_FIELD (Ebx, IsVendorScheme);
PRINT_VALUE (Ecx, ProjectID);
PRINT_VALUE (Edx, SteppingID);
CpuidSocVendorBrandString ();
}
void
llvm_codegen_visit_assignment_stmt (struct _Visitor *visitor, struct AstNode *node)
{
int rindex = -1;
struct AstNode *lnode = node->children;
struct AstNode *rnode = lnode->sibling;
/* FIXME * */printf("; [Assignment][%s] %s(%d/%d) = %d\n", rnode->name,
lnode->symbol->name, lnode->symbol->stack_index,
stack_size, ast_node_get_value_as_int(rnode));
/**/
/* rnode */
rindex = _process_expression(rnode, visitor);
/* lnode */
if (lnode->symbol->is_global && !symbol_is_procfunc(lnode->symbol)) {
printf(TAB"store ");
PRINT_TYPE(lnode->type);
printf(" ");
PRINT_VALUE(rnode, rindex);
printf(", ");
PRINT_TYPE(lnode->type);
printf("* ");
ast_node_accept(lnode, visitor);
printf(", align 4\n");
} else if (rindex == -1) {
/*lnode->symbol->stack_index = -1;
lnode->symbol->value.integer = rnode->value.integer;
lnode->value.integer = rnode->value.integer;*/
printf(TAB"add ");
PRINT_TYPE(lnode->type);
printf(" ");
PRINT_VALUE(rnode, rindex);
printf(", 0\n");
stack_size++;
lnode->symbol->stack_index = stack_size;
} else
lnode->symbol->stack_index = rindex;
/* FIXME */ printf("; [Assignment][%s] %s(%d/%d) = %d\n", rnode->name,
lnode->symbol->name, lnode->symbol->stack_index,
stack_size, ast_node_get_value_as_int(rnode));
/**/
}
/**
Display CPUID_EXTENDED_TOPOLOGY leafs for all supported levels.
**/
VOID
CpuidExtendedTopology (
VOID
)
{
CPUID_EXTENDED_TOPOLOGY_EAX Eax;
CPUID_EXTENDED_TOPOLOGY_EBX Ebx;
CPUID_EXTENDED_TOPOLOGY_ECX Ecx;
UINT32 Edx;
UINT32 LevelNumber;
if (CPUID_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {
return;
}
LevelNumber = 0;
do {
AsmCpuidEx (
CPUID_EXTENDED_TOPOLOGY, LevelNumber,
&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
);
if (Eax.Bits.ApicIdShift != 0) {
Print (L"CPUID_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_TOPOLOGY, LevelNumber);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);
PRINT_BIT_FIELD (Eax, ApicIdShift);
PRINT_BIT_FIELD (Ebx, LogicalProcessors);
PRINT_BIT_FIELD (Ecx, LevelNumber);
PRINT_BIT_FIELD (Ecx, LevelType);
PRINT_VALUE (Edx, x2APIC_ID);
}
LevelNumber++;
} while (Eax.Bits.ApicIdShift != 0);
}
void
llvm_codegen_visit_if_stmt (struct _Visitor *visitor, struct AstNode *node)
{
int index = -1;
struct AstNode *expr = node->children;
struct AstNode *cmd1 = expr->sibling;
struct AstNode *cmd2 = cmd1->sibling;
printf("; if evaluation, line %d\n", node->linenum);
index = _process_expression(expr, visitor);
printf(TAB"br i1 ");
PRINT_VALUE(expr, index);
printf(", label %%cond_true_%x, label ", (unsigned)node);
if (cmd2 == NULL)
printf("%%cond_next_%x\n", (unsigned)node);
else
printf("%%cond_false_%x\n", (unsigned)node);
printf("\ncond_true_%x:\n", (unsigned)node);
ast_node_accept(cmd1, visitor);
printf(TAB"br label %%cond_next_%x\n", (unsigned)node);
if (cmd2 != NULL) {
printf("\ncond_false_%x:\n", (unsigned)node);
ast_node_accept(cmd2, visitor);
printf(TAB"br label %%cond_next_%x\n", (unsigned)node);
}
printf("\ncond_next_%x:\n", (unsigned)node);
}
/**
Display CPUID_SIGNATURE leaf.
**/
VOID
CpuidSignature (
VOID
)
{
UINT32 Eax;
UINT32 Ebx;
UINT32 Ecx;
UINT32 Edx;
CHAR8 Signature[13];
if (CPUID_SIGNATURE > gMaximumBasicFunction) {
return;
}
AsmCpuid (CPUID_SIGNATURE, &Eax, &Ebx, &Ecx, &Edx);
Print (L"CPUID_SIGNATURE (Leaf %08x)\n", CPUID_SIGNATURE);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx, Ecx, Edx);
PRINT_VALUE (Eax, MaximumLeaf);
*(UINT32 *)(Signature + 0) = Ebx;
*(UINT32 *)(Signature + 4) = Edx;
*(UINT32 *)(Signature + 8) = Ecx;
Signature [12] = 0;
Print (L" Signature = %a\n", Signature);
gMaximumBasicFunction = Eax;
}
/**
Display CPUID_INTEL_PROCESSOR_TRACE main leaf and sub-leafs.
**/
VOID
CpuidIntelProcessorTraceMainLeaf (
VOID
)
{
UINT32 Eax;
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBX Ebx;
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECX Ecx;
if (CPUID_INTEL_PROCESSOR_TRACE > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF,
&Eax, &Ebx.Uint32, &Ecx.Uint32, NULL
);
Print (L"CPUID_INTEL_PROCESSOR_TRACE (Leaf %08x, Sub-Leaf %08x)\n", CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx.Uint32, Ecx.Uint32, 0);
PRINT_VALUE (Eax, MaximumSubLeaf);
PRINT_BIT_FIELD (Ebx, Cr3Filter);
PRINT_BIT_FIELD (Ebx, ConfigurablePsb);
PRINT_BIT_FIELD (Ebx, IpTraceStopFiltering);
PRINT_BIT_FIELD (Ebx, Mtc);
PRINT_BIT_FIELD (Ecx, RTIT);
PRINT_BIT_FIELD (Ecx, ToPA);
PRINT_BIT_FIELD (Ecx, SingleRangeOutput);
PRINT_BIT_FIELD (Ecx, TraceTransportSubsystem);
PRINT_BIT_FIELD (Ecx, LIP);
CpuidIntelProcessorTraceSubLeaf (Eax);
}
void
llvm_codegen_visit_for_stmt (struct _Visitor *visitor, struct AstNode *node)
{
int index = -1;
struct AstNode *asgn = node->children;
struct AstNode *expr = asgn->sibling;
struct AstNode *stmt = expr->sibling;
printf("; for evaluation, line %d\n", node->linenum);
//%tmp512 = ????
ast_node_accept(asgn, visitor);
/*
%tmp714 = icmp sgt i32 %tmp512, 0 ; <i1> [#uses=1]
br i1 %tmp714, label %bb.preheader, label %bb9
*/
index = _process_expression(expr, visitor);
printf(TAB"br i1 ");
PRINT_VALUE(expr, index);
printf(", label %%bb_%x.preheader, label %%bb_%x\n", (unsigned)node, (unsigned)node);
/*
bb.preheader: ; preds = %entry
%b.promoted = load i32* @b, align 4 ; <i32> [#uses=1]
br label %bb
*/
printf("\nbb_%x.preheader:\n", (unsigned)node);
/*
bb: ; preds = %bb, %bb.preheader
%ITERADOR.010.0 = phi i32 [ 0, %bb.preheader ], [ %tmp3, %bb ] ; <i32> [#uses=2]
%tmp3 = add i32 %ITERADOR.010.0, 1 ; <i32> [#uses=2]
%tmp7 = icmp slt i32 %tmp3, %tmp512 ; <i1> [#uses=1]
br i1 %tmp7, label %bb, label %bb9.loopexit
*/
/*
bb9.loopexit: ; preds = %bb
%b.tmp.0 = add i32 %ITERADOR.010.0, %b.promoted ; <i32> [#uses=1]
%tmp1 = add i32 %b.tmp.0, 1 ; <i32> [#uses=1]
store i32 %tmp1, i32* @b, align 4
br label %bb9
*/
/*
bb9: ; preds = %bb9.loopexit, %entry
*/
printf("\ncond_true_%x:\n", (unsigned)node);
ast_node_accept(stmt, visitor);
printf(TAB"br label %%cond_next_%x\n", (unsigned)node);
printf("\ncond_next_%x:\n", (unsigned)node);
}
void *realloc_d(void *start, const size_t n) {
void *re = realloc(start, n);
if (re == NULL) {
PRINT_VALUE("dynamic memory allocation failed");
fprintf(stderr, "\ndynamic memory allocation failed\n");
exit(EXIT_FAILURE);
}
return re;
}
void *calloc_d(size_t num, size_t size) {
void *re = calloc(num, size);
if (re == NULL) {
PRINT_VALUE("dynamic memory allocation failed");
fprintf(stderr, "\ndynamic memory allocation failed\n");
exit(EXIT_FAILURE);
}
return re;
}
void
llvm_codegen_visit_printchar_stmt (struct _Visitor *visitor, struct AstNode *node)
{
int index = -1;
struct AstNode *child = node->children;
index = _process_expression(child, visitor);
printf(TAB"call i32 @putchar ( i32 ");
PRINT_VALUE(child, index);
printf(" )\n");
stack_size++;
}
/**
Display CPUID_EXTENDED_FUNCTION leaf.
**/
VOID
CpuidExtendedFunction (
VOID
)
{
UINT32 Eax;
AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
Print (L"CPUID_EXTENDED_FUNCTION (Leaf %08x)\n", CPUID_EXTENDED_FUNCTION);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, 0, 0, 0);
PRINT_VALUE (Eax, MaximumExtendedFunction);
gMaximumExtendedFunction = Eax;
}
/**
Display CPUID_PLATFORM_QOS_MONITORING capability sub-leaf.
**/
VOID
CpuidPlatformQosMonitoringCapabilitySubLeaf (
VOID
)
{
UINT32 Ebx;
UINT32 Ecx;
CPUID_PLATFORM_QOS_MONITORING_CAPABILITY_SUB_LEAF_EDX Edx;
if (CPUID_PLATFORM_QOS_MONITORING > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_PLATFORM_QOS_MONITORING, CPUID_PLATFORM_QOS_MONITORING_CAPABILITY_SUB_LEAF,
NULL, &Ebx, &Ecx, &Edx.Uint32
);
Print (L"CPUID_PLATFORM_QOS_MONITORING (Leaf %08x, Sub-Leaf %08x)\n", CPUID_PLATFORM_QOS_MONITORING, CPUID_PLATFORM_QOS_MONITORING_CAPABILITY_SUB_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", 0, Ebx, Ecx, Edx.Uint32);
PRINT_VALUE (Ebx, OccupancyConversionFactor);
PRINT_VALUE (Ecx, Maximum_RMID_Range);
PRINT_BIT_FIELD (Edx, L3CacheOccupancyMonitoring);
}
std::ostream& operator<<(std::ostream& os, const Commodity& c)
{
switch(c){
PRINT_VALUE(GOLD);
PRINT_VALUE(SILV);
PRINT_VALUE(PORK);
PRINT_VALUE(OIL);
PRINT_VALUE(RICE);
PRINT_VALUE(UNKNOWN_COMMODITY);
}
}
void
llvm_codegen_visit_printint_stmt (struct _Visitor *visitor, struct AstNode *node)
{
int index = -1;
struct AstNode *child = node->children;
index = _process_expression(child, visitor);
printf(TAB"call i32 (i8* noalias , ...)* bitcast (i32 (i8*, ...)* \n");
printf(TAB TAB"@printf to i32 (i8* noalias, ...)*)\n");
printf(TAB TAB"( i8* getelementptr ");
printf("([3 x i8]* @.int_fmt, i32 0, i32 0) noalias ,\n");
printf(TAB TAB"i32 ");
PRINT_VALUE(child, index);
printf(" )\n");
stack_size++;
}
/**
Display CPUID_CACHE_PARAMS for all supported sub-leafs.
**/
VOID
CpuidCacheParams (
VOID
)
{
UINT32 CacheLevel;
CPUID_CACHE_PARAMS_EAX Eax;
CPUID_CACHE_PARAMS_EBX Ebx;
UINT32 Ecx;
CPUID_CACHE_PARAMS_EDX Edx;
if (CPUID_CACHE_PARAMS > gMaximumBasicFunction) {
return;
}
CacheLevel = 0;
do {
AsmCpuidEx (
CPUID_CACHE_PARAMS, CacheLevel,
&Eax.Uint32, &Ebx.Uint32, &Ecx, &Edx.Uint32
);
if (Eax.Bits.CacheType != CPUID_CACHE_PARAMS_CACHE_TYPE_NULL) {
Print (L"CPUID_CACHE_PARAMS (Leaf %08x, Sub-Leaf %08x)\n", CPUID_CACHE_PARAMS, CacheLevel);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx, Edx.Uint32);
PRINT_BIT_FIELD (Eax, CacheType);
PRINT_BIT_FIELD (Eax, CacheLevel);
PRINT_BIT_FIELD (Eax, SelfInitializingCache);
PRINT_BIT_FIELD (Eax, FullyAssociativeCache);
PRINT_BIT_FIELD (Eax, MaximumAddressableIdsForLogicalProcessors);
PRINT_BIT_FIELD (Eax, MaximumAddressableIdsForProcessorCores);
PRINT_BIT_FIELD (Ebx, LineSize);
PRINT_BIT_FIELD (Ebx, LinePartitions);
PRINT_BIT_FIELD (Ebx, Ways);
PRINT_VALUE (Ecx, NumberOfSets);
PRINT_BIT_FIELD (Edx, Invalidate);
PRINT_BIT_FIELD (Edx, CacheInclusiveness);
PRINT_BIT_FIELD (Edx, ComplexCacheIndexing);
}
CacheLevel++;
} while (Eax.Bits.CacheType != CPUID_CACHE_PARAMS_CACHE_TYPE_NULL);
}
/**
Display CPUID_PLATFORM_QOS_MONITORING enumeration sub-leaf.
**/
VOID
CpuidPlatformQosMonitoringEnumerationSubLeaf (
VOID
)
{
UINT32 Ebx;
CPUID_PLATFORM_QOS_MONITORING_ENUMERATION_SUB_LEAF_EDX Edx;
if (CPUID_PLATFORM_QOS_MONITORING > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_PLATFORM_QOS_MONITORING, CPUID_PLATFORM_QOS_MONITORING_ENUMERATION_SUB_LEAF,
NULL, &Ebx, NULL, &Edx.Uint32
);
Print (L"CPUID_PLATFORM_QOS_MONITORING (Leaf %08x, Sub-Leaf %08x)\n", CPUID_PLATFORM_QOS_MONITORING, CPUID_PLATFORM_QOS_MONITORING_ENUMERATION_SUB_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", 0, Ebx, 0, Edx.Uint32);
PRINT_VALUE (Ebx, Maximum_RMID_Range);
PRINT_BIT_FIELD (Edx, L3CacheQosEnforcement);
}
void
llvm_codegen_visit_procfunc (struct _Visitor *visitor, struct AstNode *node)
{
struct AstNode *child;
printf("define ");
PRINT_TYPE(node->type);
printf(" ");
child = node->children; // Identifier
ast_node_accept(child, visitor);
printf(" ( ");
child = child->sibling;
if (child->kind == PARAM_LIST) {
ast_node_accept(child, visitor);
child = child->sibling;
}
printf(" ) {\n");
printf("entry:\n");
if (child->kind == VARDECL_LIST) {
ast_node_accept(child, visitor);
child = child->sibling;
}
ast_node_accept(child, visitor);
printf(TAB"ret ");
PRINT_TYPE(node->type);
if (node->kind == FUNCTION) {
printf(" ");
PRINT_VALUE(node->children, node->children->symbol->stack_index);
}
printf("\n}\n\n");
}
/**
Display CPUID_PLATFORM_QOS_ENFORCEMENT sub-leaf.
**/
VOID
CpuidPlatformQosEnforcementResidSubLeaf (
VOID
)
{
CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF_EAX Eax;
UINT32 Ebx;
CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF_ECX Ecx;
CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF_EDX Edx;
AsmCpuidEx (
CPUID_PLATFORM_QOS_ENFORCEMENT, CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF,
&Eax.Uint32, &Ebx, &Ecx.Uint32, &Edx.Uint32
);
Print (L"CPUID_PLATFORM_QOS_ENFORCEMENT (Leaf %08x, Sub-Leaf %08x)\n", CPUID_PLATFORM_QOS_ENFORCEMENT, CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx, Ecx.Uint32, Edx.Uint32);
PRINT_BIT_FIELD (Eax, CapacityLength);
PRINT_VALUE (Ebx, AllocationUnitBitMap);
PRINT_BIT_FIELD (Ecx, CosUpdatesInfrequent);
PRINT_BIT_FIELD (Ecx, CodeDataPrioritization);
PRINT_BIT_FIELD (Edx, HighestCosNumber);
}
void
cpuFeatures_disable(int cpu, CpuFeature type)
{
int ret;
uint64_t flags;
ret = HPMread(cpu, MSR_DEV, MSR_IA32_MISC_ENABLE, &flags);
switch ( type )
{
case HW_PREFETCHER:
printf("HW_PREFETCHER:\t");
flags |= (1ULL<<9);
break;
case CL_PREFETCHER:
printf("CL_PREFETCHER:\t");
flags |= (1ULL<<19);
break;
case DCU_PREFETCHER:
printf("DCU_PREFETCHER:\t");
flags |= (1ULL<<37);
break;
case IP_PREFETCHER:
printf("IP_PREFETCHER:\t");
flags |= (1ULL<<39);
break;
default:
printf("ERROR: CpuFeature not supported!\n");
break;
}
PRINT_VALUE(RED,disabled);
printf("\n");
HPMwrite(cpu, MSR_DEV, MSR_IA32_MISC_ENABLE, flags);
}
/* Get and print status from apcupsd NIS server */
static int apc_query_server (char *host, int port,
struct apc_detail_s *apcups_detail)
{
int n;
char recvline[1024];
char *tokptr;
char *toksaveptr;
char *key;
double value;
_Bool retry = 1;
int status;
#if APCMAIN
# define PRINT_VALUE(name, val) printf(" Found property: name = %s; value = %f;\n", name, val)
#else
# define PRINT_VALUE(name, val) /**/
#endif
while (retry)
{
if (global_sockfd < 0)
{
global_sockfd = net_open (host, port);
if (global_sockfd < 0)
{
ERROR ("apcups plugin: Connecting to the "
"apcupsd failed.");
return (-1);
}
}
status = net_send (&global_sockfd, "status", strlen ("status"));
if (status != 0)
{
/* net_send is closing the socket on error. */
assert (global_sockfd < 0);
if (retry)
{
retry = 0;
count_retries++;
continue;
}
ERROR ("apcups plugin: Writing to the socket failed.");
return (-1);
}
break;
} /* while (retry) */
/* When collectd's collection interval is larger than apcupsd's
* timeout, we would have to retry / re-connect each iteration. Try to
* detect this situation and shut down the socket gracefully in that
* case. Otherwise, keep the socket open to avoid overhead. */
count_iterations++;
if ((count_iterations == 10) && (count_retries > 2))
{
NOTICE ("apcups plugin: There have been %i retries in the "
"first %i iterations. Will close the socket "
"in future iterations.",
count_retries, count_iterations);
close_socket = 1;
}
while ((n = net_recv (&global_sockfd, recvline, sizeof (recvline) - 1)) > 0)
{
assert ((unsigned int)n < sizeof (recvline));
recvline[n] = '\0';
#if APCMAIN
printf ("net_recv = `%s';\n", recvline);
#endif /* if APCMAIN */
toksaveptr = NULL;
tokptr = strtok_r (recvline, " :\t", &toksaveptr);
while (tokptr != NULL)
{
key = tokptr;
if ((tokptr = strtok_r (NULL, " :\t", &toksaveptr)) == NULL)
continue;
value = atof (tokptr);
PRINT_VALUE (key, value);
if (strcmp ("LINEV", key) == 0)
apcups_detail->linev = value;
else if (strcmp ("BATTV", key) == 0)
apcups_detail->battv = value;
else if (strcmp ("ITEMP", key) == 0)
apcups_detail->itemp = value;
else if (strcmp ("LOADPCT", key) == 0)
apcups_detail->loadpct = value;
else if (strcmp ("BCHARGE", key) == 0)
apcups_detail->bcharge = value;
else if (strcmp ("OUTPUTV", key) == 0)
apcups_detail->outputv = value;
else if (strcmp ("LINEFREQ", key) == 0)
apcups_detail->linefreq = value;
else if (strcmp ("TIMELEFT", key) == 0)
{
/* Convert minutes to seconds if requested by
* the user. */
if (conf_report_seconds)
value *= 60.0;
apcups_detail->timeleft = value;
}
tokptr = strtok_r (NULL, ":", &toksaveptr);
} /* while (tokptr != NULL) */
}
status = errno; /* save errno, net_shutdown() may re-set it. */
if (close_socket)
net_shutdown (&global_sockfd);
if (n < 0)
{
char errbuf[1024];
ERROR ("apcups plugin: Reading from socket failed: %s",
sstrerror (status, errbuf, sizeof (errbuf)));
return (-1);
}
return (0);
}
void
cpuFeatures_print(int cpu)
{
int ret;
uint64_t flags;
ret = HPMread(cpu, MSR_DEV, MSR_IA32_MISC_ENABLE, &flags);
printf(HLINE);
printf("Fast-Strings: \t\t\t");
if (flags & 1)
{
PRINT_VALUE(GREEN,enabled);
}
else
{
PRINT_VALUE(RED,disabled);
}
printf("Automatic Thermal Control: \t");
if (flags & (1ULL<<3))
{
PRINT_VALUE(GREEN,enabled);
}
else
{
PRINT_VALUE(RED,disabled);
}
printf("Performance monitoring: \t");
if (flags & (1ULL<<7))
{
PRINT_VALUE(GREEN,enabled);
}
else
{
PRINT_VALUE(RED,disabled);
}
printf("Branch Trace Storage: \t\t");
if (flags & (1ULL<<11))
{
PRINT_VALUE(RED,notsupported);
}
else
{
PRINT_VALUE(GREEN,supported);
}
printf("PEBS: \t\t\t\t");
if (flags & (1ULL<<12))
{
PRINT_VALUE(RED,notsupported);
}
else
{
PRINT_VALUE(GREEN,supported);
}
printf("Intel Enhanced SpeedStep: \t");
if (flags & (1ULL<<16))
{
PRINT_VALUE(GREEN,enabled);
}
else
{
PRINT_VALUE(RED,disabled);
}
printf("MONITOR/MWAIT: \t\t\t");
if (flags & (1ULL<<18))
{
PRINT_VALUE(GREEN,supported);
}
else
{
PRINT_VALUE(RED,notsupported);
}
printf("Limit CPUID Maxval: \t\t");
if (flags & (1ULL<<22))
{
PRINT_VALUE(RED,enabled);
}
else
{
PRINT_VALUE(GREEN,disabled);
}
printf("XD Bit Disable: \t\t");
if (flags & (1ULL<<34))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
printf("IP Prefetcher: \t\t\t");
if (flags & (1ULL<<39))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
printf("Hardware Prefetcher: \t\t");
if (flags & (1ULL<<9))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
printf("Adjacent Cache Line Prefetch: \t");
if (flags & (1ULL<<19))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
printf("DCU Prefetcher: \t\t");
if (flags & (1ULL<<37))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
if ((cpuid_info.model == NEHALEM) ||
(cpuid_info.model == NEHALEM_BLOOMFIELD) ||
(cpuid_info.model == NEHALEM_LYNNFIELD) ||
(cpuid_info.model == NEHALEM_WESTMERE) ||
(cpuid_info.model == NEHALEM_WESTMERE_M) ||
(cpuid_info.model == NEHALEM_EX))
{
printf("Intel Turbo Mode: \t");
if (flags & (1ULL<<38))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
}
else if ((cpuid_info.model == CORE2_45) ||
(cpuid_info.model == CORE2_65))
{
printf("Intel Dynamic Acceleration: \t");
if (flags & (1ULL<<38))
{
PRINT_VALUE(RED,disabled);
}
else
{
PRINT_VALUE(GREEN,enabled);
}
}
printf(HLINE);
}
mql_result_t *mql_result_string_create_column_change(const char *table,
const char *col,
mqi_change_value_t *value,
mql_result_t *rsel)
{
#define EVENT 0
#define TABLE 1
#define COLUMN 2
#define VALUE 3
#define FLDS 4
static const char *hstr[FLDS] = {" event", "table" , "column", "change"};
static int hlen[FLDS] = { 6 , 5 , 6 , 6 };
result_string_t *rs = (result_string_t *)rsel;
result_string_t *rslt;
char buf[1024];
int l;
int len[FLDS];
const char *cstr[FLDS];
int cw[FLDS];
int linlen;
size_t esiz;
size_t ssiz;
size_t size;
char *p;
int i;
MDB_CHECKARG(table && col && value &&
(!rsel || (rsel && rsel->type == mql_result_string)), NULL);
cstr[EVENT] = "'column changed'";
cstr[TABLE] = table;
cstr[COLUMN] = col;
cstr[VALUE] = buf;
for (i = 0; i < VALUE; i++)
len[i] = strlen(cstr[i]);
#define PRINT_VALUE(fmt,t) \
snprintf(buf, sizeof(buf), fmt " => " fmt, value->old.t, value->new_.t)
#define PRINT_UNKNOWN \
snprintf(buf, sizeof(buf), "<unknown> => <unknown>");
switch (value->type) {
case mqi_varchar:
l = PRINT_VALUE("'%s'" , varchar );
break;
case mqi_integer:
l = PRINT_VALUE("%d" , integer );
break;
case mqi_unsignd:
l = PRINT_VALUE("%u" , unsignd );
break;
case mqi_floating:
l = PRINT_VALUE("%.2lf", floating);
break;
default:
l = PRINT_UNKNOWN;
break;
}
#undef PRINT
len[VALUE] = l;
for (linlen = (FLDS-1) * 2 + 1, i = 0; i < FLDS; i++)
linlen += (cw[i] = len[i] > hlen[i] ? len[i] : hlen[i]);
esiz = linlen * 3;
ssiz = rs ? rs->length : 0;
size = esiz + ssiz + 2;
if (!(rslt = calloc(1, sizeof(result_string_t) + size))) {
errno = ENOMEM;
return NULL;
}
p = rslt->string;
for (i = 0; i < FLDS; i++)
p += sprintf(p, "%-*s%s", cw[i], hstr[i], i == FLDS-1 ? "\n" : " ");
memset(p, '-', linlen-1);
p[linlen-1] = '\n';
p += linlen;
for (i = 0; i < FLDS; i++)
p += sprintf(p, "%-*s%s", cw[i], cstr[i], i == FLDS-1 ? "\n" : " ");
if (ssiz > 0) {
*p++ = '\n';
memcpy(p, rs->string, ssiz);
}
rslt->type = mql_result_string;
rslt->length = p - rslt->string;
return (mql_result_t *)rslt;
#undef FLDS
#undef VALUE
#undef COLUMN
#undef TABLE
#undef EVENT
}
std::ostream& operator<<(std::ostream& os, const Dealer& d)
{
switch(d){
PRINT_VALUE(BARX);
PRINT_VALUE(BOFA);
PRINT_VALUE(CITI);
PRINT_VALUE(DB);
PRINT_VALUE(HSBC);
PRINT_VALUE(JPM);
PRINT_VALUE(MS);
PRINT_VALUE(RBC);
PRINT_VALUE(RBS);
PRINT_VALUE(UBS);
PRINT_VALUE(UNKNOWN_DEALER);
}
}
/* fmPlatformCfgDump
* \ingroup intPlatform
*
* \desc Dump platform configuration.
*
* \return NONE.
*
*****************************************************************************/
void fmPlatformCfgDump(void)
{
fm_platformCfg * platCfg;
fm_platformCfgLib * libCfg;
fm_platformCfgPort * portCfg;
fm_platformCfgLane * laneCfg;
fm_platformCfgSwitch *swCfg;
fm_platformCfgPhy * phyCfg;
fm_gn2412LaneCfg * phyLaneCfg;
fm_int swIdx;
fm_int portIdx;
fm_int epl;
fm_int lane;
fm_int phyIdx;
fm_char tmpStr[MAX_BUF_SIZE+1];
platCfg = FM_PLAT_GET_CFG;
PRINT_VALUE("debug", platCfg->debug);
PRINT_VALUE("numSwitches", FM_PLAT_NUM_SW);
PRINT_STRING("platformName", platCfg->name);
PRINT_STRING("fileLockName", platCfg->fileLockName);
#ifdef FM_SUPPORT_SWAG
PRINT_STRING("topology",
GetStrMap( platCfg->topology,
swagTopology,
FM_NENTRIES(swagTopology),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
#endif
for (swIdx = 0 ; swIdx < FM_PLAT_NUM_SW ; swIdx++)
{
/* Logical switch is the same as swIdx */
FM_LOG_PRINT("################################ SW#%d ################################\n", swIdx);
swCfg = FM_PLAT_GET_SWITCH_CFG(swIdx);
PRINT_VALUE(" swIdx", swCfg->swIdx);
PRINT_VALUE(" switchNumber", swCfg->swNum);
PRINT_VALUE(" numPorts", swCfg->numPorts);
PRINT_VALUE(" maxLogicalPortValue", swCfg->maxLogicalPortValue);
PRINT_VALUE(" ledPollPeriodMsec", swCfg->ledPollPeriodMsec);
PRINT_STRING(" ledBlinkMode",
GetStrMap( swCfg->ledBlinkMode,
ledBlinkModeMap,
FM_NENTRIES(ledBlinkModeMap),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_VALUE(" xcvrPollPeriodMsec", swCfg->xcvrPollPeriodMsec);
PRINT_VALUE(" intrPollPeriodMsec", swCfg->intrPollPeriodMsec);
PRINT_STRING(" uioDevName", swCfg->uioDevName);
PRINT_STRING(" netDevName", swCfg->netDevName);
PRINT_STRING(" devMemOffset", swCfg->devMemOffset);
PRINT_VALUE(" gpioPortIntr", swCfg->gpioPortIntr);
PRINT_VALUE(" gpioI2cReset", swCfg->gpioI2cReset);
PRINT_VALUE(" gpioFlashWP", swCfg->gpioFlashWP);
PRINT_VALUE(" enablePhyDeEmphasis", swCfg->enablePhyDeEmphasis);
PRINT_VALUE(" vrm.useDefVoltages", swCfg->vrm.useDefVoltages);
PRINT_VALUE(" VDDS.hwResourceId",
swCfg->vrm.hwResourceId[FM_PLAT_VRM_VDDS]);
PRINT_VALUE(" VDDF.hwResourceId",
swCfg->vrm.hwResourceId[FM_PLAT_VRM_VDDF]);
PRINT_VALUE(" AVDD.hwResourceId",
swCfg->vrm.hwResourceId[FM_PLAT_VRM_AVDD]);
PRINT_VALUE(" fhClock", swCfg->fhClock);
#ifdef FM_SUPPORT_SWAG
PRINT_STRING(" switchRole",
GetStrMap( swCfg->switchRole,
swagRole,
FM_NENTRIES(swagRole),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
#endif
for (portIdx = 0 ; portIdx < FM_PLAT_NUM_PORT(swIdx) ; portIdx++)
{
portCfg = FM_PLAT_GET_PORT_CFG(swIdx, portIdx);
FM_LOG_PRINT("==============Port Index %d============\n", portIdx);
PRINT_VALUE(" logicalPort", portCfg->port);
PRINT_VALUE(" hwResourceId", portCfg->hwResourceId);
PRINT_VALUE(" physPort", portCfg->physPort);
PRINT_VALUE(" epl", portCfg->epl);
PRINT_VALUE(" lane[0]", portCfg->lane[0]);
PRINT_VALUE(" lane[1]", portCfg->lane[1]);
PRINT_VALUE(" lane[2]", portCfg->lane[2]);
PRINT_VALUE(" lane[3]", portCfg->lane[3]);
PRINT_VALUE(" pep", portCfg->pep);
PRINT_VALUE(" tunnel", portCfg->tunnel);
PRINT_VALUE(" loopback", portCfg->loopback);
PRINT_VALUE(" speed", portCfg->speed);
PRINT_VALUE(" autodetect", portCfg->autodetect);
PRINT_STRING( " ethMode",
GetStrMap( portCfg->ethMode,
ethModeMap,
FM_NENTRIES(ethModeMap),
TRUE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_STRING( " portType",
GetStrMap( portCfg->portType,
portTypeMap,
FM_NENTRIES(portTypeMap),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_STRING( " intfType",
GetStrMap( portCfg->intfType,
intfTypeMap,
FM_NENTRIES(intfTypeMap),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_STRING( " capability",
GetStrBitMap( portCfg->cap,
portCapMap,
FM_NENTRIES(portCapMap),
tmpStr,
sizeof(tmpStr) ) );
PRINT_STRING(" dfeMode",
GetStrMap(portCfg->dfeMode,
dfeModeMap,
FM_NENTRIES(dfeModeMap),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_STRING( " an73Ability",
GetStrBitMap( portCfg->an73Ability,
an73AbilityMap,
FM_NENTRIES(an73AbilityMap),
tmpStr,
sizeof(tmpStr) ) );
PRINT_VALUE(" phyNum", portCfg->phyNum);
PRINT_VALUE(" phyPort", portCfg->phyPort);
#ifdef FM_SUPPORT_SWAG
PRINT_STRING(" swagLinkType",
GetStrMap( portCfg->swagLink.type,
swagLinkType,
FM_NENTRIES(swagLinkType),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
if (portCfg->swagLink.type == FM_SWAG_LINK_INTERNAL)
{
FM_LOG_PRINT(" SWAG port %d <--> SWAG port %d\n",
portCfg->swagLink.logicalPort, portCfg->swagLink.partnerLogicalPort);
FM_LOG_PRINT(" SW %d, port %d <--> SW %d, port %d\n",
portCfg->swagLink.swId, portCfg->swagLink.swPort,
portCfg->swagLink.partnerSwitch, portCfg->swagLink.partnerPort);
}
else if (portCfg->swagLink.type == FM_SWAG_LINK_EXTERNAL)
{
FM_LOG_PRINT(" SWAG port %d, SW %d, port %d\n",
portCfg->swagLink.logicalPort,
portCfg->swagLink.swId, portCfg->swagLink.swPort);
}
#endif
FM_LOG_PRINT("\n");
}
for (epl = 0 ; epl < FM_PLAT_NUM_EPL ; epl++)
{
FM_LOG_PRINT("#######################################\n");
FM_LOG_PRINT("# EPL %d #\n", epl);
FM_LOG_PRINT("#######################################\n");
PRINT_VALUE(" laneToPortIdx[0]", swCfg->epls[epl].laneToPortIdx[0]);
PRINT_VALUE(" laneToPortIdx[1]", swCfg->epls[epl].laneToPortIdx[1]);
PRINT_VALUE(" laneToPortIdx[2]", swCfg->epls[epl].laneToPortIdx[2]);
PRINT_VALUE(" laneToPortIdx[3]", swCfg->epls[epl].laneToPortIdx[3]);
for (lane = 0 ; lane < FM_PLAT_LANES_PER_EPL ; lane++)
{
FM_LOG_PRINT("============ EPL %d, lane %d ============\n", epl, lane);
laneCfg = &swCfg->epls[epl].lane[lane];
PRINT_STRING(" lanePolarity",
GetStrMap(laneCfg->lanePolarity,
lanePolarityMap,
FM_NENTRIES(lanePolarityMap),
FALSE,
tmpStr,
sizeof(tmpStr)));
PRINT_STRING(" rxTermination",
GetStrMap(laneCfg->rxTermination,
rxTerminationMap,
FM_NENTRIES(rxTerminationMap),
FALSE,
tmpStr,
sizeof(tmpStr)));
PRINT_VALUE(" preCursor1GCopper",
laneCfg->copper[BPS_1G].preCursor);
PRINT_VALUE(" preCursor10GCopper",
laneCfg->copper[BPS_10G].preCursor);
PRINT_VALUE(" preCursor25GCopper",
laneCfg->copper[BPS_25G].preCursor);
PRINT_VALUE(" preCursor1GOptical",
laneCfg->optical[BPS_1G].preCursor);
PRINT_VALUE(" preCursor10GOptical",
laneCfg->optical[BPS_10G].preCursor);
PRINT_VALUE(" preCursor25GOptical",
laneCfg->optical[BPS_25G].preCursor);
PRINT_VALUE(" cursor1GCopper",
laneCfg->copper[BPS_1G].cursor);
PRINT_VALUE(" cursor10GCopper",
laneCfg->copper[BPS_10G].cursor);
PRINT_VALUE(" cursor25GCopper",
laneCfg->copper[BPS_25G].cursor);
PRINT_VALUE(" cursor1GOptical",
laneCfg->optical[BPS_1G].cursor);
PRINT_VALUE(" cursor10GOptical",
laneCfg->optical[BPS_10G].cursor);
PRINT_VALUE(" cursor25GOptical",
laneCfg->optical[BPS_25G].cursor);
PRINT_VALUE(" postCursor1GCopper",
laneCfg->copper[BPS_1G].postCursor);
PRINT_VALUE(" postCursor10GCopper",
laneCfg->copper[BPS_10G].postCursor);
PRINT_VALUE(" postCursor25GCopper",
laneCfg->copper[BPS_25G].postCursor);
PRINT_VALUE(" postCursor1GOptical",
laneCfg->optical[BPS_1G].postCursor);
PRINT_VALUE(" postCursor10GOptical",
laneCfg->optical[BPS_10G].postCursor);
PRINT_VALUE(" postCursor25GOptical",
laneCfg->optical[BPS_25G].postCursor);
FM_LOG_PRINT("\n");
}
FM_LOG_PRINT("\n");
}
for ( phyIdx = 0 ; phyIdx < FM_PLAT_NUM_PHY(swIdx) ; phyIdx++ )
{
phyCfg = FM_PLAT_GET_PHY_CFG(swIdx, phyIdx);
FM_LOG_PRINT("==============PHY Index %d============\n", phyIdx);
PRINT_STRING(" model",
GetStrMap( phyCfg->model,
phyModelMap,
FM_NENTRIES(phyModelMap),
FALSE,
tmpStr,
sizeof(tmpStr) ) );
PRINT_VALUE(" addr", phyCfg->addr);
PRINT_VALUE(" hwResourceId", phyCfg->hwResourceId);
if ( phyCfg->model == FM_PLAT_PHY_GN2412 )
{
for ( lane = 0 ; lane < FM_GN2412_NUM_LANES ; lane++ )
{
phyLaneCfg = &phyCfg->gn2412Lane[lane];
FM_LOG_PRINT(" ======== GN2412 %d, lane %d ========\n",
phyIdx,
lane);
PRINT_VALUE(" appMode", phyLaneCfg->appMode);
PRINT_VALUE(" polarity", phyLaneCfg->polarity);
PRINT_VALUE(" preTap", phyLaneCfg->preTap);
PRINT_VALUE(" attenuation", phyLaneCfg->attenuation);
PRINT_VALUE(" postTap", phyLaneCfg->postTap);
}
}
FM_LOG_PRINT("\n");
}
FM_LOG_PRINT(" Shared Library Config:\n");
libCfg = FM_PLAT_GET_LIBS_CFG(swIdx);
PRINT_STRING(" sharedLibraryName", libCfg->libName);
PRINT_STRING(" disableFuncIntf",
GetStrBitMap( libCfg->disableFuncIntf,
disableFuncIntfMap,
FM_NENTRIES(disableFuncIntfMap),
tmpStr,
sizeof(tmpStr) ) );
PRINT_VALUE(" tlvCfgBufSize", libCfg->tlvCfgBufSize);
PRINT_VALUE(" tlvCfgLen", libCfg->tlvCfgLen);
FM_LOG_PRINT("#######################################################################\n\n");
}
return;
} /* end fmPlatformCfgDump */
