static int ehci_msm_run(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
int retval = 0;
int port = HCS_N_PORTS(ehci->hcs_params);
u32 __iomem *reg_ptr;
u32 hcc_params;
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
hcd->uses_new_polling = 1;
hcd->poll_rh = 0;
USBH_INFO("%s\n", __func__);
/* set hostmode */
reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
ehci_writel(ehci, (USBMODE_VBUS | USBMODE_SDIS), reg_ptr);
/* port configuration - phy, port speed, port power, port enable */
while (port--)
ehci_writel(ehci, (PTS_VAL(pdata->phy_info) | PORT_POWER |
PORT_PE), &ehci->regs->port_status[port]);
ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
if (HCC_64BIT_ADDR(hcc_params))
ehci_writel(ehci, 0, &ehci->regs->segment);
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
ehci->command |= CMD_RUN;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
hcd->state = HC_STATE_RUNNING;
/*Enable appropriate Interrupts*/
ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
return retval;
}
static int ehci_msm_run(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
int retval = 0;
int port = HCS_N_PORTS(ehci->hcs_params);
u32 __iomem *reg_ptr;
u32 hcc_params;
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
hcd->uses_new_polling = 1;
hcd->poll_rh = 0;
/* set hostmode */
reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
ehci_writel(ehci, (USBMODE_VBUS | USBMODE_SDIS), reg_ptr);
/* port configuration - phy, port speed, port power, port enable */
while (port--)
ehci_writel(ehci, (PTS_VAL(pdata->phy_info) | PORT_POWER |
PORT_PE), &ehci->regs->port_status[port]);
ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
if (HCC_64BIT_ADDR(hcc_params))
ehci_writel(ehci, 0, &ehci->regs->segment);
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
ehci->command |= CMD_RUN;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
/*
* Start, enabling full USB 2.0 functionality ... usb 1.1 devices
* are explicitly handed to companion controller(s), so no TT is
* involved with the root hub. (Except where one is integrated,
* and there's no companion controller unless maybe for USB OTG.)
*
* Turning on the CF flag will transfer ownership of all ports
* from the companions to the EHCI controller. If any of the
* companions are in the middle of a port reset at the time, it
* could cause trouble. Write-locking ehci_cf_port_reset_rwsem
* guarantees that no resets are in progress. After we set CF,
* a short delay lets the hardware catch up; new resets shouldn't
* be started before the port switching actions could complete.
*/
down_write(&ehci_cf_port_reset_rwsem);
hcd->state = HC_STATE_RUNNING;
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
msleep(5);
up_write(&ehci_cf_port_reset_rwsem);
/*Enable appropriate Interrupts*/
ehci_writel(ehci, INTR_MASK,
&ehci->regs->intr_enable);
return retval;
}
