PVRSRV_ERROR RGXCreateCCB(PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32CCBSizeLog2,
CONNECTION_DATA *psConnectionData,
const IMG_CHAR *pszName,
RGX_SERVER_COMMON_CONTEXT *psServerCommonContext,
RGX_CLIENT_CCB **ppsClientCCB,
DEVMEM_MEMDESC **ppsClientCCBMemDesc,
DEVMEM_MEMDESC **ppsClientCCBCtrlMemDesc)
{
PVRSRV_ERROR eError;
DEVMEM_FLAGS_T uiClientCCBMemAllocFlags, uiClientCCBCtlMemAllocFlags;
IMG_UINT32 ui32AllocSize = (1U << ui32CCBSizeLog2);
RGX_CLIENT_CCB *psClientCCB;
psClientCCB = OSAllocMem(sizeof(*psClientCCB));
if (psClientCCB == IMG_NULL)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto fail_alloc;
}
psClientCCB->psServerCommonContext = psServerCommonContext;
uiClientCCBMemAllocFlags = PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(PMMETA_PROTECT) |
PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(META_CACHED) |
PVRSRV_MEMALLOCFLAG_GPU_READABLE |
PVRSRV_MEMALLOCFLAG_GPU_WRITEABLE |
PVRSRV_MEMALLOCFLAG_CPU_READABLE |
PVRSRV_MEMALLOCFLAG_UNCACHED |
PVRSRV_MEMALLOCFLAG_ZERO_ON_ALLOC |
PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE;
uiClientCCBCtlMemAllocFlags = PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(PMMETA_PROTECT) |
PVRSRV_MEMALLOCFLAG_GPU_READABLE |
PVRSRV_MEMALLOCFLAG_GPU_WRITEABLE |
PVRSRV_MEMALLOCFLAG_CPU_READABLE |
PVRSRV_MEMALLOCFLAG_CPU_WRITEABLE |
PVRSRV_MEMALLOCFLAG_UNCACHED |
PVRSRV_MEMALLOCFLAG_ZERO_ON_ALLOC |
PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE;
PDUMPCOMMENT("Allocate RGXFW cCCB");
eError = DevmemFwAllocateExportable(psDeviceNode,
ui32AllocSize,
uiClientCCBMemAllocFlags,
"FirmwareClientCCB",
&psClientCCB->psClientCCBMemDesc);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVRGXCreateCCBKM: Failed to allocate RGX client CCB (%s)",
PVRSRVGetErrorStringKM(eError)));
goto fail_alloc_ccb;
}
eError = DevmemAcquireCpuVirtAddr(psClientCCB->psClientCCBMemDesc,
(IMG_VOID **) &psClientCCB->pui8ClientCCB);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVRGXCreateCCBKM: Failed to map RGX client CCB (%s)",
PVRSRVGetErrorStringKM(eError)));
goto fail_map_ccb;
}
PDUMPCOMMENT("Allocate RGXFW cCCB control");
eError = DevmemFwAllocateExportable(psDeviceNode,
sizeof(RGXFWIF_CCCB_CTL),
uiClientCCBCtlMemAllocFlags,
"FirmwareClientCCBControl",
&psClientCCB->psClientCCBCtrlMemDesc);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVRGXCreateCCBKM: Failed to allocate RGX client CCB control (%s)",
PVRSRVGetErrorStringKM(eError)));
goto fail_alloc_ccbctrl;
}
eError = DevmemAcquireCpuVirtAddr(psClientCCB->psClientCCBCtrlMemDesc,
(IMG_VOID **) &psClientCCB->psClientCCBCtrl);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVRGXCreateCCBKM: Failed to map RGX client CCB (%s)",
PVRSRVGetErrorStringKM(eError)));
goto fail_map_ccbctrl;
}
psClientCCB->psClientCCBCtrl->ui32WriteOffset = 0;
psClientCCB->psClientCCBCtrl->ui32ReadOffset = 0;
psClientCCB->psClientCCBCtrl->ui32DepOffset = 0;
psClientCCB->psClientCCBCtrl->ui32WrapMask = ui32AllocSize - 1;
OSStringCopy(psClientCCB->szName, pszName);
PDUMPCOMMENT("cCCB control");
DevmemPDumpLoadMem(psClientCCB->psClientCCBCtrlMemDesc,
0,
sizeof(RGXFWIF_CCCB_CTL),
PDUMP_FLAGS_CONTINUOUS);
PVR_ASSERT(eError == PVRSRV_OK);
psClientCCB->ui32HostWriteOffset = 0;
psClientCCB->ui32LastPDumpWriteOffset = 0;
psClientCCB->ui32Size = ui32AllocSize;
#if defined REDUNDANT_SYNCS_DEBUG
psClientCCB->ui32UpdateWriteIndex = 0;
OSMemSet(psClientCCB->asFenceUpdateList, 0, sizeof(psClientCCB->asFenceUpdateList));
#endif
eError = PDumpRegisterTransitionCallback(psConnectionData->psPDumpConnectionData,
_RGXCCBPDumpTransition,
psClientCCB,
&psClientCCB->hTransition);
if (eError != PVRSRV_OK)
{
goto fail_pdumpreg;
}
/*
Note:
Due to resman the connection structure could be freed before the client
CCB so rather then saving off the connection structure save the PDump
specific memory which is refcounted to ensure it's not freed too early
*/
psClientCCB->psPDumpConnectionData = psConnectionData->psPDumpConnectionData;
PDUMPCOMMENT("New RGXFW cCCB(%s@%p) created",
psClientCCB->szName,
psClientCCB);
*ppsClientCCB = psClientCCB;
*ppsClientCCBMemDesc = psClientCCB->psClientCCBMemDesc;
*ppsClientCCBCtrlMemDesc = psClientCCB->psClientCCBCtrlMemDesc;
return PVRSRV_OK;
fail_pdumpreg:
DevmemReleaseCpuVirtAddr(psClientCCB->psClientCCBCtrlMemDesc);
fail_map_ccbctrl:
DevmemFwFree(psClientCCB->psClientCCBCtrlMemDesc);
fail_alloc_ccbctrl:
DevmemReleaseCpuVirtAddr(psClientCCB->psClientCCBMemDesc);
fail_map_ccb:
DevmemFwFree(psClientCCB->psClientCCBMemDesc);
fail_alloc_ccb:
OSFreeMem(psClientCCB);
fail_alloc:
PVR_ASSERT(eError != PVRSRV_OK);
return eError;
}
/*
* RGXRegisterMemoryContext
*/
PVRSRV_ERROR RGXRegisterMemoryContext(PVRSRV_DEVICE_NODE *psDeviceNode,
MMU_CONTEXT *psMMUContext,
IMG_HANDLE *hPrivData)
{
PVRSRV_ERROR eError;
PVRSRV_RGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
DEVMEM_FLAGS_T uiFWMemContextMemAllocFlags;
RGXFWIF_FWMEMCONTEXT *psFWMemContext;
DEVMEM_MEMDESC *psFWMemContextMemDesc;
SERVER_MMU_CONTEXT *psServerMMUContext;
if (psDevInfo->psKernelMMUCtx == IMG_NULL)
{
/*
* This must be the creation of the Kernel memory context. Take a copy
* of the MMU context for use when programming the BIF.
*/
psDevInfo->psKernelMMUCtx = psMMUContext;
}
else
{
psServerMMUContext = OSAllocMem(sizeof(*psServerMMUContext));
if (psServerMMUContext == IMG_NULL)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto fail_alloc_server_ctx;
}
psServerMMUContext->psDevInfo = psDevInfo;
/*
* This FW MemContext is only mapped into kernel for initialisation purposes.
* Otherwise this allocation is only used by the FW.
* Therefore the GPU cache doesn't need coherency,
* and write-combine is suffice on the CPU side (WC buffer will be flushed at any kick)
*/
uiFWMemContextMemAllocFlags = PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(PMMETA_PROTECT) |
PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(META_CACHED) |
PVRSRV_MEMALLOCFLAG_GPU_READABLE |
PVRSRV_MEMALLOCFLAG_GPU_WRITEABLE |
PVRSRV_MEMALLOCFLAG_GPU_CACHE_INCOHERENT |
PVRSRV_MEMALLOCFLAG_CPU_READABLE |
PVRSRV_MEMALLOCFLAG_CPU_WRITEABLE |
PVRSRV_MEMALLOCFLAG_CPU_WRITE_COMBINE |
PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE;
/*
Allocate device memory for the firmware memory context for the new
application.
*/
PDUMPCOMMENT("Allocate RGX firmware memory context");
/* FIXME: why cache-consistent? */
eError = DevmemFwAllocate(psDevInfo,
sizeof(*psFWMemContext),
uiFWMemContextMemAllocFlags,
"FirmwareMemoryContext",
&psFWMemContextMemDesc);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to allocate firmware memory context (%u)",
eError));
goto fail_alloc_fw_ctx;
}
/*
Temporarily map the firmware memory context to the kernel.
*/
eError = DevmemAcquireCpuVirtAddr(psFWMemContextMemDesc,
(IMG_VOID **)&psFWMemContext);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to map firmware memory context (%u)",
eError));
goto fail_acquire_cpu_addr;
}
/*
* Write the new memory context's page catalogue into the firmware memory
* context for the client.
*/
eError = MMU_AcquireBaseAddr(psMMUContext, &psFWMemContext->sPCDevPAddr);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to acquire Page Catalogue address (%u)",
eError));
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
goto fail_acquire_base_addr;
}
/*
* Set default values for the rest of the structure.
*/
psFWMemContext->uiPageCatBaseRegID = -1;
psFWMemContext->uiBreakpointAddr = 0;
psFWMemContext->uiBPHandlerAddr = 0;
psFWMemContext->uiBreakpointCtl = 0;
#if defined(SUPPORT_GPUVIRT_VALIDATION)
{
IMG_UINT32 ui32OSid = 0, ui32OSidReg = 0;
MMU_GetOSids(psMMUContext, &ui32OSid, &ui32OSidReg);
psFWMemContext->ui32OSid = ui32OSidReg;
}
#endif
#if defined(PDUMP)
{
IMG_CHAR aszName[PMR_MAX_MEMSPNAME_SYMB_ADDR_LENGTH_DEFAULT];
IMG_DEVMEM_OFFSET_T uiOffset = 0;
/*
* Dump the Mem context allocation
*/
DevmemPDumpLoadMem(psFWMemContextMemDesc, 0, sizeof(*psFWMemContext), PDUMP_FLAGS_CONTINUOUS);
/*
* Obtain a symbolic addr of the mem context structure
*/
eError = DevmemPDumpPageCatBaseToSAddr(psFWMemContextMemDesc,
&uiOffset,
aszName,
PMR_MAX_MEMSPNAME_SYMB_ADDR_LENGTH_DEFAULT);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to generate a Dump Page Catalogue address (%u)",
eError));
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
goto fail_pdump_cat_base_addr;
}
/*
* Dump the Page Cat tag in the mem context (symbolic address)
*/
eError = MMU_PDumpWritePageCatBase(psMMUContext,
aszName,
uiOffset,
8, /* 64-bit register write */
0,
0,
0);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to acquire Page Catalogue address (%u)",
eError));
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
goto fail_pdump_cat_base;
}
}
#endif
/*
* Release kernel address acquired above.
*/
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
/*
* Store the process information for this device memory context
* for use with the host page-fault analysis.
*/
psServerMMUContext->uiPID = OSGetCurrentProcessID();
psServerMMUContext->psMMUContext = psMMUContext;
psServerMMUContext->psFWMemContextMemDesc = psFWMemContextMemDesc;
if (OSSNPrintf(psServerMMUContext->szProcessName,
RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME,
"%s",
OSGetCurrentProcessName()) == RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME)
{
psServerMMUContext->szProcessName[RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME-1] = '\0';
}
OSWRLockAcquireWrite(psDevInfo->hMemoryCtxListLock);
dllist_add_to_tail(&psDevInfo->sMemoryContextList, &psServerMMUContext->sNode);
OSWRLockReleaseWrite(psDevInfo->hMemoryCtxListLock);
MMU_SetDeviceData(psMMUContext, psFWMemContextMemDesc);
*hPrivData = psServerMMUContext;
}
return PVRSRV_OK;
#if defined(PDUMP)
fail_pdump_cat_base:
fail_pdump_cat_base_addr:
MMU_ReleaseBaseAddr(IMG_NULL);
#endif
fail_acquire_base_addr:
/* Done before jumping to the fail point as the release is done before exit */
fail_acquire_cpu_addr:
DevmemFwFree(psServerMMUContext->psFWMemContextMemDesc);
fail_alloc_fw_ctx:
OSFreeMem(psServerMMUContext);
fail_alloc_server_ctx:
PVR_ASSERT(eError != PVRSRV_OK);
return eError;
}
