int HAL_Feature_Set(HAL_Feature feature, bool enabled)
{
switch (feature)
{
case FEATURE_RETAINED_MEMORY:
{
FunctionalState state = enabled ? ENABLE : DISABLE;
// Switch on backup SRAM clock
// Switch on backup power regulator, so that it survives the deep sleep mode,
// software and hardware reset. Power must be supplied to VIN or VBAT to retain SRAM values.
PWR_BackupRegulatorCmd(state);
// Wait until backup power regulator is ready, should be fairly instantaneous... but timeout in 10ms.
if (state == ENABLE) {
system_tick_t start = HAL_Timer_Get_Milli_Seconds();
while (PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET) {
if (HAL_Timer_Get_Milli_Seconds() - start > 10UL) {
return -2;
}
};
}
return 0;
}
}
return -1;
}
/**-----------------------------------------------------------------------------
* @brief Entree en mode Stop.
*/
void STOP_MODE() {
EXTI_InitTypeDef EXTI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
// Config IT
SYSCFG_EXTILineConfig(EXTI_PortSourceGPIOA, EXTI_PinSource0); // Connect EXTI Line0 to PA0 pin
// Configure EXTI Line0
EXTI_InitStructure.EXTI_Line = EXTI_Line0;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
// Enable and set EXTI Line0 Interrupt to the lowest priority
NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Config Mode Stop
PWR_WakeUpPinCmd(ENABLE);
PWR_BackupRegulatorCmd(DISABLE);
PWR_FlashPowerDownCmd(ENABLE);
/* Enable PWR and BKP clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Entree Mode Stop
PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
}
OSStatus platform_rtc_init(void)
{
#ifdef MICO_ENABLE_MCU_RTC
RTC_InitTypeDef RTC_InitStruct;
RTC_DeInit( );
RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24;
/* RTC ticks every second */
RTC_InitStruct.RTC_AsynchPrediv = 0x7F;
RTC_InitStruct.RTC_SynchPrediv = 0xFF;
RTC_Init( &RTC_InitStruct );
#ifdef USE_RTC_BKP
/* Enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Allow access to BKP Domain */
PWR_BackupAccessCmd(ENABLE);
PWR_BackupRegulatorCmd(ENABLE);
#endif
/* Enable the LSE OSC */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
/* Enable the RTC Clock */
RCC_RTCCLKCmd(ENABLE);
/* RTC configuration -------------------------------------------------------*/
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
#ifdef USE_RTC_BKP
if (RTC_ReadBackupRegister(RTC_BKP_DR0) != USE_RTC_BKP) {
/* set it to 12:20:30 08/04/2013 monday */
platform_rtc_set_time(&default_rtc_time);
RTC_WriteBackupRegister(RTC_BKP_DR0, USE_RTC_BKP);
}
#else
//#ifdef RTC_ENABLED
/* application must have mico_application_default_time structure declared somewhere, otherwise it wont compile */
/* write default application time inside rtc */
platform_rtc_set_time(&mico_default_time);
//#endif /* RTC_ENABLED */
#endif
return kNoErr;
#else
return kUnsupportedErr;
#endif
}
void Backup_SRAM_Write_Reg(void *backup_reg, void *source_reg,uint8_t reg_size)
{
uint8_t i=0;
PWR_BackupAccessCmd(ENABLE); // set PWR->CR.dbp = 1;
PWR_BackupRegulatorCmd(ENABLE); // set PWR->CSR.bre = 1;
for(i=0;i<reg_size;i++)
{
*((uint8_t*)backup_reg+i)=*((uint8_t*)source_reg+i);
}
PWR_BackupAccessCmd(DISABLE); // reset PWR->CR.dbp = 0;
}
void Backup_SRAM_Write_Reg(void *backup_reg, void *source_reg,uint8_t reg_size)
{
uint8_t i=0;
uint8_t *back_crc=(uint8_t*)(BKPSRAM_BASE+sizeof(struct uks_parameters));
PWR_BackupAccessCmd(ENABLE); // set PWR->CR.dbp = 1;
PWR_BackupRegulatorCmd(ENABLE); // set PWR->CSR.bre = 1;
for(i=0;i<reg_size;i++)
{
*((uint8_t*)backup_reg+i)=*((uint8_t*)source_reg+i);
}
*back_crc=CRC_Check((uint8_t*)(uks_channels.backup_uks_params),sizeof(struct uks_parameters));
PWR_BackupAccessCmd(DISABLE); // reset PWR->CR.dbp = 0;
}
void BKPSRAM_Init(void) {
/* Enable PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Enable backup SRAM Clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
/* Allow access to backup domain */
PWR_BackupAccessCmd(ENABLE);
/* Enable the Backup SRAM low power Regulator */
/* This will allow data to stay when using VBat mode */
PWR_BackupRegulatorCmd(ENABLE);
/* Wait for backup regulator to be ready */
while (PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET);
}
int8_t Backup_SRAM_Write( int16_t *data, uint16_t bytes, uint16_t offset )
{
const uint16_t backup_size = 0x1000;
int16_t* base_addr = (int16_t *) BKPSRAM_BASE;
uint16_t i;
if( bytes + offset >= backup_size ) {
/* ERROR : the last byte is outside the backup SRAM region */
return -1;
}
PWR_BackupAccessCmd(ENABLE); // set PWR->CR.dbp = 1;
PWR_BackupRegulatorCmd(ENABLE); // set PWR->CSR.bre = 1;
for( i = 0; i < bytes; i++ ) {
*(base_addr + offset + i) = *(data + i);
}
PWR_BackupAccessCmd(DISABLE); // reset PWR->CR.dbp = 0;
return 0;
}
/**
* @brief This function configures the system to enter Standby mode with RTC
* clocked by LSE or LSI and with Backup SRAM ON for current consumption
* measurement purpose.
* STANDBY Mode with RTC clocked by LSE/LSI and BKPSRAM
* ====================================================
* - RTC Clocked by LSE or LSI
* - Backup SRAM ON
* - IWDG OFF
* - Automatic Wakeup using RTC clocked by LSE/LSI (after ~20s)
* @param None
* @retval None
*/
void StandbyRTCBKPSRAMMode_Measure(void)
{
/* Allow access to RTC */
PWR_BackupAccessCmd(ENABLE);
#if defined (RTC_CLOCK_SOURCE_LSI) /* LSI used as RTC source clock*/
/* The RTC Clock may varies due to LSI frequency dispersion. */
/* Enable the LSI OSC */
RCC_LSICmd(ENABLE);
/* Wait till LSI is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
#elif defined (RTC_CLOCK_SOURCE_LSE) /* LSE used as RTC source clock */
/* Enable the LSE OSC */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
#else
#error Please select the RTC Clock source inside the main.c file
#endif /* RTC_CLOCK_SOURCE_LSI */
/* Enable the RTC Clock */
RCC_RTCCLKCmd(ENABLE);
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
/* Backup SRAM ***************************************************************/
/* Enable BKPRAM Clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
/* Enable the Backup SRAM low power Regulator */
PWR_BackupRegulatorCmd(ENABLE);
/* Wait until the Backup SRAM low power Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET)
{
}
/* RTC Wakeup Interrupt Generation: Clock Source: RTCCLK_Div16, Wakeup Time Base: ~20s
RTC Clock Source LSE 32.768KHz or LSI ~32KHz
Wakeup Time Base = (16 / (LSE or LSI)) * WakeUpCounter
*/
RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div16);
RTC_SetWakeUpCounter(0xA000-1);
/* Disable the Wakeup Interrupt */
RTC_ITConfig(RTC_IT_WUT, DISABLE);
/* Clear Power WakeUp (CWUF) pending flag */
PWR_ClearFlag(PWR_FLAG_WU);
/* Enable the Wakeup Interrupt */
RTC_ITConfig(RTC_IT_WUT, ENABLE);
/* Enable Wakeup Counter */
RTC_WakeUpCmd(ENABLE);
/* Clear WakeUp (WUTF) pending flag */
RTC_ClearFlag(RTC_FLAG_WUTF);
/* Request to enter STANDBY mode (Wake Up flag is cleared in PWR_EnterSTANDBYMode function) */
PWR_EnterSTANDBYMode();
/* Infinite loop */
while (1)
{
}
}
void RTC_Wakeup_init(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
RTC_InitTypeDef RTC_InitStruct;
RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24;
/* RTC ticks every second */
RTC_InitStruct.RTC_AsynchPrediv = 0x7F;
RTC_InitStruct.RTC_SynchPrediv = 0xFF;
RTC_Init( &RTC_InitStruct );
/* Enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* RTC clock source configuration ------------------------------------------*/
/* Allow access to BKP Domain */
PWR_BackupAccessCmd(ENABLE);
#ifdef USE_RTC_BKP
PWR_BackupRegulatorCmd(ENABLE);
#endif
/* Enable the LSE OSC */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
/* Enable the RTC Clock */
RCC_RTCCLKCmd(ENABLE);
/* RTC configuration -------------------------------------------------------*/
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
RTC_WakeUpCmd( DISABLE );
EXTI_ClearITPendingBit( RTC_INTERRUPT_EXTI_LINE );
PWR_ClearFlag(PWR_FLAG_WU);
RTC_ClearFlag(RTC_FLAG_WUTF);
RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
EXTI_ClearITPendingBit( RTC_INTERRUPT_EXTI_LINE );
EXTI_InitStructure.EXTI_Line = RTC_INTERRUPT_EXTI_LINE;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = RTC_WKUP_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
RTC_ITConfig(RTC_IT_WUT, DISABLE);
/* Prepare Stop-Mode but leave disabled */
PWR_ClearFlag(PWR_FLAG_WU);
PWR->CR |= PWR_CR_LPDS;
PWR->CR &= (unsigned long)(~(PWR_CR_PDDS));
SCB->SCR |= ((unsigned long)SCB_SCR_SLEEPDEEP_Msk);
#ifdef USE_RTC_BKP
if (RTC_ReadBackupRegister(RTC_BKP_DR0) != USE_RTC_BKP) {
/* set it to 12:20:30 08/04/2013 monday */
MicoRtcSetTime(&mico_default_time);
RTC_WriteBackupRegister(RTC_BKP_DR0, USE_RTC_BKP);
}
#else
//#ifdef RTC_ENABLED
/* application must have wiced_application_default_time structure declared somewhere, otherwise it wont compile */
/* write default application time inside rtc */
MicoRtcSetTime(&mico_default_time);
//#endif /* RTC_ENABLED */
#endif
}
/**
* @brief Configure the RTC peripheral by selecting the clock source.
* @param None
* @retval None
*/
void RTC_Config(void)
{
/* Enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Allow access to RTC */
PWR_BackupAccessCmd(ENABLE);
#if defined (RTC_CLOCK_SOURCE_LSI) /* LSI used as RTC source clock*/
/* The RTC Clock may varies due to LSI frequency dispersion. */
/* Enable the LSI OSC */
RCC_LSICmd(ENABLE);
/* Wait till LSI is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
SynchPrediv = 0xFF;
AsynchPrediv = 0x7F;
#elif defined (RTC_CLOCK_SOURCE_LSE) /* LSE used as RTC source clock */
/* Enable the LSE OSC */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
SynchPrediv = 0xFF;
AsynchPrediv = 0x7F;
#else
#error Please select the RTC Clock source inside the main.c file
#endif /* RTC_CLOCK_SOURCE_LSI */
/* Enable the RTC Clock */
RCC_RTCCLKCmd(ENABLE);
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
/* Write to the first RTC Backup Data Register */
RTC_WriteBackupRegister(RTC_BKP_DR0, FIRST_DATA);
/* Display the new RCC BDCR and RTC TAFCR Registers */
LCD_UsrLog ("RTC Reconfig \n");
LCD_UsrLog ("RCC BDCR = 0x%x\n", RCC->BDCR);
LCD_UsrLog ("RTC TAFCR = 0x%x\n", RTC->TAFCR);
/* Set the Time */
RTC_TimeStructure.RTC_Hours = 0x08;
RTC_TimeStructure.RTC_Minutes = 0x00;
RTC_TimeStructure.RTC_Seconds = 0x00;
/* Set the Date */
RTC_DateStructure.RTC_Month = RTC_Month_March;
RTC_DateStructure.RTC_Date = 0x18;
RTC_DateStructure.RTC_Year = 0x11;
RTC_DateStructure.RTC_WeekDay = RTC_Weekday_Friday;
/* Calendar Configuration */
RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
RTC_InitStructure.RTC_SynchPrediv = SynchPrediv;
RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
RTC_Init(&RTC_InitStructure);
/* Set Current Time and Date */
RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure);
/* Configure the RTC Wakeup Clock source and Counter (Wakeup event each 1 second) */
RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div16);
RTC_SetWakeUpCounter(0x7FF);
/* Enable the Wakeup Interrupt */
RTC_ITConfig(RTC_IT_WUT, ENABLE);
/* Enable Wakeup Counter */
RTC_WakeUpCmd(ENABLE);
/* Backup SRAM ***************************************************************/
/* Enable BKPRAM Clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
/* Write to Backup SRAM with 32-Bit Data */
for (i = 0x0; i < 0x1000; i += 4)
{
*(__IO uint32_t *) (BKPSRAM_BASE + i) = i;
}
/* Check the written Data */
for (i = 0x0; i < 0x1000; i += 4)
{
if ((*(__IO uint32_t *) (BKPSRAM_BASE + i)) != i)
{
errorindex++;
}
}
if(errorindex)
{
LCD_ErrLog ("BKP SRAM Number of errors = %d\n", errorindex);
}
else
{
LCD_UsrLog ("BKP SRAM write OK \n");
}
/* Enable the Backup SRAM low power Regulator to retain it's content in VBAT mode */
PWR_BackupRegulatorCmd(ENABLE);
/* Wait until the Backup SRAM low power Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET)
{
}
/* RTC Backup Data Registers **************************************************/
/* Write to RTC Backup Data Registers */
WriteToBackupReg(FIRST_DATA);
}
void RTC_Configuration(void)
{
/* Enable the PWR APB1 Clock Interface */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Allow access to BKP Domain */
PWR_BackupAccessCmd(ENABLE);
if (RTC_ReadBackupRegister(RTC_BKP_DR2) != 0xA5A5) {
/* Enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Allow access to RTC */
PWR_BackupAccessCmd(ENABLE);
#if defined (RTC_CLOCK_SOURCE_LSI) /* LSI used as RTC source clock*/
/* The RTC Clock may varies due to LSI frequency dispersion. */
/* Enable the LSI OSC */
RCC_LSICmd(ENABLE);
/* Wait till LSI is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
SynchPrediv = 0xFF;
AsynchPrediv = 0x7F;
#elif defined (RTC_CLOCK_SOURCE_LSE) /* LSE used as RTC source clock */
/* Enable the LSE OSC */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{
}
/* Select the RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
SynchPrediv = 0xFF;
AsynchPrediv = 0x7F;
#else
#error Please select the RTC Clock source inside the main.c file
#endif /* RTC_CLOCK_SOURCE_LSI */
/* Enable the RTC Clock */
RCC_RTCCLKCmd(ENABLE);
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
/* Allow access to BKP Domain */
PWR_BackupAccessCmd(ENABLE);
/* Write to the first RTC Backup Data Register */
RTC_WriteBackupRegister(RTC_BKP_DR2,0xA5A5);
/* Set the Time */
RTC_TimeStructure.RTC_Hours = 22;
RTC_TimeStructure.RTC_Minutes = 11;
RTC_TimeStructure.RTC_Seconds = 00;
/* Set the Date */
RTC_DateStructure.RTC_Month = 4;
RTC_DateStructure.RTC_Date = 29;
RTC_DateStructure.RTC_Year = 11;
RTC_DateStructure.RTC_WeekDay = RTC_Weekday_Friday;
/* Calendar Configuration */
RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
RTC_InitStructure.RTC_SynchPrediv = SynchPrediv;
RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
RTC_Init(&RTC_InitStructure);
/* Set Current Time and Date */
RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure);
RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure);
#if 0
/* Configure the RTC Wakeup Clock source and Counter (Wakeup event each 1 second) */
RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div16);
RTC_SetWakeUpCounter(0x7FF);
/* Enable the Wakeup Interrupt */
RTC_ITConfig(RTC_IT_WUT, ENABLE);
/* Enable Wakeup Counter */
RTC_WakeUpCmd(ENABLE);
#endif
/* Backup SRAM ***************************************************************/
/* Enable BKPRAM Clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
/* Enable the Backup SRAM low power Regulator to retain it's content in VBAT mode */
PWR_BackupRegulatorCmd(ENABLE);
/* Wait until the Backup SRAM low power Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET)
{
}
}
else{
/* Enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Allow access to RTC */
PWR_BackupAccessCmd(ENABLE);
/* Wait for RTC APB registers synchronisation */
RTC_WaitForSynchro();
/* Clear the Wakeup Interrupt */
RTC_ClearITPendingBit(RTC_IT_WUT);
/* Backup SRAM ***************************************************************/
/* Enable BKPSRAM Clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
}
}
