/*******************************************************************************
* Function Name : Demo_Init
* Description : Initializes the demonstration application.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void Demo_Init(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG
| RCC_APB2Periph_AFIO, ENABLE);
/* TIM1 Periph clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
/*------------------- Resources Initialization -----------------------------*/
/* GPIO Configuration */
GPIO_Config();
/* Interrupt Configuration */
InterruptConfig();
/* Configure the systick */
SysTick_Configuration();
/*------------------- Drivers Initialization -------------------------------*/
/* Initialize the LEDs toogling */
LedShow_Init();
/* Initialize the Low Power application */
LowPower_Init();
/* Initialize the LCD */
STM3210E_LCD_Init();
/* Clear the LCD */
LCD_Clear(White);
/* If HSE is not detected at program startup */
if(HSEStartUpStatus == ERROR)
{
/* Generate NMI exception */
SCB->ICSR |= SCB_ICSR_NMIPENDSET;
}
/* Checks the availability of the bitmap files */
CheckBitmapFilesStatus();
/* Display the STM32 introduction */
STM32Intro();
/* Clear the LCD */
LCD_Clear(White);
/* Initialize the Calendar */
Calendar_Init();
/* Enable Leds toggling */
LedShow(ENABLE);
/* Initialize the Low Power application*/
LowPower_Init();
/* Set the LCD Back Color */
LCD_SetBackColor(Blue);
/* Set the LCD Text Color */
LCD_SetTextColor(White);
/* Initialize the Menu */
Menu_Init();
/* Display the main menu icons */
ShowMenuIcons();
}
/**
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
#else
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{
}
}
}
static void prvSetupHardware( void )
{
/* Start with the clocks in their expected state. */
RCC_DeInit();
/* Enable HSE (high speed external clock). */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready. */
while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET )
{
}
/* 2 wait states required on the flash. */
*( ( unsigned portLONG * ) 0x40022000 ) = 0x02;
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1 );
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1 );
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config( RCC_HCLK_Div2 );
/* PLLCLK = 8MHz * 9 = 72 MHz. */
RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 );
/* Enable PLL. */
RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source. */
RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK );
/* Wait till PLL is used as system clock source. */
while( RCC_GetSYSCLKSource() != 0x08 )
{
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA |
RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC |
RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF |
RCC_APB2Periph_AFIO,
ENABLE );
/* SPI2 Periph clock enable */
RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE );
RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM3, ENABLE );
/* Set the Vector Table base address at 0x08000000 */
NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */
SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );
}
/**
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @return None
*/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
//RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2); // for Baudrate 600 support
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6);
// RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* TIM2 clock enable */
// RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2|RCC_APB1Periph_TIM3|RCC_APB1Periph_USART2, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2 | RCC_APB1Periph_USART2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD
|RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1, ENABLE);
}
}
int main() {
/* === Configure Clocks === */
/*--- Setup clock: use HSE Clock (8Mhz external crystal) ---
* - Enable HSE
* - Wait for HSE to come up
*/
RCC->CR |= RCC_CR_HSEON;
while (!(RCC->CR & RCC_CR_HSERDY)) {};
/* --- Set SYSCLK and sub-systems clock ---
* - HCLK (DMA&AHB bus)
* - PCLK2 (ABPS2 periphs)
* - PCLK1 (ABPS1 periphs)
* - wait untill PLL is locked
*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
while (RCC_GetSYSCLKSource() != 0x04) {};
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div1);
/* === SysTick setup ===*/
/* Configure SysTick to fire an interrupt each 0.001s
* set SysTick clock source as System Clock/8 (1Mhz)
*/
SysTick_Config(0x03E8);//10^3
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);//1Mhz source clock
/* === Setup USART2 === */
/* --- Setup TX and RX pins associated with USART2 ---
* - Set TX as PushPull (PA2)
* - Set RX as floating (PA3)
* - Enable Clock on GPIO PortA
*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
GPIO_USART_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_USART_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_USART_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_USART_InitStructure);
GPIO_USART_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_USART_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_Init(GPIOA, &GPIO_USART_InitStructure);
/* --- Enable USART2 ---
* - Init control structure with defaul paramters:
* (115200/8n1/No HW flow Control/TX+RX)
* - enable USART2 port clock
* - Init USART2
* - Enable Transmission
*/
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART2, &USART_InitStructure);
USART_Cmd(USART2, ENABLE);
/* === Setup GPIO for LED (GPIOF Pin9 = LED4) === */
/* - Enable GPIOF clock
* - Pin 9 as output
* - Speed and Pull-Push mode
*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOF, &GPIO_InitStructure);
while(1) {
// USART_SendData(USART2,(uint8_t) 's');
// while (USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
print("Please, be kind and print something\n\0");
GPIOF->BRR = GPIO_Pin_9;
delay_ms(1000);
GPIOF->BSRR = GPIO_Pin_9;
delay_ms(1000);
}
return 0;
}
/**
* @brief This function configures the system to enter Low Power Sleep mode for
* current consumption measurement purpose.
* The maximum clock when the system is in Low Power Run mode is ~128KHz.
* This mode can only be entered when Voltage Range 2 is selected.
* Low Power Sleep Mode
* ====================
* - System Running at MSI (~32KHz)
* - Flash 0 wait state
* - Voltage Range 2
* - Code running from Internal FLASH
* - All peripherals OFF
* - VDD from 1.65V to 3.6V
* - Current Consumption ~4.07uA
* - Wakeup using EXTI Line (Key Button PA.00)
* @param None
* @retval None
*/
void LowPowerSleepMode_Measure(void)
{
/* Configure the System Clock to MSI Range 0 (65KHz). ----------------------*/
/* RCC system reset */
RCC_DeInit();
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
/* Disable Prefetch Buffer */
FLASH_PrefetchBufferCmd(DISABLE);
/* Disable 64-bit access */
FLASH_ReadAccess64Cmd(DISABLE);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 2 (1.5V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range2);
/* Wait Until the Voltage Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{
}
/* HCLK = SYSCLK/2 = ~32KHz */
RCC_HCLKConfig(RCC_SYSCLK_Div2);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Set MSI clock range to 65.536KHz */
RCC_MSIRangeConfig(RCC_MSIRange_0);
/* Select MSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_MSI);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x00)
{}
/* Configure all GPIO as analog to reduce current consumption on non used IOs */
/* Enable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_Init(GPIOE, &GPIO_InitStructure);
GPIO_Init(GPIOH, &GPIO_InitStructure);
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Disable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, DISABLE);
/* Configure Key Button*/
STM_EVAL_PBInit(BUTTON_KEY,BUTTON_MODE_GPIO);
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) == RESET)
{
}
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) != RESET)
{
}
/* Configure Key Button*/
STM_EVAL_PBInit(BUTTON_KEY,BUTTON_MODE_EXTI);
/* Enable The ultra Low Power Mode */
PWR_UltraLowPowerCmd(ENABLE);
/* Enable the power down mode during Sleep mode */
FLASH_SLEEPPowerDownCmd(ENABLE);
/* Request to enter SLEEP mode with regulator in low power mode */
PWR_EnterSleepMode(PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI);
/* Initialize LED1 on STM32L152-EVAL board */
STM_EVAL_LEDInit(LED1);
/* Infinite loop */
while (1)
{
/* Toggle The LED1 */
STM_EVAL_LEDToggle(LED1);
/* Inserted Delay */
for(index = 0; index < 0x5FF; index++);
}
}
/********************************************************************************
* FunctionName: MyRCCInit
*
* Description : RCC初始化
*
* Parameters : None
*
* Returns : None
*******************************************************************************/
void MyRCCInit(void)
{
#if 0
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
#endif
#if 0
/*定义枚举类型变量HSEStartUpStatus*/
ErrorStatus HSEStartUpStatus;
RCC_DeInit(); /*复位系统时钟设置*/
RCC_HSEConfig(RCC_HSE_ON); /*开启HSE*/
HSEStartUpStatus = RCC_WaitForHSEStartUp(); /*等待HSE起振并稳定*/
/*判断HSE是否起振成功，是则进入if*/
if(HSEStartUpStatus == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1); /*选择HCLK(AHB)时钟源为SYSCLK 1分频*/
RCC_PCLK2Config(RCC_HCLK_Div1); /*选择PCLK2时钟源为HCLK(AHB) 1分频*/
RCC_PCLK1Config(RCC_HCLK_Div2); /*选择PCLK1时钟源为HCLK(AHB) 2分频*/
FLASH_SetLatency(FLASH_Latency_2); /*设置Flash延时周期数为2*/
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /*使能Flash预取缓存*/
/*选择PLL时钟源为HSE 1分频，倍频数为9，则PLL=8MHz*9=72MHz*/
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);
RCC_PLLCmd(ENABLE); /*使能PLL*/
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); /*等待PLL输出稳定*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /*选择SYSCLK时钟源为PLL*/
while(RCC_GetSYSCLKSource() != 0x08); /*等待PLL称为SYSCLK时钟源*/
}
/*打开APB2总线上的PWR，BKP时钟*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP,ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
// RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
#endif
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
}
/**
* @brief Selects HSI as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetHCLKToHSI(void)
{
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSI */
RCC_HSICmd(ENABLE);
/* Wait till HSI is ready and if Time out is reached exit */
do
{
HSIStatus = RCC_GetFlagStatus(RCC_FLAG_HSIRDY);
StartUpCounter++;
}
while ((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
if (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) != RESET)
{
HSIStatus = (uint32_t)0x01;
}
else
{
HSIStatus = (uint32_t)0x00;
}
if (HSIStatus == 0x01)
{
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
/* Disable Prefetch Buffer */
FLASH_PrefetchBufferCmd(DISABLE);
/* Disable 64-bit access */
FLASH_ReadAccess64Cmd(DISABLE);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 1 (1.8V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range1);
/* Wait Until the Voltage Regulator is ready */
while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{}
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Select HSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
/* Wait till HSI is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x04)
{}
}
else
{ /* If HSI fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
/**
* @brief Selects PLL as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetHCLKTo32(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable 64-bit access */
FLASH_ReadAccess64Cmd(ENABLE);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(ENABLE);
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 1 (1.8V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range1);
/* Wait Until the Voltage Regulator is ready */
while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{}
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* PLL configuration: PLLCLK = (HSE * 12) / 3 = 32MHz */
RCC_PLLConfig(RCC_PLLSource_HSE, RCC_PLLMul_12, RCC_PLLDiv_3);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x0C)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
/*******************************************************************************
* Function Name : Set_System
* Description : Configures Main system clocks & power
* Input : None.
* Return : None.
*******************************************************************************/
void Set_System(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/6 */
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
/* Enable GPIOA, GPIOD and USART1 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOD
| RCC_APB2Periph_USART1, ENABLE);
/* Enable USB_DISCONNECT GPIO clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE);
/* Configure USB pull-up pin */
GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure);
/* Configure USART1 Rx (PA.10) as input floating */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* Configure USART1 Tx (PA.09) as alternate function push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
}
void BSP_Init (void)
{
BSP_IntInit();
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON); /* HSE = 25MHz ext. crystal. */
RCC_WaitForHSEStartUp();
RCC_PREDIV2Config(RCC_PREDIV2_Div5); /* Fprediv2 = HSE / 5 = 5MHz. */
RCC_PLL2Config(RCC_PLL2Mul_8); /* PLL2 = Fprediv2 * 8 = 40MHz. */
RCC_PLL2Cmd(ENABLE);
RCC_PLL3Config(RCC_PLL3Mul_10); /* PLL3 = Fprediv2 * 10 = 50MHz. */
RCC_PLL3Cmd(ENABLE);
RCC_HCLKConfig(RCC_SYSCLK_Div1); /* HCLK = AHBCLK = PLL1 / AHBPRES(1) = 72MHz. */
RCC_PCLK2Config(RCC_HCLK_Div1); /* APB2CLK = AHBCLK / APB2DIV(1) = 72MHz. */
RCC_PCLK1Config(RCC_HCLK_Div2); /* APB1CLK = AHBCLK / APB1DIV(2) = 36MHz (max). */
RCC_ADCCLKConfig(RCC_PCLK2_Div6); /* ADCCLK = AHBCLK / APB2DIV / 6 = 12MHz. */
RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLL1VCO_Div3); /* OTGCLK = PLL1VCO / USBPRES(3) = 144MHz / 3 = 48MHz */
FLASH_SetLatency(FLASH_Latency_2); /* 2 Flash wait states when HCLK > 48MHz. */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) { /* Wait for PLL2 to lock. */
;
}
while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) { /* Wait for PLL3 to lock. */
;
}
/* Fprediv1 = PLL2 / 5 = 8MHz. */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLL1Config(RCC_PLL1Source_PREDIV1, RCC_PLL1Mul_9); /* PLL1 = Fprediv1 * 9 = 72Mhz. */
RCC_PLL1Cmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLL1RDY) == RESET) { /* Wait for PLL1 to lock. */
;
}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLL1CLK); /* HCLK = SYSCLK = PLL1 = 72MHz. */
while (RCC_GetSYSCLKSource() != 0x08) {
;
}
BSP_CPU_ClkFreq_MHz = BSP_CPU_ClkFreq() / (CPU_INT32U)1000000;
BSP_CPU_ClkFreq_MHz = BSP_CPU_ClkFreq_MHz; /* Surpress compiler warning BSP_CPU_ClkFreq_MHz ... */
/* ... set and not used. */
BSP_LED_Init(); /* Initialize the I/Os for the LED controls. */
BSP_StatusInit(); /* Initialize the status input(s) */
#ifdef TRACE_EN /* See project / compiler preprocessor options. */
DBGMCU_CR |= DBGMCU_CR_TRACE_IOEN_MASK; /* Enable tracing (see Note #2). */
DBGMCU_CR &= ~DBGMCU_CR_TRACE_MODE_MASK; /* Clr trace mode sel bits. */
DBGMCU_CR |= DBGMCU_CR_TRACE_MODE_SYNC_04; /* Cfg trace mode to synch 4-bit. */
#endif
}
/**
* @brief This function configures the systick timer to 100hz overflow
* @param None
* @retval None
*/
void SysTick_Configuration(void) {
RCC_HCLKConfig(RCC_SYSCLK_Div1); //CLK the periferal - configure the AHB clk
SysTick_Config(90000); //SYSTICK at 100Hz - this function also enables the interrupt
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); //SYSTICK AHB1/8
}
void RCC_Conf()
{
//zmienna opisujaca rezultat uruchomienia HSE
ErrorStatus HSEStartUpStatus;
//Reset ustawien RCC
RCC_DeInit();
//wlacz HSE
RCC_HSEConfig(RCC_HSE_ON);
//czekaj na gotowosc HSE
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
//ustaw opoznienie dla pamieci flash w zaleznosci od taktowania rdzenia
//opoznienie 0 cykli, gdy F_CPU <24MHz
//opoznienie 1 cykl, gdy F_CPU 24~48 MHz
//opoznienie 2 cykle gdy F_CPU >48 MHz
FLASH_PrefetchBufferCmd(ENABLE);
FLASH_SetLatency(FLASH_Latency_5);
//ustaw HCLK = SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//ustaw PCLK1 = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div4); //MAX 42MHz
//ustaw PCLK2 = HCLK
RCC_PCLK2Config(RCC_HCLK_Div2); //MAX 84 MHz
//ustaw PLLCLK PLLM = 8, PLLN = 336, PLLP = 2, PLLQ = 7
//PLLCLK = (HSE * (PLLN/PLLM))/PLLP = 168MHz (MAX 168MHz)
//USB OTG FS, SDIO, RNG clock output = PLLCLK / PLLQ (MAX 48MHz)
RCC_PLLConfig(RCC_PLLSource_HSE,8,336,2,7);
//wlacz PLL
RCC_PLLCmd(ENABLE);
//odczekaj na poprawne uruchomienie PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
//ustaw PLL jako zrodlo sygnalu zegarowego
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//odczekaj az PLL bedzie sygnalem zegarowym systemu
while(RCC_GetSYSCLKSource() != 0x08);
/*kod zwiazany z konfiguracja sygnalow zegarowych potrzebnych w programie peryferiow*/
//Wlacz taktowanie portu D
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
}else
{}
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD,ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_ResetBits(GPIOD,GPIO_Pin_13);
}
/*******************************************************************************
* Function Name : Set_System
* Description : Configures Main system clocks & power.
* Input : None.
* Return : None.
*******************************************************************************/
void Set_System(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* On STICE the PLL output clock is fixed to 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
/* enable the PWR clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Set all the GPIOs to AIN */
GPIO_AINConfig();
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE);
/* USB_DISCONNECT used as USB pull-up */
GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure);
}
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable USART5, GPIOA,and AFIO clocks */
/* Enable USART5, GPIOA, GPIOB, and AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 |
RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD |
RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_AFIO, ENABLE);
RCC_APB1PeriphClockCmd ( RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_TIM5 |
RCC_APB1Periph_USART3 | RCC_APB1Periph_UART5 | RCC_APB1Periph_SPI2|
RCC_APB1Periph_BKP | RCC_APB1Periph_PWR, ENABLE);
PWR_BackupAccessCmd(ENABLE);
}
/*=============================================================================
* Function :
* Description :
* Input Para :
* Output Para :
* Return Value :
=============================================================================*/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
#ifdef STM3210C
rcc_pll_set();
#else
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable PWR and BKP clocks */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
/* Allow access to BKP Domain */
// PWR_BackupAccessCmd(ENABLE);
// /* Reset Backup Domain */
RCC_LSEConfig(RCC_LSE_ON);
/* Wait till LSE is ready */
while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
{}
/* Select LSE as RTC Clock Source */
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
/* Enable RTC Clock */
RCC_RTCCLKCmd(ENABLE);
}
/**
* @brief This function configures the system to enter Sleep mode for
* current consumption measurement purpose.
* Sleep Mode
* ==========
* - System Running at HSI (16MHz)
* - Flash 1 wait state
* - Voltage Range 2
* - Code running from Internal FLASH
* - Current Consumption ~1mA
* - Wakeup using EXTI Line (Key Button PA.00)
* @param None
* @retval None
*/
void SleepMode_Measure(void)
{
/* Configure System Clock to HSI (16MHz) */
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSI */
RCC_HSICmd(ENABLE);
/* Wait till HSI is ready and if Time out is reached exit */
do
{
HSIStatus = RCC_GetFlagStatus(RCC_FLAG_HSIRDY);
StartUpCounter++;
} while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
if (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) != RESET)
{
HSIStatus = (uint32_t)0x01;
}
else
{
HSIStatus = (uint32_t)0x00;
}
if (HSIStatus == 0x01)
{
/* Enable 64-bit access */
FLASH_ReadAccess64Cmd(ENABLE);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(ENABLE);
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 2 (1.5V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range2);
/* Wait Until the Voltage Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{
}
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Select HSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
/* Wait till HSI is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x04)
{}
}
else
{
/* If HSI fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
/* Configure all GPIO as analog to reduce current consumption on non used IOs */
/* Enable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_Init(GPIOE, &GPIO_InitStructure);
GPIO_Init(GPIOH, &GPIO_InitStructure);
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Disable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, DISABLE);
/* Configure Key Button*/
STM_EVAL_PBInit(BUTTON_KEY,BUTTON_MODE_GPIO);
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) == RESET)
{
}
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) != RESET)
{
}
/* Configure Key Button*/
STM_EVAL_PBInit(BUTTON_KEY,BUTTON_MODE_EXTI);
/* Request to enter SLEEP mode with regulator ON */
PWR_EnterSleepMode(PWR_Regulator_ON, PWR_SLEEPEntry_WFI);
/* Initialize LED1 on STM32L152-EVAL board */
STM_EVAL_LEDInit(LED1);
/* Infinite loop */
while (1)
{
/* Toggle The LED1 */
STM_EVAL_LEDToggle(LED1);
/* Inserted Delay */
for(index = 0; index < 0x5FFFF; index++);
}
}
/**
* @brief Configures the different system clocks.
* @param None
* @retval None
*/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/4 */
RCC_ADCCLKConfig(RCC_PCLK2_Div4);
#ifndef STM32F10X_CL
/* PLLCLK = 8MHz * 7 = 56 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
#else
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 7 = 56 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_7);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable ADC1 and GPIO_LED clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
}
/**
* @brief This function configures the system to enter Low Power Run mode for
* current consumption measurement purpose.
* The maximum clock when the system is in Low Power Run mode is ~128KHz.
* This mode can only be entered when Voltage Range 2 is selected.
* Low Power Run Mode from SRAM:
* =============================
* - System Running at MSI (~32KHz)
* - Flash 0 wait state
* - Voltage Range 2
* - Code running from Internal SRAM
* - All peripherals OFF
* - FLASH switched OFF
* - VDD from 1.65V to 3.6V
* - Current Consumption ~10.5uA
* - Wakeup using Key Button PA.00
* Low Power Run Mode from FLASH:
* ==============================
* - System Running at MSI (~32KHz)
* - Flash 0 wait state
* - Voltage Range 2
* - Code running from Internal FLASH
* - All peripherals OFF
* - VDD from 1.65V to 3.6V
* - Current Consumption ~25uA
* - Wakeup using Key Button PA.00
* @param None
* @retval None
*/
void LowPowerRunMode_Measure(void)
{
/* Configure the System Clock to MSI Range 0 (65KHz). ----------------------*/
/* RCC system reset */
RCC_DeInit();
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
/* Disable Prefetch Buffer */
FLASH_PrefetchBufferCmd(DISABLE);
/* Disable 64-bit access */
FLASH_ReadAccess64Cmd(DISABLE);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 2 (1.5V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range2);
/* Wait Until the Voltage Regulator is ready */
while(PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{
}
/* HCLK = SYSCLK/2 = ~32KHz */
RCC_HCLKConfig(RCC_SYSCLK_Div2);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Set MSI clock range to 65.536KHz */
RCC_MSIRangeConfig(RCC_MSIRange_0);
/* Select MSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_MSI);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x00)
{}
/* Configure all GPIO as analog to reduce current consumption on non used IOs */
/* Enable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_Init(GPIOE, &GPIO_InitStructure);
GPIO_Init(GPIOH, &GPIO_InitStructure);
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Disable GPIOs clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC |
RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOH |
RCC_AHBPeriph_GPIOF | RCC_AHBPeriph_GPIOG, DISABLE);
/* Configure Key Button*/
STM_EVAL_PBInit(BUTTON_KEY,BUTTON_MODE_GPIO);
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) == RESET)
{
}
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) != RESET)
{
}
/* Enter RUN LP Mode */
PWR_EnterLowPowerRunMode(ENABLE);
/* Wait until the system enters RUN LP and the Regulator is in LP mode */
while(PWR_GetFlagStatus(PWR_FLAG_REGLP) == RESET)
{
}
/* Jump to Internal SRAM and Switch the internal FLASH OFF */
#if defined (LP_RUN_SRAM_MODE)
LowPowerRunModeSRAM_Measure();
#elif defined (LP_RUN_FLASH_MODE)
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) == RESET)
{
}
/* Wait Until Key button pressed */
while(STM_EVAL_PBGetState(BUTTON_KEY) != RESET)
{
}
#endif
/* Exit the RUN LP Mode */
PWR_EnterLowPowerRunMode(DISABLE);
/* Wait until the system exits RUN LP and the Regulator is in main mode */
while(PWR_GetFlagStatus(PWR_FLAG_REGLP) != RESET)
{
}
/* Infinite loop */
while (1)
{
}
}
/**
* @brief Selects HSE as System clock source and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockToHSE(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
#ifndef STM32F10X_CL
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
#else
if (HSE_Value <= 24000000)
{
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
}
else
{
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
}
#endif /* STM32F10X_CL */
#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Select HSE as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x04)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{
}
}
}
/*******************************************************************************
* Function Name : Demo_Init
* Description : Initializes the demonstration application.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void Demo_Init(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_16);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* Enable USART1 and GPIOA clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG
| RCC_APB2Periph_AFIO, ENABLE);
/*------------------- Resources Initialization -----------------------------*/
/* ADCCLK = PCLK2/8 */
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
/* Enable DMA clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Enable ADC1 and GPIOC clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ALL, ENABLE);
/* If HSE is not detected at program startup */
if(HSEStartUpStatus == ERROR)
{
/* Generate NMI exception */
NVIC_SetSystemHandlerPendingBit(SystemHandler_NMI);
}
}
/* Configures the different system clocks ----------------------------------*/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* Setup the microcontroller system. Initialize the Embedded Flash Interface,
initialize the PLL and update the SystemFrequency variable. */
//SystemInit();
/* RCC system reset(for debug purpose) */
//RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
// internal clock - RCC_PLLSource_HSE_Div2 = 36MHz
//RCC_HSICmd(ENABLE);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/4 */
RCC_ADCCLKConfig(RCC_PCLK2_Div6); // 72MHz/6=12 MHz range must be 0.6-14MHz;
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable TIM2 clocks for LED,
Enable TIM3 clocks for Statemachine */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3, ENABLE); // Timer
/* Enable for PPM decode -------------------------------------------*/
/* TIM1 clock enable
Enable TIM8 clocks for Servo */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8, ENABLE);
/* Enable GPIO clocks A(UART1),B(UART3),C(LED, Sensors), ...*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE);
/* AFIO and USART1 clocks UART1*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1, ENABLE);
/* UART3 clock (Motor/BLC) */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4, ENABLE);
/* Enable ADC1 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
/* Enable DMA1 clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA, ENABLE);
/* I2C1 Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
}
/* Configure clocks, PLL, GPIOs clock gate */
void prvSetupHardware(void)
{
/* Start with the clocks in their expected state. */
RCC_DeInit();
/* Enable HSE (high speed external clock). */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready. */
while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET )
{
}
/* 2 wait states required on the flash. */
*( ( unsigned portLONG * ) 0x40022000 ) = 0x02;
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1 );
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1 );
/* PCLK1 = HCLK/2 */
#if BOARD_IS_INEMOV2
RCC_PCLK1Config( RCC_HCLK_Div2 ); //STMF103 Max 32MHz
#elif BOARD_IS_DISCOVERY
RCC_PCLK1Config( RCC_HCLK_Div1 ); //STMF100 Max 24MHz
#else
#error "Please define either BOARD_IS_INEMOV2 or BOARD_IS_DISCOVERY"
#endif
/* PLLCLK = 8MHz * 9 = 72 MHz. */
#if BOARD_IS_INEMOV2
RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 ); //STMF103 @72MHz
#elif BOARD_IS_DISCOVERY
RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_3 ); //STMF100 @24MHz
#else
#error "Please define either BOARD_IS_INEMOV2 or BOARD_IS_DISCOVERY"
#endif
/* Enable PLL. */
RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source. */
RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK );
/* Wait till PLL is used as system clock source. */
while( RCC_GetSYSCLKSource() != 0x08 )
{
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO
| RCC_APB2Periph_ALL , ENABLE );
/* SPI2 Periph clock enable */
RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2 | RCC_APB1Periph_ALL, ENABLE );
/* Set the Vector Table base address at 0x08000000 */
NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */
SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );
/* Enable prefetch */
*((unsigned long*)(0x40022000)) = 0x12;
}
void uart_init() {
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
RCC_WaitForHSEStartUp();
RCC_HCLKConfig (RCC_SYSCLK_Div1);
RCC_PCLK2Config (RCC_HCLK_Div1);
RCC_PCLK1Config (RCC_HCLK_Div1);
RCC_PLLConfig (RCC_PLLSource_PREDIV1, RCC_PLLMul_2);
RCC_PLLCmd (ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while (RCC_GetSYSCLKSource() != 0x08);
GPIO_InitTypeDef gpioInitStruct;
// UART1 - debug
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1, ENABLE);
gpioInitStruct.GPIO_Pin = GPIO_Pin_9;
gpioInitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_Init(GPIOA, &gpioInitStruct);
gpioInitStruct.GPIO_Pin = GPIO_Pin_10;
gpioInitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_Init(GPIOA, &gpioInitStruct);
USART_InitTypeDef usartInit;
usartInit.USART_BaudRate = 9600;
usartInit.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
usartInit.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
usartInit.USART_Parity = USART_Parity_No;
usartInit.USART_StopBits = USART_StopBits_1;
usartInit.USART_WordLength = USART_WordLength_8b;
USART_Init(USART1, &usartInit);
USART_Cmd(USART1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
gpioInitStruct.GPIO_Pin = GPIO_Pin_2;
gpioInitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_Init(GPIOA, &gpioInitStruct);
gpioInitStruct.GPIO_Pin = GPIO_Pin_3;
gpioInitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_Init(GPIOA, &gpioInitStruct);
usartInit.USART_BaudRate = 19200;
usartInit.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
usartInit.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
usartInit.USART_Parity = USART_Parity_No;
usartInit.USART_StopBits = USART_StopBits_1;
usartInit.USART_WordLength = USART_WordLength_8b;
USART_Init(USART2, &usartInit);
USART_Cmd(USART2, ENABLE);
}
static void prvSetupHardware( void )
{
/* Start with the clocks in their expected state. */
RCC_DeInit();
/* Enable HSE (high speed external clock). */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready. */
while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET )
{
}
/* 2 wait states required on the flash. */
*( ( unsigned long * ) 0x40022000 ) = 0x02;
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1 );
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1 );
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config( RCC_HCLK_Div2 );
/* PLLCLK = 12MHz * 6 = 72 MHz. */
RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_6 );
/* Enable PLL. */
RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source. */
RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK );
/* Wait till PLL is used as system clock source. */
while( RCC_GetSYSCLKSource() != 0x08 )
{
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE );
/* SPI2 Periph clock enable */
RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE );
/* Set the Vector Table base address at 0x08000000 */
NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */
SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );
/* Misc initialisation, including some of the CircleOS features. Note
that CircleOS itself is not used. */
vParTestInitialise();
MEMS_Init();
POINTER_Init();
POINTER_SetMode( POINTER_RESTORE_LESS );
}
//**************************************************************************//
void hal_system_RCC_init(void)
{
RCC_DeInit();//RCC system reset(for debug purpose)
RCC_HSEConfig(RCC_HSE_ON);//Enable HSE
//RCC_HSEConfig(RCC_HSE_ON);
if ( RCC_WaitForHSEStartUp() == SUCCESS)
{
FLASH_ReadAccess64Cmd(ENABLE);
FLASH_PrefetchBufferCmd(ENABLE);
// Flash 0 wait state
FLASH_SetLatency(FLASH_Latency_1);
//Power enable
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
// Select the Voltage Range 1 (1.8 V) */
PWR->CR = PWR_CR_VOS_0;
// HCLK = SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2 = HCLK
RCC_PCLK2Config(RCC_HCLK_Div1);
// PCLK1 = HCLK
RCC_PCLK1Config(RCC_HCLK_Div1);
//PLLCLK = 16MHz *4/2 = 32 MHz
RCC_PLLConfig(RCC_PLLSource_HSE, RCC_PLLMul_4,RCC_PLLDiv_2);//RCC_PLLDiv_2
//RCC_PLLConfig(RCC_PLLSource_HSI, RCC_PLLMul_4,RCC_PLLDiv_2);
RCC_PLLCmd(ENABLE);// Enable PLL
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)// Wait till PLL is ready
{}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);//Select PLL as system clock source
//RCC_HCLKConfig(RCC_SYSCLK_Div1);// HCLK = SYSCLK
//RCC_PCLK2Config(RCC_HCLK_Div1);// PCLK2 = HCLK/4
//RCC_PCLK1Config(RCC_HCLK_Div1);//RCC_HCLK_Div1 PCLK1 = HCLK/1
/* Wait till PLL is used as system clock source */
// while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSE)
// {
// }
}
//SystemInit();
/*RCC_ClocksTypeDef RCC_ClockFreq;
RCC_ClockFreq.SYSCLK_Frequency=RCC_SYSCLKSource_HSE;
RCC_ClockFreq.HCLK_Frequency=RCC_SYSCLK_Div1;
RCC_ClockFreq.PCLK1_Frequency=RCC_HCLK_Div1;
RCC_ClockFreq.PCLK2_Frequency=RCC_HCLK_Div2;
RCC_GetClocksFreq(&RCC_ClockFreq);*/
RCC_ClockSecuritySystemCmd(ENABLE);
}
/*******************************************************************************
* Function Name : Set_System
* Description : Configures Main system clocks & power
* Input : None.
* Return : None.
*******************************************************************************/
void Set_System(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
#else
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{
}
}
#ifdef USE_STM3210B_EVAL
/* Enable GPIOB, TIM2 & TIM4 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB , ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM4 , ENABLE);
#endif /* USE_STM3210B_EVAL */
/* Configure USB pull-up */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE);
/* Configure USB pull-up */
GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure);
USB_Cable_Config(DISABLE);
USB_Cable_Config(ENABLE);
}
/********************
- RCC初始化
*********************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
// RCC system reset(for debug purpose)
RCC_DeInit();
// Enable HSE
RCC_HSEConfig(RCC_HSE_ON);
// Wait till HSE is ready
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
// Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 2 wait state
FLASH_SetLatency(FLASH_Latency_2);
// HCLK = SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2 = HCLK/8
RCC_PCLK2Config(RCC_HCLK_Div8);
// PCLK1 = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div2);
// ADCCLK = PCLK2/8
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
// PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
// Enable PLL
RCC_PLLCmd(ENABLE);
// Wait till PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
// Select PLL as system clock source
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Wait till PLL is used as system clock source
while(RCC_GetSYSCLKSource() != 0x08)
{}
}
/**/
// Enable peripheral clocks --------------------------------------------------
// Enable DMA1 clock
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
// Enable ADC1 and GPIOC clock
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA, ENABLE );
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
}
//配置系统时钟
void RCC_Configuration(void){
//定义枚举类型变量
ErrorStatus HSEStartUpStatus;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/
/* RCC system reset(for debug purpose) */
//复位系统时钟设置
RCC_DeInit();
/* Enable HSE */
//开启HSE时钟
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
//等待HSE起振并稳定
HSEStartUpStatus=RCC_WaitForHSEStartUp();
//判断HSE是否起振成功
if(HSEStartUpStatus == SUCCESS){
/* Enable Prefetch Buffer */
//使能预取缓冲
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
//设置flash延时周期数为2
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
//HCLK(AHB)时钟源为SYSCLK, HSE 1分频
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
//PCLK2时钟源为HCLK(AHB) 1分频
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
//PCLK1时钟源为HCLK(AHB) 1分频
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Configure PLLs ***********************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
//cl芯片，默认外部时钟是25M
//PLL2时钟源为HSE, 预分频数为5，倍频数为8
//则PLL2输出频率为25M/5 * 8 = 40M
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
//由PLL2进行8倍频
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
//使能PLL2
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
//等待PLL2输出稳定
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */
//对PLL2进行5倍预分频
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
//再用PLL进行9倍频
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
/* Enable PLL */
//使能PLL
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
//等待PLL输出稳定
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){
}
/* Select PLL as system clock source */
//选择PLL为系统时钟源
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
//等待PLL准备好
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
//4个LED对应PE2~PE5
//因此要使能APB2总线上的GPIOE时钟
//其他均在GPIO中配置
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3, ENABLE);
}
void configureSystem(void) {
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
ErrorStatus HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS) {
/* Enable Prefetch Buffer */
FLASH->ACR |= FLASH_ACR_PRFTBE;
/* Flash 2 wait state */
FLASH->ACR &= (uint32_t) ((uint32_t) ~FLASH_ACR_LATENCY);
FLASH->ACR |= (uint32_t) FLASH_ACR_LATENCY_2;
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
// PLL configuration: PLLCLK
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
//RCC_PREDIV2Config(RCC_PREDIV2_Div5);
//RCC_PLL2Config(RCC_PLL2Mul_8);
/* PLL2 configuration: PLL2CLK = (HSE / 4) * 20 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div4);
RCC_PLL2Config(RCC_PLL2Mul_20);
// Enable PLL2
RCC_PLL2Cmd(ENABLE);
// Wait till PLL2 is ready
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {
}
// PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz *
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08) {
}
} else { /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1) {
}
}
rtc_init();
configureNVIC();
SysTick_Config(72000);
}
