static int DesCbcAlign16(Des* des, byte* out, const byte* in, word32 sz, word32 dir, word32 tri) { wolfSSL_TI_lockCCM() ; ROM_DESReset(DES_BASE); ROM_DESConfigSet(DES_BASE, (dir | DES_CFG_MODE_CBC | tri)); ROM_DESIVSet(DES_BASE, (uint32_t*)des->reg); ROM_DESKeySet(DES_BASE,(uint32_t*)des->key); if(dir == DES_CFG_DIR_DECRYPT) /* if input and output same will overwrite input iv */ XMEMCPY(des->tmp, in + sz - DES_BLOCK_SIZE, DES_BLOCK_SIZE); ROM_DESDataProcess(DES_BASE, (uint32_t *)in, (uint32_t *)out, sz); wolfSSL_TI_unlockCCM() ; /* store iv for next call */ if(dir == DES_CFG_DIR_ENCRYPT) XMEMCPY(des->reg, out + sz - DES_BLOCK_SIZE, DES_BLOCK_SIZE); else XMEMCPY(des->reg, des->tmp, DES_BLOCK_SIZE); return 0 ; }
//***************************************************************************** // // Perform an encryption operation. // //***************************************************************************** bool TDESCBCEncrypt(uint32_t *pui32Src, uint32_t *pui32Dst, uint32_t *pui32Key, uint32_t ui32Length, uint32_t *pui32IV, bool bUseDMA) { // // Perform a soft reset. // ROM_DESReset(DES_BASE); // // Clear the interrupt flags. // g_bContextInIntFlag = false; g_bDataInIntFlag = false; g_bDataOutIntFlag = false; g_bContextInDMADoneIntFlag = false; g_bDataInDMADoneIntFlag = false; g_bDataOutDMADoneIntFlag = false; // // Enable all interrupts. // ROM_DESIntEnable(DES_BASE, (DES_INT_CONTEXT_IN | DES_INT_DATA_IN | DES_INT_DATA_OUT)); // // Configure the DES module. // ROM_DESConfigSet(DES_BASE, (DES_CFG_DIR_ENCRYPT | DES_CFG_TRIPLE | DES_CFG_MODE_CBC)); // // Write the key. // ROM_DESKeySet(DES_BASE, pui32Key); // // Write the IV. // ROM_DESIVSet(DES_BASE, pui32IV); // // Depending on the argument, perform the encryption // with or without uDMA. // if(bUseDMA) { // // Enable DMA interrupts. // ROM_DESIntEnable(DES_BASE, (DES_INT_DMA_CONTEXT_IN | DES_INT_DMA_DATA_IN | DES_INT_DMA_DATA_OUT)); // // Setup the DMA module to copy data in. // ROM_uDMAChannelAssign(UDMA_CH21_DES0DIN); ROM_uDMAChannelAttributeDisable(UDMA_CH21_DES0DIN, UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK); ROM_uDMAChannelControlSet(UDMA_CH21_DES0DIN | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_32 | UDMA_DST_INC_NONE | UDMA_ARB_2 | UDMA_DST_PROT_PRIV); ROM_uDMAChannelTransferSet(UDMA_CH21_DES0DIN | UDMA_PRI_SELECT, UDMA_MODE_BASIC, (void *)pui32Src, (void *)(DES_BASE + DES_O_DATA_L), LengthRoundUp(ui32Length) / 4); UARTprintf("Data in DMA request enabled.\n"); // // Setup the DMA module to copy the data out. // ROM_uDMAChannelAssign(UDMA_CH22_DES0DOUT); ROM_uDMAChannelAttributeDisable(UDMA_CH22_DES0DOUT, UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK); ROM_uDMAChannelControlSet(UDMA_CH22_DES0DOUT | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_2 | UDMA_SRC_PROT_PRIV); ROM_uDMAChannelTransferSet(UDMA_CH22_DES0DOUT | UDMA_PRI_SELECT, UDMA_MODE_BASIC, (void *)(DES_BASE + DES_O_DATA_L), (void *)pui32Dst, LengthRoundUp(ui32Length) / 4); UARTprintf("Data out DMA request enabled.\n"); // // Enable DMA requests // ROM_DESDMAEnable(DES_BASE, DES_DMA_DATA_IN | DES_DMA_DATA_OUT); // // Write the length registers to start the process. // ROM_DESLengthSet(DES_BASE, ui32Length); // // Enable the DMA channels to start the transfers. This must be done after // writing the length to prevent data from copying before the context is // truly ready. // ROM_uDMAChannelEnable(UDMA_CH21_DES0DIN); ROM_uDMAChannelEnable(UDMA_CH22_DES0DOUT); // // Wait for the data in DMA done interrupt. // while(!g_bDataInDMADoneIntFlag) { } // // Wait for the data out DMA done interrupt. // while(!g_bDataOutDMADoneIntFlag) { } } else { // // Perform the encryption. // ROM_DESDataProcess(DES_BASE, pui32Src, pui32Dst, ui32Length); } return(true); }