/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
UINT32 MacValue;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
if (pAd->MACVersion == 0xffffffff)
return -1;
#ifdef RT65xx
RTMP_IO_READ32(pAd, ASIC_VERSION, &MacValue);
pAd->ChipID = MacValue;
if (pAd->ChipID == 0xffffffff)
return -1;
#endif /* RT65xx */
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
RTMP_SYS_IO_READ32(0xb000000c, &pAd->CommonCfg.CID);
RTMP_SYS_IO_READ32(0xb0000000, &pAd->CommonCfg.CN);
#ifdef RT6352
if (IS_RT6352(pAd)) {
pAd->CommonCfg.PKG_ID = (UCHAR)((pAd->CommonCfg.CID >> 16) & 0x0001);
pAd->CommonCfg.Chip_VerID = (UCHAR)((pAd->CommonCfg.CID >> 8) & 0x0f);
pAd->CommonCfg.Chip_E_Number = (UCHAR)((pAd->CommonCfg.CID) & 0x0f);
}
#endif /* RT6352 */
DBGPRINT(RT_DEBUG_TRACE, ("CN: %lx\tCID = %lx\n",
pAd->CommonCfg.CN, pAd->CommonCfg.CID));
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
UINT32 MacValue;
int ret = 0;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
if (pAd->MACVersion == 0xffffffff)
return -1;
#ifdef RT65xx
RTMP_IO_READ32(pAd, ASIC_VERSION, &MacValue);
pAd->MacIcVersion = MacValue;
if (pAd->MacIcVersion == 0xffffffff)
return -1;
#endif /* RT65xx */
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RT3290
if (IS_RT3290(pAd))
{
RT3290_Init(pAd);
goto done;
}
#endif /* RT290 */
#ifdef RT8592
if (IS_RT8592(pAd)) {
RT85592_Init(pAd);
goto done;
}
#endif /* RT8592 */
#ifdef MT76x0
if (IS_MT76x0(pAd)) {
MT76x0_Init(pAd);
goto done;
}
#endif /* MT76x0 */
/* init default value whatever chipsets */
/* default pChipOps content will be 0x00 */
pChipCap->bbpRegTbSize = 0;
pChipCap->MaxNumOfRfId = 31;
pChipCap->MaxNumOfBbpId = 136;
pChipCap->SnrFormula = SNR_FORMULA1;
pChipCap->RfReg17WtMethod = RF_REG_WT_METHOD_NONE;
pChipCap->TXWISize = 16;
pChipCap->RXWISize = 16;
#if defined(RTMP_INTERNAL_TX_ALC) || defined(RTMP_TEMPERATURE_COMPENSATION)
pChipCap->TxPowerTuningTable_2G = TxPowerTuningTableOrg;
#ifdef A_BAND_SUPPORT
pChipCap->TxPowerTuningTable_5G = TxPowerTuningTableOrg;
#endif /* A_BAND_SUPPORT */
#endif /* defined(RTMP_INTERNAL_TX_ALC) || defined(RTMP_TEMPERATURE_COMPENSATION) */
pChipOps->AsicMacInit = NULL;
pChipOps->AsicBbpInit = NULL;
pChipOps->AsicRfInit = NULL;
#ifdef RTMP_EFUSE_SUPPORT
pChipCap->EFUSE_USAGE_MAP_START = 0x2d0;
pChipCap->EFUSE_USAGE_MAP_END = 0x2fc;
pChipCap->EFUSE_USAGE_MAP_SIZE = 45;
#endif /* RTMP_EFUSE_SUPPORT */
pChipCap->VcoPeriod = 10;
pChipCap->FlgIsVcoReCalMode = VCO_CAL_DISABLE;
pChipCap->WPDMABurstSIZE = 2; /* default 64B */
pChipCap->MBSSIDMode = MBSSID_MODE0;
RtmpChipBcnInit(pAd);
pChipOps->RxSensitivityTuning = RxSensitivityTuning;
#ifdef CONFIG_STA_SUPPORT
pChipOps->ChipAGCAdjust = ChipAGCAdjust;
#endif /* CONFIG_STA_SUPPORT */
pChipOps->ChipBBPAdjust = ChipBBPAdjust;
pChipOps->ChipSwitchChannel = Default_ChipSwitchChannel;
/* TX ALC */
pChipCap->bTempCompTxALC = FALSE;
pChipOps->AsicGetTxPowerOffset = NULL;
pChipOps->InitDesiredTSSITable = NULL;
pChipOps->AsicTxAlcGetAutoAgcOffset = NULL;
pChipOps->AsicExtraPowerOverMAC = NULL;
pChipOps->ChipAGCInit = Default_ChipAGCInit;
pChipOps->AsicAntennaDefaultReset = AsicAntennaDefaultReset;
pChipOps->NetDevNickNameInit = NetDevNickNameInit;
/* Init value. If pChipOps->AsicResetBbpAgent==NULL, "AsicResetBbpAgent" as default. If your chipset has specific routine, please re-hook it at self init function */
pChipOps->AsicResetBbpAgent = NULL;
#ifdef RT28xx
pChipOps->ChipSwitchChannel = RT28xx_ChipSwitchChannel;
#endif /* RT28xx */
#ifdef CARRIER_DETECTION_SUPPORT
pChipCap->carrier_func = DISABLE_TONE_RADAR;
pChipOps->ToneRadarProgram = NULL;
#endif /* CARRIER_DETECTOIN_SUPPORT */
#ifdef DFS_SUPPORT
pChipCap->DfsEngineNum = 4;
#endif /* DFS_SUPPORT */
pChipOps->CckMrcStatusCtrl = NULL;
pChipOps->RadarGLRTCompensate = NULL;
/*
2nd CCA detection
*/
pChipCap->b2ndCCACheck = FALSE;
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
#if defined(RT3883) || defined(RT3290) || defined(RT65xx)
done:
#endif /* defined(RT3883) || defined(RT3290) */
DBGPRINT(RT_DEBUG_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
DBGPRINT(RT_DEBUG_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
return ret;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
UINT32 MacValue;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
// TODO: shiang-7603
if (IS_MT7603(pAd) || IS_MT7628(pAd) || IS_MT76x6(pAd)) {
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_OFF, ("%s(%d): Not support for HIF_MT yet!\n",
__FUNCTION__, __LINE__));
}
else
{
#if defined(RTMP_MAC) || defined(RLT_MAC)
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
#endif /* defined(RTMP_MAC) || defined(RLT_MAC) */
}
if (pAd->MACVersion == 0xffffffff)
return -1;
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
RTMP_SYS_IO_READ32(0xb000000c, &pAd->CommonCfg.CID);
RTMP_SYS_IO_READ32(0xb0000000, &pAd->CommonCfg.CN);
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("CN: %lx\tCID = %lx\n",
pAd->CommonCfg.CN, pAd->CommonCfg.CID));
}
#endif /* RTMP_RBUS_SUPPORT */
/* EDCCA */
pChipOps->ChipSetEDCCA= NULL;
#ifdef MT7628
if (IS_MT7628(pAd)) {
mt7628_init(pAd);
goto done;
}
#endif /* MT7628 */
#ifdef MT7615
if (IS_MT7615(pAd)) {
mt7615_init(pAd);
goto done;
};
#endif /* MT7615 */
#ifdef GREENAP_SUPPORT
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif /* RTMP_MAC */
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
#ifdef RT305x
#ifdef RT3352
/*FIXME by Steven: RFIC=RFIC_3022 in some RT3352 board*/
/* if (pAd->RfIcType == RFIC_3322) {*/
if (IS_RT3352(pAd))
RT3352_Init(pAd);
else
#endif /* RT3352 */
#ifdef RT5350
if (IS_RT5350(pAd))
RT5350_Init(pAd);
else
#endif /* RT5350 */
/* comment : the RfIcType is not ready yet, because EEPROM doesn't be initialized. */
/* if ((pAd->MACVersion == 0x28720200) &&
((pAd->RfIcType == RFIC_3320) || (pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022))) */
if (IS_RT3050_3052_3350(pAd))
RT305x_Init(pAd);
else
#endif /* RT305x */
done:
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
return ret;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
// TODO: shiang-7603
if (IS_MT7603(pAd) || IS_MT7628(pAd) || IS_MT76x6(pAd)) {
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("%s(%d): Not support for HIF_MT yet!\n",
__FUNCTION__, __LINE__));
}
else
{
#if defined(RTMP_MAC) || defined(RLT_MAC)
RTMP_IO_READ32(pAd, MAC_CSR0, &pAd->MACVersion);
#endif /* defined(RTMP_MAC) || defined(RLT_MAC) */
}
if (pAd->MACVersion == 0xffffffff)
return -1;
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
RTMP_SYS_IO_READ32(0xb000000c, &pAd->CommonCfg.CID);
RTMP_SYS_IO_READ32(0xb0000000, &pAd->CommonCfg.CN);
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("CN: %lx\tCID = %lx\n",
pAd->CommonCfg.CN, pAd->CommonCfg.CID));
}
#endif /* RTMP_RBUS_SUPPORT */
/* EDCCA */
pChipOps->ChipSetEDCCA= NULL;
#ifdef MT7628
if (IS_MT7628(pAd)) {
mt7628_init(pAd);
goto done;
}
#endif /* MT7628 */
#ifdef MT7615
if (IS_MT7615(pAd)) {
mt7615_init(pAd);
goto done;
};
#endif /* MT7615 */
#ifdef GREENAP_SUPPORT
#if defined (MT7603) || defined (MT7628)
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv2;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv2;
#else
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif /* RTMP_MAC */
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
done:
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
#ifdef DOT11W_PMF_SUPPORT
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("[PMF] Encryption mode = %d\n", pChipCap->FlgPMFEncrtptMode));
#endif /* DOT11W_PMF_SUPPORT */
return ret;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
UINT32 MacValue;
int ret = 0;
#ifdef GREENAP_SUPPORT
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
#endif /* GREENAP_SUPPORT */
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
// TODO: shiang-7603
if (IS_MT7603(pAd) || IS_MT7628(pAd)) {
DBGPRINT(RT_DEBUG_OFF, ("%s(%d): Not support for HIF_MT yet!\n",
__FUNCTION__, __LINE__));
}
else
{
#if defined(RTMP_MAC) || defined(RLT_MAC)
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
#endif /* defined(RTMP_MAC) || defined(RLT_MAC) */
}
if (pAd->MACVersion == 0xffffffff)
return -1;
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef MT7603
if (IS_MT7603(pAd)) {
mt7603_init(pAd);
goto done;
}
#endif /* MT7603 */
#ifdef GREENAP_SUPPORT
#if defined (MT7603) || defined (MT7628)
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv2;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv2;
#else
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif /* RTMP_MAC */
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
done:
DBGPRINT(RT_DEBUG_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
DBGPRINT(RT_DEBUG_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
#ifdef DOT11W_PMF_SUPPORT
DBGPRINT(RT_DEBUG_TRACE, ("[PMF] Encryption mode = %d\n", pChipCap->FlgPMFEncrtptMode));
#endif /* DOT11W_PMF_SUPPORT */
return ret;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(void *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
#ifdef DBG
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
#endif
UINT32 MacValue;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
if (pAd->MACVersion == 0xffffffff)
return -1;
#ifdef RT65xx
RTMP_IO_READ32(pAd, ASIC_VERSION, &MacValue);
pAd->ChipID = MacValue;
if (pAd->ChipID == 0xffffffff)
return -1;
#endif /* RT65xx */
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
/* EDCCA */
pChipOps->ChipSetEDCCA= NULL;
#ifdef RT8592
if (IS_RT8592(pAd)) {
RT85592_Init(pAd);
goto done;
}
#endif /* RT8592 */
#ifdef MT76x2
if (IS_MT76x2(pAd)) {
mt76x2_init(pAd);
goto done;
}
#endif
#ifdef GREENAP_SUPPORT
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif
/*
* We depends on RfICType and MACVersion to assign the
* corresponding operation callbacks.
*/
done:
DBGPRINT(RT_DEBUG_TRACE, ("Chip specific bbpRegTbSize=%d!\n",
pChipCap->bbpRegTbSize));
DBGPRINT(RT_DEBUG_TRACE, ("Chip VCO calibration mode = %d!\n",
pChipCap->FlgIsVcoReCalMode));
#ifdef DOT11W_PMF_SUPPORT
DBGPRINT(RT_DEBUG_TRACE, ("[PMF] Encryption mode = %d\n",
pChipCap->FlgPMFEncrtptMode));
#endif
return ret;
}
