irqreturn_t snd_sb8dsp_midi_interrupt(struct snd_sb *chip)
{
struct snd_rawmidi *rmidi;
int max = 64;
char byte;
if (!chip)
return IRQ_NONE;
rmidi = chip->rmidi;
if (!rmidi) {
inb(SBP(chip, DATA_AVAIL)); /* ack interrupt */
return IRQ_NONE;
}
spin_lock(&chip->midi_input_lock);
while (max-- > 0) {
if (inb(SBP(chip, DATA_AVAIL)) & 0x80) {
byte = inb(SBP(chip, READ));
if (chip->open & SB_OPEN_MIDI_INPUT_TRIGGER) {
snd_rawmidi_receive(chip->midi_substream_input, &byte, 1);
}
}
}
spin_unlock(&chip->midi_input_lock);
return IRQ_HANDLED;
}
static void snd_sb8dsp_midi_output_write(struct snd_rawmidi_substream *substream)
{
unsigned long flags;
struct snd_sb *chip;
char byte;
int max = 32;
/* how big is Tx FIFO? */
chip = substream->rmidi->private_data;
while (max-- > 0) {
spin_lock_irqsave(&chip->open_lock, flags);
if (snd_rawmidi_transmit_peek(substream, &byte, 1) != 1) {
chip->open &= ~SB_OPEN_MIDI_OUTPUT_TRIGGER;
del_timer(&chip->midi_timer);
spin_unlock_irqrestore(&chip->open_lock, flags);
break;
}
if (chip->hardware >= SB_HW_20) {
int timeout = 8;
while ((inb(SBP(chip, STATUS)) & 0x80) != 0 && --timeout > 0)
;
if (timeout == 0) {
/* Tx FIFO full - try again later */
spin_unlock_irqrestore(&chip->open_lock, flags);
break;
}
outb(byte, SBP(chip, WRITE));
} else {
snd_sbdsp_command(chip, SB_DSP_MIDI_OUTPUT);
snd_sbdsp_command(chip, byte);
}
snd_rawmidi_transmit_ack(substream, 1);
spin_unlock_irqrestore(&chip->open_lock, flags);
}
}
irqreturn_t snd_sb8dsp_midi_interrupt(sb_t * chip)
{
snd_rawmidi_t *rmidi;
int max = 64;
char byte;
if (chip == NULL || (rmidi = chip->rmidi) == NULL) {
inb(SBP(chip, DATA_AVAIL)); /* ack interrupt */
return IRQ_NONE;
}
while (max-- > 0) {
spin_lock(&chip->midi_input_lock);
if (inb(SBP(chip, DATA_AVAIL)) & 0x80) {
byte = inb(SBP(chip, READ));
if (chip->open & SB_OPEN_MIDI_INPUT_TRIGGER) {
spin_unlock(&chip->midi_input_lock);
snd_rawmidi_receive(chip->midi_substream_input, &byte, 1);
} else {
spin_unlock(&chip->midi_input_lock);
}
} else {
spin_unlock(&chip->midi_input_lock);
}
}
return IRQ_HANDLED;
}
int snd_sbdsp_command(struct snd_sb *chip, unsigned char val)
{
int i;
#ifdef IO_DEBUG
snd_printk(KERN_DEBUG "command 0x%x\n", val);
#endif
for (i = BUSY_LOOPS; i; i--)
if ((inb(SBP(chip, STATUS)) & 0x80) == 0) {
outb(val, SBP(chip, COMMAND));
return 1;
}
snd_printd("%s [0x%lx]: timeout (0x%x)\n", __FUNCTION__, chip->port, val);
return 0;
}
int snd_sbdsp_get_byte(struct snd_sb *chip)
{
int val;
int i;
for (i = BUSY_LOOPS; i; i--) {
if (inb(SBP(chip, DATA_AVAIL)) & 0x80) {
val = inb(SBP(chip, READ));
#ifdef IO_DEBUG
snd_printk(KERN_DEBUG "get_byte 0x%x\n", val);
#endif
return val;
}
}
snd_printd("%s [0x%lx]: timeout\n", __FUNCTION__, chip->port);
return -ENODEV;
}
int snd_sbdsp_reset(struct snd_sb *chip)
{
int i;
outb(1, SBP(chip, RESET));
udelay(10);
outb(0, SBP(chip, RESET));
udelay(30);
for (i = BUSY_LOOPS; i; i--)
if (inb(SBP(chip, DATA_AVAIL)) & 0x80) {
if (inb(SBP(chip, READ)) == 0xaa)
return 0;
else
break;
}
snd_printdd("%s [0x%lx] failed...\n", __FUNCTION__, chip->port);
return -ENODEV;
}
static Eina_Mempool *
_new_va(const char *name,
const char *context,
const char *options,
va_list args)
{
Eina_Mempool_Backend *be;
Eina_Mempool *mp;
Eina_Error err = EINA_ERROR_NOT_MEMPOOL_MODULE;
eina_error_set(0);
be = eina_hash_find(_backends, name);
if ((!be) || (!be->init))
goto on_error;
err = EINA_ERROR_OUT_OF_MEMORY;
mp = calloc(1, sizeof(Eina_Mempool));
if (!mp)
goto on_error;
/* Work around ABI incompability introduced in Eina 1.1 */
#define SBP(Property) mp->backend.Property = be->Property;
SBP(name);
SBP(init);
SBP(free);
SBP(alloc);
SBP(realloc);
SBP(garbage_collect);
SBP(statistics);
SBP(shutdown);
#undef SBP
if (be->repack)
{
mp->backend2 = calloc(1, sizeof (Eina_Mempool_Backend_ABI2));
if (mp->backend2)
mp->backend2->repack = be->repack;
}
mp->backend_data = mp->backend.init(context, options, args);
return mp;
on_error:
eina_error_set(err);
return NULL;
}
