static int __devinit omap34xx_bridge_probe(struct platform_device *pdev) { int status; u32 initStatus; u32 temp; dev_t dev = 0 ; int result; struct dspbridge_platform_data *pdata = pdev->dev.platform_data; omap_dspbridge_dev = pdev; /* use 2.6 device model */ result = alloc_chrdev_region(&dev, 0, 1, driver_name); if (result < 0) { pr_err("%s: Can't get major %d\n", __func__, driver_major); goto err1; } driver_major = MAJOR(dev); cdev_init(&bridge_cdev, &bridge_fops); bridge_cdev.owner = THIS_MODULE; status = cdev_add(&bridge_cdev, dev, 1); if (status) { pr_err("%s: Failed to add bridge device\n", __func__); goto err2; } /* udev support */ bridge_class = class_create(THIS_MODULE, "ti_bridge"); if (IS_ERR(bridge_class)) pr_err("%s: Error creating bridge class\n", __func__); device_create(bridge_class, NULL, MKDEV(driver_major, 0), NULL, "DspBridge"); bridge_create_sysfs(); GT_init(); GT_create(&driverTrace, "LD"); #ifdef CONFIG_BRIDGE_DEBUG if (GT_str) GT_set(GT_str); #elif defined(DDSP_DEBUG_PRODUCT) && GT_TRACE GT_set("**=67"); #endif #ifdef CONFIG_PM /* Initialize the wait queue */ bridge_suspend_data.suspended = 0; init_waitqueue_head(&bridge_suspend_data.suspend_wq); #endif SERVICES_Init(); /* Autostart flag. This should be set to true if the DSP image should * be loaded and run during bridge module initialization */ if (base_img) { temp = true; REG_SetValue(AUTOSTART, (u8 *)&temp, sizeof(temp)); REG_SetValue(DEFEXEC, (u8 *)base_img, strlen(base_img) + 1); } else { temp = false; REG_SetValue(AUTOSTART, (u8 *)&temp, sizeof(temp)); REG_SetValue(DEFEXEC, (u8 *) "\0", (u32)2); } if (shm_size >= 0x10000) { /* 64 KB */ initStatus = REG_SetValue(SHMSIZE, (u8 *)&shm_size, sizeof(shm_size)); } else { initStatus = DSP_EINVALIDARG; status = -1; pr_err("%s: SHM size must be at least 64 KB\n", __func__); } GT_1trace(driverTrace, GT_7CLASS, "requested shm_size = 0x%x\n", shm_size); if (pdata->phys_mempool_base && pdata->phys_mempool_size) { phys_mempool_base = pdata->phys_mempool_base; phys_mempool_size = pdata->phys_mempool_size; } GT_1trace(driverTrace, GT_7CLASS, "phys_mempool_base = 0x%x \n", phys_mempool_base); GT_1trace(driverTrace, GT_7CLASS, "phys_mempool_size = 0x%x\n", phys_mempool_base); if ((phys_mempool_base > 0x0) && (phys_mempool_size > 0x0)) MEM_ExtPhysPoolInit(phys_mempool_base, phys_mempool_size); if (tc_wordswapon) { GT_0trace(driverTrace, GT_7CLASS, "TC Word Swap is enabled\n"); REG_SetValue(TCWORDSWAP, (u8 *)&tc_wordswapon, sizeof(tc_wordswapon)); } else { GT_0trace(driverTrace, GT_7CLASS, "TC Word Swap is disabled\n"); REG_SetValue(TCWORDSWAP, (u8 *)&tc_wordswapon, sizeof(tc_wordswapon)); } if (DSP_SUCCEEDED(initStatus)) { #ifdef CONFIG_BRIDGE_DVFS clk_handle = clk_get(NULL, "iva2_ck"); if (!clk_handle) pr_err("%s: clk_get failed to get iva2_ck\n", __func__); if (clk_notifier_register(clk_handle, &iva_clk_notifier)) pr_err("%s: clk_notifier_register failed for iva2_ck\n", __func__); if (!min_dsp_freq) min_dsp_freq = pdata->mpu_min_speed; #endif driverContext = DSP_Init(&initStatus); if (DSP_FAILED(initStatus)) { status = -1; pr_err("DSP Bridge driver initialization failed\n"); } else { pr_info("DSP Bridge driver loaded\n"); } } #ifdef CONFIG_BRIDGE_RECOVERY bridge_rec_queue = create_workqueue("bridge_rec_queue"); INIT_WORK(&bridge_recovery_work, bridge_recover); INIT_COMPLETION(bridge_comp); #endif DBC_Assert(status == 0); DBC_Assert(DSP_SUCCEEDED(initStatus)); return 0; err2: unregister_chrdev_region(dev, 1); err1: return result; }
/* * ======== WCD_Init ======== * Purpose: * Module initialization is done by SERVICES Init. */ bool WCD_Init(void) { bool fInit = true; bool fDRV, fDEV, fCOD, fSERVICES, fCHNL, fMSG, fIO; bool fMGR, fPROC, fNODE, fDISP, fNTFY, fSTRM, fRMM; #ifdef DEBUG /* runtime check of Device IOCtl array. */ u32 i; int cmdtable = ARRAY_SIZE(WCD_cmdTable); for (i = 1; i < cmdtable; i++) DBC_Assert(WCD_cmdTable[i - 1].dwIndex == i); #endif if (WCD_cRefs == 0) { /* initialize all SERVICES modules */ fSERVICES = SERVICES_Init(); /* initialize debugging module */ DBC_Assert(!WCD_debugMask.flags); GT_create(&WCD_debugMask, "CD"); /* CD for class driver */ /* initialize class driver and other modules */ fDRV = DRV_Init(); fMGR = MGR_Init(); fPROC = PROC_Init(); fNODE = NODE_Init(); fDISP = DISP_Init(); fNTFY = NTFY_Init(); fSTRM = STRM_Init(); fRMM = RMM_init(); fCHNL = CHNL_Init(); fMSG = MSG_Init(); fIO = IO_Init(); fDEV = DEV_Init(); fCOD = COD_Init(); fInit = fSERVICES && fDRV && fDEV && fCHNL && fCOD && fMSG && fIO; fInit = fInit && fMGR && fPROC && fRMM; if (!fInit) { if (fSERVICES) SERVICES_Exit(); if (fDRV) DRV_Exit(); if (fMGR) MGR_Exit(); if (fSTRM) STRM_Exit(); if (fPROC) PROC_Exit(); if (fNODE) NODE_Exit(); if (fDISP) DISP_Exit(); if (fNTFY) NTFY_Exit(); if (fCHNL) CHNL_Exit(); if (fMSG) MSG_Exit(); if (fIO) IO_Exit(); if (fDEV) DEV_Exit(); if (fCOD) COD_Exit(); if (fRMM) RMM_exit(); } } if (fInit) WCD_cRefs++; GT_1trace(WCD_debugMask, GT_5CLASS, "Entered WCD_Init, ref count: 0x%x\n", WCD_cRefs); return fInit; }