/* idx indicate Timer0L, Timer0H, Timer1L,Timer1H*/ void start_timer(uint8_t idx) { uint8_t ep = (idx + 1) | 0x80; circular_buffer_pools_t * cb_in = circular_buffer_pointer(ep); uint16_t timer_reload = circular_buffer_timer_reload(cb_in); switch(idx) { case 0: // Set Next Timer Reload to finish transfer after there is room in FIFO SI32_TIMER_A_set_low_count (SI32_TIMER_0, timer_reload); SI32_TIMER_A_set_low_reload (SI32_TIMER_0, timer_reload); SI32_TIMER_A_start_low_timer (SI32_TIMER_0); break; case 1: // Set Next Timer Reload to finish transfer after there is room in FIFO SI32_TIMER_A_set_high_count (SI32_TIMER_0, timer_reload); SI32_TIMER_A_set_high_reload (SI32_TIMER_0, timer_reload); SI32_TIMER_A_start_high_timer (SI32_TIMER_0); break; case 2: // Set Next Timer Reload to finish transfer after there is room in FIFO SI32_TIMER_A_set_low_count (SI32_TIMER_1, timer_reload); SI32_TIMER_A_set_low_reload (SI32_TIMER_1, timer_reload); SI32_TIMER_A_start_low_timer (SI32_TIMER_1); break; case 3: // Set Next Timer Reload to finish transfer after there is room in FIFO SI32_TIMER_A_set_high_count (SI32_TIMER_1, timer_reload); SI32_TIMER_A_set_high_reload (SI32_TIMER_1,timer_reload); SI32_TIMER_A_start_high_timer (SI32_TIMER_1); break; } }
void wave_4k_init(void) { SI32_TIMER_A_Type* SI32_TIMER = SI32_TIMER_1; uint16_t reload_value = get_wave_reload_value(WAVE_4K); SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_TIMER1); SI32_TIMER_A_select_low_auto_reload_mode(SI32_TIMER); SI32_TIMER_A_enable_low_overflow_interrupt(SI32_TIMER); SI32_TIMER_A_disable_low_extra_interrupt(SI32_TIMER); SI32_TIMER_A_select_low_clock_source_apb_clock(SI32_TIMER); SI32_TIMER_A_set_low_count(SI32_TIMER,reload_value); SI32_TIMER_A_set_low_reload(SI32_TIMER,reload_value); SI32_TIMER_A_clear_low_overflow_interrupt(SI32_TIMER); NVIC_ClearPendingIRQ( TIMER1L_IRQn ); NVIC_EnableIRQ( TIMER1L_IRQn ); }