Example #1
0
static void CbusConnectionCheck ( byte channel )

{

    static byte busConnected[ MHD_MAX_CHANNELS ] = {0};



    /* If CBUS connection state has changed for this channel,   */

    /* update channel state and hardware.                       */



    if ( busConnected[ channel ] != SI_CbusChannelConnected( channel ))

    {

        busConnected[ channel ] = SI_CbusChannelConnected( channel );



        // heartbeat has been disabled in all products

        // SI_CbusHeartBeat( channel, busConnected[ channel ] );



        printk("CPCBUS:: ***Channel: %d,  CBUS %s ****\n", (int)channel , busConnected[ channel ] ? "Connected" : "Unconnected");

    }

}
Bool SI_CbusInitialize ( void )
{
	byte     channel;
	int	result = STATUS_SUCCESS;
	int	port = 0;
	word	devcap_reg;
	int 		regval;

	memset( &l_cbus, 0, sizeof( l_cbus ));
	dev_cap_regs_ready_bit = FALSE;

	/* Determine the Port Switch input ports that are selected for MHD  */
	/* operation and initialize the port to channel decode array.       */

	channel = 0;

	//
	// Setup local DEVCAP registers for read by the peer
	//
	devcap_reg = REG_CBUS_DEVICE_CAP_0;
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_DEV_ACTIVE);
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_VERSION);
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_DEVICE_CATEGORY);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_DEV_VID_LINK_SUPPRGB444);
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_DEV_AUD_LINK_2CH);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);										// not for source
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_LOGICAL_DEVICE_MAP);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);										// not for source
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_RCP_SUPPORT | MHD_RAP_SUPPORT);		// feature flag
	SiIRegioCbusWrite(devcap_reg++, channel, 0);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);										// reserved
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_SCRATCHPAD_SIZE);
	SiIRegioCbusWrite(devcap_reg++, channel, MHD_INTERRUPT_SIZE);
	SiIRegioCbusWrite(devcap_reg++, channel, 0);										//reserved

	if(SiIRegioCbusRead(REG_CBUS_SUPPORT, channel) == 0xff)
	{
		// Display all registers for debugging. Only at initialization.
		printk( "cbus initialization failed\n");
		cbus_display_registers(0, 0x30);
		return ERROR_INIT;
	}

	SiIRegioCbusWrite(REG_CBUS_INTR_ENABLE, channel, (BIT_CONNECT_CHG | BIT_MSC_MSG_RCV | BIT_MSC_XFR_DONE	| BIT_MSC_XFR_ABORT | BIT_MSC_ABORT | BIT_HEARTBEAT_TIMEOUT ));
	regval = SiIRegioCbusRead(REG_CBUS_LINK_CONTROL_2, channel);
	regval = (regval | 0x0C);
	SiIRegioCbusWrite(REG_CBUS_LINK_CONTROL_2, channel, regval);

	// Clear legacy bit on Wolverine TX.
	regval = SiIRegioCbusRead( REG_MSC_TIMEOUT_LIMIT, channel );
	SiIRegioCbusWrite( REG_MSC_TIMEOUT_LIMIT, channel, (regval & MSC_TIMEOUT_LIMIT_MSB_MASK));

	// Set NMax to 1
	SiIRegioCbusWrite( REG_CBUS_LINK_CONTROL_1, channel, 0x01);

	printk( "cbus_initialize. Poll interval = %d ms. CBUS Connected = %d\n", (int)CBUS_FW_INTR_POLL_MILLISECS, (int)SI_CbusChannelConnected(channel));

	return result;
}