/****************************************************
* FUNCTION: Disable interrupt for Galois SM_GPIO pin
* PARAMS: port - SM_GPIO port # (0 ~ 7)
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortDisableIRQ(int port)
{
int reg_mask, reg_en;
int value, gpio_port = port;
if((port >= 0) && (port < 8)){
reg_mask = SM_APB_GPIO_BASE + APB_GPIO_INTMASK;
reg_en = SM_APB_GPIO_BASE + APB_GPIO_INTEN;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_mask = SM_APB_GPIO1_BASE + APB_GPIO_INTMASK;
reg_en = SM_APB_GPIO1_BASE + APB_GPIO_INTEN;
port -= 8;
} else {
return -1;
}
SM_GPIO_PortLock(gpio_port);
/* Mask interrupt */
GA_REG_WORD32_READ(reg_mask, &value);
value |= (1 << port);
GA_REG_WORD32_WRITE(reg_mask, value);
/* Disable interrupt */
GA_REG_WORD32_READ(reg_en, &value);
value &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_en, value);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: Set Galois SM_GPIO pin as in or out
* PARAMS: port - SM_GPIO port # (0 ~ 11)
* in - 1: IN, 0: OUT
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortSetInOut(int port, int in)
{
int reg_ddr, reg_ctl;
int ddr, ctl;
int gpio_port = port;
if((port >= 0) && (port < 8)){
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_ctl = SM_APB_GPIO_BASE + APB_GPIO_PORTA_CTL;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_ctl = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_CTL;
port -= 8;
} else
return -1;
SM_GPIO_PortLock(gpio_port);
/* software mode */
GA_REG_WORD32_READ(reg_ctl, &ctl);
ctl &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ctl, ctl);
/* set port to output mode */
GA_REG_WORD32_READ(reg_ddr, &ddr);
if (in)
ddr &= ~(1 << port);
else
ddr |= (1 << port);
GA_REG_WORD32_WRITE(reg_ddr, ddr);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: read SM_GPIO port status
* PARAMS: port - SM_GPIO port # (0 ~ 11)
* *value - pointer to port status
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortRead(int port, int *value)
{
int reg_ddr, reg_ext, reg_ctl;
int ddr, ext, ctl;
int gpio_port = port;
if((port >= 0) && (port < 8)){
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_ext = SM_APB_GPIO_BASE + APB_GPIO_EXT_PORTA;
reg_ctl = SM_APB_GPIO_BASE + APB_GPIO_PORTA_CTL;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_ext = SM_APB_GPIO1_BASE + APB_GPIO_EXT_PORTA;
reg_ctl = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_CTL;
port -= 8;
} else
return -1;
SM_GPIO_PortLock(gpio_port);
/* software mode */
GA_REG_WORD32_READ(reg_ctl, &ctl);
ctl &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ctl, ctl);
/* set port to input mode */
GA_REG_WORD32_READ(reg_ddr, &ddr);
ddr &= ~(1<<port);
GA_REG_WORD32_WRITE(reg_ddr, ddr);
/* get port value */
GA_REG_WORD32_READ(reg_ext, &ext);
if (ext & (1<<port))
*value = 1;
else
*value = 0;
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: Clear interrupt for Galois SM_GPIO pin
* PARAMS: port - SM_GPIO port # (0 ~ 7)
* RETURN: 0 - succeed.
* -1 - fail.
***************************************************/
int SM_GPIO_PortClearInterrupt(int port)
{
int reg_eoi;
int value, gpio_port = port;
if((port >= 0) && (port < 8)){
reg_eoi = SM_APB_GPIO_BASE + APB_GPIO_PORTA_EOI;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_eoi = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_EOI;
port -= 8;
} else {
return -1;
}
SM_GPIO_PortLock(gpio_port);
/* see above, write 1 to clear interrupt */
value = (1 << port);
GA_REG_WORD32_WRITE(reg_eoi, value);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: Enable interrupt for Galois SM_GPIO pin
* PARAMS: port - SM_GPIO port # (0 ~ 7)
* RETURN: 0 - succeed
* -1 - fail
* NOTE: You also need to enable SM_GPIO interrupt in ICTL.
***************************************************/
int SM_GPIO_PortEnableIRQ(int port)
{
int reg_mask, reg_en, reg_eoi;
int value, gpio_port = port;
if((port >= 0) && (port < 8)){
reg_mask = SM_APB_GPIO_BASE + APB_GPIO_INTMASK;
reg_en = SM_APB_GPIO_BASE + APB_GPIO_INTEN;
reg_eoi = SM_APB_GPIO_BASE + APB_GPIO_PORTA_EOI;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_mask = SM_APB_GPIO1_BASE + APB_GPIO_INTMASK;
reg_en = SM_APB_GPIO1_BASE + APB_GPIO_INTEN;
reg_eoi = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_EOI;
port -= 8;
} else {
return -1;
}
SM_GPIO_PortLock(gpio_port);
/* Enable interrupt */
GA_REG_WORD32_READ(reg_en, &value);
value |= (1 << port);
GA_REG_WORD32_WRITE(reg_en, value);
/* Write-only, write 1 to clear interrupt */
value = (1 << port);
GA_REG_WORD32_WRITE(reg_eoi, value);
/* Unmask interrupt */
GA_REG_WORD32_READ(reg_mask, &value);
value &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_mask, value);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: Init interrupt for Galois SM_GPIO pin, and set
* interrupt level or edge, but keep interrupt closed.
* PARAMS: port - SM_GPIO port # (0 ~ 7)
* int_edge - 1: edge triggered, 0: level triggered.
* int_polarity - 1: rise edge/high level triggered.
* 0: fall edge/low level triggered.
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortInitIRQ(int port, int int_edge, int int_polarity)
{
int reg_ddr, reg_debounce, reg_edge, reg_polarity;
int reg_mask;//, reg_en, reg_eoi;
int value, gpio_port = port;
if((port >= 0) && (port < 8)){
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_mask = SM_APB_GPIO_BASE + APB_GPIO_INTMASK;
//reg_en = SM_APB_GPIO_BASE + APB_GPIO_INTEN;
//reg_eoi = SM_APB_GPIO_BASE + APB_GPIO_PORTA_EOI;
reg_debounce = SM_APB_GPIO_BASE + APB_GPIO_DEBOUNCE;
reg_edge = SM_APB_GPIO_BASE + APB_GPIO_INTTYPE_LEVEL;
reg_polarity = SM_APB_GPIO_BASE + APB_GPIO_INT_POLARITY;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_mask = SM_APB_GPIO1_BASE + APB_GPIO_INTMASK;
//reg_en = SM_APB_GPIO1_BASE + APB_GPIO_INTEN;
//reg_eoi = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_EOI;
reg_debounce = SM_APB_GPIO1_BASE + APB_GPIO_DEBOUNCE;
reg_edge = SM_APB_GPIO1_BASE + APB_GPIO_INTTYPE_LEVEL;
reg_polarity = SM_APB_GPIO1_BASE + APB_GPIO_INT_POLARITY;
port -= 8;
} else {
return -1;
}
SM_GPIO_PortLock(gpio_port);
/* Mask interrupt */
GA_REG_WORD32_READ(reg_mask, &value);
value |= (1 << port);
GA_REG_WORD32_WRITE(reg_mask, value);
/* Direction is input */
GA_REG_WORD32_READ(reg_ddr, &value);
value &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ddr, value);
/* Enable debounce */
GA_REG_WORD32_READ(reg_debounce, &value);
value |= (1 << port);
GA_REG_WORD32_WRITE(reg_debounce, value);
/* int_edge=1: Edge triggered interrupt */
GA_REG_WORD32_READ(reg_edge, &value);
value |= (int_edge << port);
GA_REG_WORD32_WRITE(reg_edge, value);
/* int_polarity=1: rise-edge triggered interrupt */
GA_REG_WORD32_READ(reg_polarity, &value);
value |= (int_polarity << port);
GA_REG_WORD32_WRITE(reg_polarity, value);
/* Enable interrupt */
//GA_REG_WORD32_READ(reg_en, &value);
//value |= (1 << port);
//GA_REG_WORD32_WRITE(reg_en, value);
/* Write-only, write 1 to clear interrupt */
//value = (1 << port);
//GA_REG_WORD32_WRITE(reg_eoi, value);
/* Unmask interrupt */
//GA_REG_WORD32_READ(reg_mask, &value);
//value &= ~(1 << port);
//GA_REG_WORD32_WRITE(reg_mask, value);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: toggle SM_GPIO port between high and low
* PARAMS: port - SM_GPIO port # (0 ~ 11)
* value - 1: high; 0: low
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortWrite(int port, int value)
{
int reg_ddr, reg_dr, reg_ctl;
int ddr, dr, ctl;
int gpio_port = port;
#ifdef CONFIG_BERLIN2Q
if((port >= 0) && (port < 32)){
#else
if((port >= 0) && (port < 8)){
#endif
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_dr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DR;
reg_ctl = SM_APB_GPIO_BASE + APB_GPIO_PORTA_CTL;
#ifdef CONFIG_BERLIN2Q
} else if ((port >= 32) && (port < 64)){
#else
} else if ((port >= 8) && (port < MAX_PORT)){
#endif
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_dr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DR;
reg_ctl = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_CTL;
#ifdef CONFIG_BERLIN2Q
port -= 32;
#else
port -= 8;
#endif
} else
return -1;
SM_GPIO_PortLock(gpio_port);
/* software mode */
GA_REG_WORD32_READ(reg_ctl, &ctl);
ctl &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ctl, ctl);
/* set port to output mode */
GA_REG_WORD32_READ(reg_ddr, &ddr);
ddr |= (1<<port);
GA_REG_WORD32_WRITE(reg_ddr, ddr);
/* set port value */
GA_REG_WORD32_READ(reg_dr, &dr);
if (value){
dr |= (1<<port);
} else {
dr &= ~(1<<port);
}
GA_REG_WORD32_WRITE(reg_dr, dr);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: read SM_GPIO port status
* PARAMS: port - SM_GPIO port # (0 ~ 11)
* *value - pointer to port status
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortRead(int port, int *value)
{
int reg_ddr, reg_ext, reg_ctl;
int ddr, ext, ctl;
int gpio_port = port;
#ifdef CONFIG_BERLIN2Q
if((port >= 0) && (port < 32)){
#else
if((port >= 0) && (port < 8)){
#endif
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_ext = SM_APB_GPIO_BASE + APB_GPIO_EXT_PORTA;
reg_ctl = SM_APB_GPIO_BASE + APB_GPIO_PORTA_CTL;
#ifdef CONFIG_BERLIN2Q
} else if ((port >= 32) && (port < 64)){
#else
} else if ((port >= 8) && (port < MAX_PORT)){
#endif
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_ext = SM_APB_GPIO1_BASE + APB_GPIO_EXT_PORTA;
reg_ctl = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_CTL;
#ifdef CONFIG_BERLIN2Q
port -= 32;
#else
port -= 8;
#endif
} else
return -1;
SM_GPIO_PortLock(gpio_port);
/* software mode */
GA_REG_WORD32_READ(reg_ctl, &ctl);
ctl &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ctl, ctl);
/* set port to input mode */
GA_REG_WORD32_READ(reg_ddr, &ddr);
ddr &= ~(1<<port);
GA_REG_WORD32_WRITE(reg_ddr, ddr);
/* get port value */
GA_REG_WORD32_READ(reg_ext, &ext);
if (ext & (1<<port))
*value = 1;
else
*value = 0;
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
/****************************************************
* FUNCTION: Set Galois SM_GPIO pin as in or out
* PARAMS: port - SM_GPIO port # (0 ~ 11)
* in - 1: IN, 0: OUT
* RETURN: 0 - succeed
* -1 - fail
***************************************************/
int SM_GPIO_PortSetInOut(int port, int in)
{
int reg_ddr, reg_ctl;
int ddr, ctl;
int gpio_port = port;
if((port >= 0) && (port < 8)){
reg_ddr = SM_APB_GPIO_BASE + APB_GPIO_SWPORTA_DDR;
reg_ctl = SM_APB_GPIO_BASE + APB_GPIO_PORTA_CTL;
} else if ((port >= 8) && (port < MAX_PORT)){
reg_ddr = SM_APB_GPIO1_BASE + APB_GPIO_SWPORTA_DDR;
reg_ctl = SM_APB_GPIO1_BASE + APB_GPIO_PORTA_CTL;
port -= 8;
} else
return -1;
SM_GPIO_PortLock(gpio_port);
/* software mode */
GA_REG_WORD32_READ(reg_ctl, &ctl);
ctl &= ~(1 << port);
GA_REG_WORD32_WRITE(reg_ctl, ctl);
/* set port to output mode */
GA_REG_WORD32_READ(reg_ddr, &ddr);
if (in)
ddr &= ~(1 << port);
else
ddr |= (1 << port);
GA_REG_WORD32_WRITE(reg_ddr, ddr);
SM_GPIO_PortUnlock(gpio_port);
return 0;
}
