void sn764xx_w(UINT8 ChipID, offs_t offset, UINT8 data) { sn764xx_state *info = &SN764xxData[ChipID]; switch(EMU_CORE) { case EC_MAME: switch(offset) { case 0x00: sn76496_write_reg(info->chip, offset & 1, data); break; case 0x01: sn76496_stereo_w(info->chip, offset, data); break; } break; #ifdef ENABLE_ALL_CORES case EC_MAXIM: switch(offset) { case 0x00: SN76489_Write((SN76489_Context*)info->chip, data); break; case 0x01: SN76489_GGStereoWrite((SN76489_Context*)info->chip, data); break; } break; #endif } }
/* Write PSG chip */ void psg_write(unsigned int cycles, unsigned int data) { psg_update(cycles << 11); SN76489_Write(data); }
void psg_write(int data) { if(!snd.enabled) return; SN76489_Write(0, data); }