static int qrk_aonpt_resume(struct device *dev) { SET_INTERRUPT_HANDLER(SOC_AONPT_INTERRUPT, aonpt_ISR); SOC_UNMASK_INTERRUPTS(SCSS_AON_TIMER_MASK); MMIO_REG_VAL_FROM_BASE(SCSS_REGISTER_BASE, SCSS_AONPT_STAT); return 0; }
static void uart_console_init(struct td_device *dev) { struct ns16550_pm_device *pmdev = dev->priv; irq_connect_dynamic(pmdev->vector, ISR_DEFAULT_PRIO, uart_rx_isr, 0, 0); irq_enable(pmdev->vector); /* Enable interrupt */ SOC_UNMASK_INTERRUPTS(pmdev->uart_int_mask); /* Enable IRQ at controller level */ uart_irq_rx_enable(pmdev->zephyr_device); /* allow detecting uart break */ uart_irq_err_enable(pmdev->zephyr_device); }
/* Driver API */ DRIVER_API_RC soc_i2s_init() { int i; uint32_t reg; // Prep info struct for (i = 0; i < I2S_NUM_CHANNELS; i++) { i2s_info->en[i] = 0; i2s_info->cfgd[i] = 0; i2s_info->cfg[i].cb_done = NULL; i2s_info->cfg[i].cb_err = NULL; } // Enable global clock, use local clock gating per channel instead set_clock_gate(i2s_info->clk_gate_info, CLK_GATE_ON); // Setup ISR (and enable) SET_INTERRUPT_HANDLER(i2s_info->int_vector, i2s_interrupt_handler); SOC_UNMASK_INTERRUPTS(i2s_info->int_mask); // Set up control register reg = MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_CTRL); reg |= (1 << SOC_I2S_CTRL_TR_CFG_0); reg &= ~(1 << SOC_I2S_CTRL_TSYNC_LOOP_BACK); reg &= ~(1 << SOC_I2S_CTRL_RSYNC_LOOP_BACK); MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_CTRL) = reg; // Set the watermark levels MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_TFIFO_CTRL) &= 0xFFFCFFFF; MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_TFIFO_CTRL) |= (I2S_TFIFO_THR << SOC_I2S_TFIFO_CTRL_TAFULL_THRS); MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_RFIFO_CTRL) &= 0xFFFCFFFF; MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_RFIFO_CTRL) |= (I2S_RFIFO_THR << SOC_I2S_RFIFO_CTRL_RAFULL_THRS); // Enable global interrupt mask reg = MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_CID_CTRL); reg |= (1 << SOC_I2S_CID_CTRL_INTREQ_MASK); MMIO_REG_VAL_FROM_BASE(SOC_I2S_BASE, SOC_I2S_CID_CTRL) = reg; // Initially, have all channels disabled for (i = 0; i < I2S_NUM_CHANNELS; i++) { i2s_disable(i); } return DRV_RC_OK; }