Example #1
0
static int pm8xxx_read_config_irq(struct pm_irq_chip *chip, u8 bp, u8 cp, u8 *r)
{
	int	rc;

	spin_lock(&chip->pm_irq_lock);
	rc = pm8xxx_writeb(chip->dev,
			SSBI_REG_ADDR_IRQ_BLK_SEL(chip->base_addr), bp);
	if (rc) {
		pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
		goto bail;
	}

	rc = pm8xxx_writeb(chip->dev,
			SSBI_REG_ADDR_IRQ_CONFIG(chip->base_addr), cp);
	if (rc)
		pr_err("Failed Configuring IRQ rc=%d\n", rc);

	rc = pm8xxx_readb(chip->dev,
			SSBI_REG_ADDR_IRQ_CONFIG(chip->base_addr), r);
	if (rc)
		pr_err("Failed reading IRQ rc=%d\n", rc);
bail:
	spin_unlock(&chip->pm_irq_lock);
	return rc;
}
Example #2
0
static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, u8 bp, u8 *ip)
{
	int	rc;

	spin_lock(&chip->pm_irq_lock);
	rc = pm8xxx_writeb(chip->dev,
			SSBI_REG_ADDR_IRQ_BLK_SEL(chip->base_addr), bp);
	if (rc) {
		pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
		goto bail;
	}

	rc = pm8xxx_readb(chip->dev,
			SSBI_REG_ADDR_IRQ_IT_STATUS(chip->base_addr), ip);
	if (rc)
		pr_err("Failed Reading Status rc=%d\n", rc);
bail:
	spin_unlock(&chip->pm_irq_lock);
	return rc;
}
Example #3
0
/**
 * pm8xxx_get_irq_stat - get the status of the irq line
 * @chip: pointer to identify a pmic irq controller
 * @irq: the irq number
 *
 * The pm8xxx gpio and mpp rely on the interrupt block to read
 * the values on their pins. This function is to facilitate reading
 * the status of a gpio or an mpp line. The caller has to convert the
 * gpio number to irq number.
 *
 * RETURNS:
 * an int indicating the value read on that line
 */
int pm8xxx_get_irq_stat(struct pm_irq_chip *chip, int irq)
{
	int pmirq, rc;
	u8  block, bits, bit;
	unsigned long flags;

	if (chip == NULL || irq < chip->irq_base ||
			irq >= chip->irq_base + chip->num_irqs)
		return -EINVAL;

	pmirq = irq - chip->irq_base;

	block = pmirq / 8;
	bit = pmirq % 8;

	spin_lock_irqsave(&chip->pm_irq_lock, flags);

	rc = pm8xxx_writeb(chip->dev,
			SSBI_REG_ADDR_IRQ_BLK_SEL(chip->base_addr), block);
	if (rc) {
		pr_err("Failed Selecting block irq=%d pmirq=%d blk=%d rc=%d\n",
			irq, pmirq, block, rc);
		goto bail_out;
	}

	rc = pm8xxx_readb(chip->dev,
			SSBI_REG_ADDR_IRQ_RT_STATUS(chip->base_addr), &bits);
	if (rc) {
		pr_err("Failed Configuring irq=%d pmirq=%d blk=%d rc=%d\n",
			irq, pmirq, block, rc);
		goto bail_out;
	}

	rc = (bits & (1 << bit)) ? 1 : 0;

bail_out:
	spin_unlock_irqrestore(&chip->pm_irq_lock, flags);

	return rc;
}
static int pm8xxx_write_config_irq(struct pm_irq_chip *chip, u8 bp, u8 cp)
{
    int	rc;

    spin_lock(&chip->pm_irq_lock);
    rc = pm8xxx_writeb(chip->dev,
                       SSBI_REG_ADDR_IRQ_BLK_SEL(chip->base_addr), bp);
    if (rc) {
        pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
        goto bail;
    }
    /*
     * Set the write bit here as this could be a unrequested irq
     * whose PM_IRQF_WRITE bit is not set
     */
    cp |= PM_IRQF_WRITE;
    rc = pm8xxx_writeb(chip->dev,
                       SSBI_REG_ADDR_IRQ_CONFIG(chip->base_addr), cp);
    if (rc)
        pr_err("Failed Configuring IRQ rc=%d\n", rc);
bail:
    spin_unlock(&chip->pm_irq_lock);
    return rc;
}