/*! * ======== InterruptDsp_intShmStub ======== */ Void InterruptDsp_intShmStub(UArg arg) { UInt16 index; UInt16 selfIdx; UInt16 loopIdx; InterruptDsp_FxnTable *table; selfIdx = MultiProc_self(); /* * Loop through each Sub-mailbox to determine which one generated * interrupt. */ for (loopIdx = 0; loopIdx < MultiProc_getNumProcsInCluster(); loopIdx++) { if (loopIdx == selfIdx) { continue; } index = MBX_TABLE_IDX(loopIdx, selfIdx); if ((REG32(MAILBOX_STATUS(index)) != 0) && (REG32(MAILBOX_IRQENABLE_SET_DSP(index)) & MAILBOX_REG_VAL(SUBMBX_IDX(index)))) { table = &(InterruptDsp_module->fxnTable[PROCID(loopIdx)]); (table->func)(table->arg); } } }
/*! * ======== InterruptBenelli_intShmMbxStub ======== */ Void InterruptBenelli_intShmMbxStub(UArg arg) { UInt16 index; UInt16 selfIdx; UInt16 loopIdx; InterruptBenelli_FxnTable *table; selfIdx = MultiProc_self(); for (loopIdx = 0; loopIdx < MultiProc_getNumProcsInCluster(); loopIdx++) { if (loopIdx == selfIdx) { continue; } index = MBX_TABLE_IDX(loopIdx, selfIdx); if (((REG32(MAILBOX_STATUS(index)) != 0) && (REG32(MAILBOX_IRQENABLE_SET(index)) & MAILBOX_REG_VAL(SUBMBX_IDX(index))))) { table = &(InterruptBenelli_module->fxnTable[PROCID(loopIdx)]); (table->func)(table->arg); } } }
/*! * ======== InterruptArp32_intEnable ======== * Enable remote processor interrupt */ Void InterruptArp32_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt16 index; index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); }
/*! * ======== InterruptBenelli_intClear ======== * Clear interrupt */ UInt InterruptBenelli_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt arg; UInt16 index; index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); arg = REG32(MAILBOX_MESSAGE(index)); REG32(MAILBOX_IRQSTATUS_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); return (arg); }
/*! * ======== InterruptDsp_intDisable ======== * Disables remote processor interrupt */ Void InterruptDsp_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt16 index; Assert_isTrue(((remoteProcId < MultiProc_getNumProcsInCluster()) && (remoteProcId != MultiProc_self())), ti_sdo_ipc_Ipc_A_internal); index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); REG32(MAILBOX_IRQENABLE_CLR_DSP(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); }
/*! * ======== InterruptBenelli_intEnable ======== * Enable remote processor interrupt */ Void InterruptBenelli_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt16 index; index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); /* * If the remote processor communicates via mailboxes, we should enable * the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes * share the same Hwi */ REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); }
/*! * ======== InterruptDsp_intClear ======== * Clear interrupt */ UInt InterruptDsp_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt arg; UInt16 index; index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); arg = REG32(MAILBOX_MESSAGE(index)); REG32(MAILBOX_IRQSTATUS_CLR_DSP(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); /* Write to EOI (End Of Interrupt) register */ REG32(MAILBOX_EOI_REG(index)) = 0x1; return (arg); }