static vsf_err_t vsfusbd_MSCBOT_SendCSW(struct vsfusbd_device_t *device, struct vsfusbd_MSCBOT_param_t *param) { struct USBMSC_CSW_t *CSW = ¶m->CSW; uint32_t remain_size; CSW->dCSWSignature = SYS_TO_LE_U32(USBMSC_CSW_SIGNATURE); CSW->dCSWTag = param->CBW.dCBWTag; remain_size = param->CBW.dCBWDataTransferLength; if (param->scsi_transact != NULL) { remain_size -= param->scsi_transact->data_size; vsfscsi_release_transact(param->scsi_transact); } CSW->dCSWDataResidue = SYS_TO_LE_U32(remain_size); param->bufstream.mem.buffer.buffer = (uint8_t *)¶m->CSW; param->bufstream.mem.buffer.size = sizeof(param->CSW); param->bufstream.mem.read = true; param->bufstream.stream.op = &bufstream_op; STREAM_INIT(¶m->bufstream); param->transact.ep = param->ep_in; param->transact.data_size = sizeof(param->CSW); param->transact.stream = (struct vsf_stream_t *)¶m->bufstream; param->transact.cb.on_finish = vsfusbd_MSCBOT_on_idle; param->transact.cb.param = param; return vsfusbd_ep_send(param->device, ¶m->transact); }
static uint32_t cfi_get_cmd(uint8_t cmd, uint8_t data_width) { switch (data_width) { case 1: return (uint32_t)cmd; case 2: return (uint32_t)SYS_TO_LE_U16(cmd); case 4: return SYS_TO_LE_U32(cmd); default: return 0; } }
static vsf_err_t kinetisswj_iap_run(struct kinetis_fl_t *fl, struct kinetisswj_iap_cmd_t *cmd) { uint32_t buff_tmp[5]; buff_tmp[0] = SYS_TO_LE_U32(cmd->reg_base); // reg base buff_tmp[1] = SYS_TO_LE_U32(cmd->fccob[0]); // iap parameters buff_tmp[2] = SYS_TO_LE_U32(cmd->fccob[1]); buff_tmp[3] = SYS_TO_LE_U32(cmd->fccob[2]); // sync is word AFTER command in sram buff_tmp[4] = SYS_TO_LE_U32(1); // sync // write iap command with sync to target SRAM if (adi_memap_write_buf32(KINETIS_IAP_COMMAND_ADDR, (uint8_t*)buff_tmp, sizeof(buff_tmp))) { LOG_ERROR(ERRMSG_FAILURE_OPERATION, "load iap cmd to SRAM"); return ERRCODE_FAILURE_OPERATION; } fl->iap_cnt++; return VSFERR_NONE; }
vsf_err_t stm32swj_fl_run(struct stm32_fl_t *fl, struct stm32_fl_cmd_t *cmd) { uint32_t buff_tmp[10]; buff_tmp[0] = SYS_TO_LE_U32(cmd->cr_addr); buff_tmp[1] = SYS_TO_LE_U32(cmd->cr_value1); buff_tmp[2] = SYS_TO_LE_U32(cmd->cr_value2); buff_tmp[3] = SYS_TO_LE_U32(cmd->sr_addr); buff_tmp[4] = SYS_TO_LE_U32(cmd->sr_busy_mask); buff_tmp[5] = SYS_TO_LE_U32(cmd->target_addr); buff_tmp[6] = SYS_TO_LE_U32(cmd->ram_addr); switch (cmd->data_type) { case 0: buff_tmp[7] = STM32_FL_DATATYPE_0; break; case 1: buff_tmp[7] = STM32_FL_DATATYPE_BYTE; break; case 2: buff_tmp[7] = STM32_FL_DATATYPE_HWORD; break; case 4: buff_tmp[7] = STM32_FL_DATATYPE_WORD; break; case 8: buff_tmp[7] = STM32_FL_DATATYPE_DWORD; break; default: return VSFERR_FAIL; } buff_tmp[7] |= SYS_TO_LE_U16(cmd->data_round) << 16; buff_tmp[8] = SYS_TO_LE_U16(cmd->data_unit_round); buff_tmp[9] = SYS_TO_LE_U32(1); // write fl command with sync to target SRAM // sync is 4-byte AFTER command in sram if (adi_memap_write_buf32(fl->base + STM32_FL_COMMAND_OFFSET, (uint8_t*)buff_tmp, sizeof(buff_tmp))) { LOG_ERROR(ERRMSG_FAILURE_OPERATION, "load flashloader cmd to SRAM"); return ERRCODE_FAILURE_OPERATION; } fl->cnt++; return VSFERR_NONE; }