void IOsetRemap()
{
#if defined(PIC18F26J50)
SystemUnlock();
PPSCONbits.IOLOCK = 0; // Turn off PPS Write Protect
SystemLock();
#ifdef __SERIAL__
RPINR16 = 4; // RP4 <- RX2
RPOR3 = 5; // RP3 -> TX2 (func. num. 5)
//RPINR17 = ; // EUSART2 Clock Input (CKR2)
#endif
#ifdef __SPI2__
RPINR21 = 6; // RP6 (RB3) <- SDI2
RPOR5 = 10; // RP5 (RB2) -> SCK2
RPOR4 = 9; // RP4 (RB1) -> SDO2 (func. num. 9)
//RPOR3 = 12; // RP3 (RB0) -> SS2 (SPI DMA Slave Select)
#endif
#ifdef __PWM__
// TODO
// RPINR24 = ; // PWM Fault Input (FLT0)
#endif
SystemUnlock();
PPSCONbits.IOLOCK = 1; // Turn on PPS Write Protect
SystemLock();
#endif /* defined(PIC18F26J50) */
}
// PIC32 Peripheral Remappage
void IOsetRemap()
{
#if defined(PIC32_PINGUINO_220)
SystemUnlock();
CFGCONbits.IOLOCK=0; // unlock configuration
CFGCONbits.PMDLOCK=0;
#ifdef __SERIAL__
U2RXRbits.U2RXR=6; // Define U2RX as RC8 ( D0 )
RPC9Rbits.RPC9R=2; // Define U2TX as RC9 ( D1 )
U1RXRbits.U1RXR=2; // Define U1RX as RA4 ( UEXT SERIAL )
RPB4Rbits.RPB4R=1; // Define U1TX as RB4 ( UEXT SERIAL )
#endif
#ifdef __SPI__
SDI1Rbits.SDI1R=5; // Define SDI1 as RA8 ( UEXT SPI )
RPA9Rbits.RPA9R=3; // Define SDO1 as RA9 ( UEXT SPI )
#endif
#ifdef __PWM__
RPC2Rbits.RPC2R =0b0101; // PWM0 = OC3 as D2 = RC2
RPC3Rbits.RPC3R =0b0101; // PWM1 = OC4 as D3 = RC3
RPB5Rbits.RPB5R =0b0101; // PWM2 = OC2 as D11 = RB5
RPB13Rbits.RPB13R=0b0110; // PWM3 = OC5 as D12 = RB13
RPB15Rbits.RPB15R=0b0101; // PWM4 = OC1 as D13 = RB15
#endif
CFGCONbits.IOLOCK=1; // relock configuration
CFGCONbits.PMDLOCK=1;
SystemLock();
#endif
// Thanks to danirobin
#if defined(PINGUINO32MX250) || defined(PINGUINO32MX220)
SystemUnlock();
CFGCONbits.IOLOCK=0; // unlock configuration
CFGCONbits.PMDLOCK=0;
#ifdef __SERIAL__
U2RXRbits.U2RXR =0b0010; // Define U2RX as RB1
RPB0Rbits.RPB0R =0b0010; // Define U2TX as RB0 _
U1RXRbits.U1RXR =0b0100; // Define U1RX as RB2 ( D10 )
RPB3Rbits.RPB3R =0b0001; // Define U1TX as RB3 ( D9 )
#endif
#ifdef __SPI__
SDI1Rbits.SDI1R=1; // Define SDI1 as RB5 [Overlap!]
RPA4Rbits.RPA4R=3; // Define SDO1 as RA4 [Overlap!]
#endif
#ifdef __PWM__
RPB4Rbits.RPB4R =0b0101; // PWM0 = OC1 = RB4
RPA4Rbits.RPA4R =0b0110; // PWM1 = OC4 = RA4
RPB5Rbits.RPB5R =0b0101; // PWM2 = OC2 = RB5
RPB13Rbits.RPB13R=0b0101; // PWM3 = OC5 = RB13
RPB14Rbits.RPB14R=0b0101; // PWM4 = OC3 = RB14
#endif
CFGCONbits.IOLOCK=1; // relock configuration
CFGCONbits.PMDLOCK=1;
SystemLock();
#endif
}
/**
* Write the clock settings into the registers; this effectively applies the
* new settings, and will change the CPU frequency, peripheral
* frequency, and the number of flash wait states.
*
* This normally requires a call to
* SystemClocksCalcCpuClockSettings(), and
* SystemClocksCalcPeripheralClockSettings() before.
*
* @see system.c::SystemConfig()
*
* @return Nothing
*/
void SystemClocksWriteSettings(const SystemClocksSettings *s)
{
SystemUnlock();
/**
* @page 186
*
* PIC32MX Family Clock Diagram
*
* @page 189
*
* OSCCON: Oscillator Control Register
*/
/*
* bit 10-8 NOSC<2:0>: New Oscillator Selection bits
* 011 = Primary Oscillator with PLL module (XTPLL, HSPLL or ECPLL)
*/
OSCCONbits.NOSC = POSCPLL;
/*
* bit 29-27 PLLODIV<2:0>: Output Divider for PLL
*/
OSCCONbits.PLLODIV = s->PLLODIV;
/*
* bit 18-16 PLLMULT<2:0>: PLL Multiplier bits
*/
OSCCONbits.PLLMULT = s->PLLMULT;
/*
* bit 0 OSWEN: Oscillator Switch Enable bit
* 1 = Initiate an osc switch to selection specified by NOSC2:NOSC0 bits
* 0 = Oscillator switch is complete
*/
OSCCONbits.OSWEN = 1;
// Busy wait until osc switch has been completed
while (OSCCONbits.OSWEN == 1)
{
asm("nop");
}
/*
* bit 20-19 PBDIV<1:0>: Peripheral Bus Clock Divisor
*/
OSCCONbits.PBDIV = s->PBDIV;
// Set wait states
#if !defined(PIC32_PINGUINO_220) && \
!defined(PINGUINO32MX220) && \
!defined(PINGUINO32MX250) && \
!defined(PINGUINO32MX270)
CHECON = (SystemClocksGetCpuFrequency(s) / 20) - 1; // FlashWaitStates
#endif
//
SystemLock();
}
void SetFlashWaitStates_old()
{
SystemUnlock();
#if defined(PIC32_PINGUINO_220)||defined(GENERIC32MX250F128)||defined(GENERIC32MX220F032)
PMMODEbits.WAITB = 0b00; // Data wait of 1 TPB
#else
CHECON = (GetSystemClock() / 20) - 1; // FlashWaitStates
#endif
SystemLock();
}
int RTCC_SetWriteDisable(void)
{
// assume interrupts are disabled
// assume the DMA controller is suspended
// assume the device is locked
SystemUnlock();
RTCCONCLR = 0x8; // clear RTCWREN (bit 3) in RTCCON
SystemLock();
// re-enable interrupts
// re-enable the DMA controller
}
void SystemReset()
{
u16 dummy;
SystemUnlock();
// set SWRST bit to arm reset
RSWRSTSET = 1;
// read RSWRST register to trigger reset
dummy = RSWRST;
// prevent any unwanted code execution until reset occurs
while(1);
}
void RTCC_SOSCenable(void)
{
SystemUnlock();
OSCCONbits.SOSCEN = 1;
SystemLock();
// Wait for stable SOCSC oscillator output before enabling the RTCC.
// This typically requires a 32 ms delay between enabling the SOSC and enabling the RTCC.
// 1st option
// Delayms(50);
// 2nd option
// Wait for the SOSC to run
while (RTCC_GetSOSCstatus() != RTCC_SOSC_ON);
}
void SetFlashWaitStates_old()
{
SystemUnlock();
#if !defined(PIC32_PINGUINO_220) && \
!defined(PINGUINO32MX220) && \
!defined(PINGUINO32MX250) && \
!defined(PINGUINO32MX270)
CHECON = (GetSystemClock() / 20) - 1; // FlashWaitStates
#endif
SystemLock();
}
void RTCC_SOSCdisable(void)
{
SystemUnlock();
OSCCONbits.SOSCEN = 0;
SystemLock();
}
