void test_pwm_channel_period() {
pwm_reset_peripheral();
pwm_set_channel_period(PWM_CHANNEL_3, 1000);
TEST_ASSERT_EQUAL_UINT32(1000, pwm_get_channel_period(PWM_CHANNEL_3));
pwm_set_channel_period(PWM_CHANNEL_3, 65535);
TEST_ASSERT_EQUAL_UINT32(65535, pwm_get_channel_period(PWM_CHANNEL_3));
}
TEST(file_reopen_opened_file,
then_the_file_should_be_deleted_from_the_cache)
{
TEST_ASSERT_EQUAL_UINT32(fm_res, FM_SUCCESS);
TEST_ASSERT_EQUAL_UINT32((&fileCache[6])->lessRecent, 5);
TEST_ASSERT_EQUAL_UINT32((&fileCache[6])->moreRecent, 8);
}
void test_pwm_channel_prescaler() {
pwm_reset_peripheral();
pwm_set_channel_prescaler(PWM_CHANNEL_3, PWM_PRES_MCK_DIV_1024);
TEST_ASSERT_EQUAL_UINT32(PWM_PRES_MCK_DIV_1024,
pwm_get_channel_prescaler(PWM_CHANNEL_3));
pwm_set_channel_prescaler(PWM_CHANNEL_3, PWM_PRES_MCK_DIV_32);
TEST_ASSERT_EQUAL_UINT32(PWM_PRES_MCK_DIV_32,
pwm_get_channel_prescaler(PWM_CHANNEL_3));
}
void test_pwm_channel_duty_cycle() {
pwm_reset_peripheral();
pwm_set_channel_duty_cycle(PWM_CHANNEL_3, 50);
TEST_ASSERT_EQUAL_UINT32(50, pwm_read_channel(PWM_CHANNEL_3));
// change duty cycle when channel is enabled
pwm_enable_channel(PWM_CHANNEL_3);
pwm_set_channel_duty_cycle(PWM_CHANNEL_3, 60);
TEST_ASSERT_EQUAL_UINT32(60, pwm_read_channel(PWM_CHANNEL_3));
}
void test_pwm_set_frequency(){
pwm_reset_peripheral();
pwm_set_channel_alignment(PWM_CHANNEL_3, PWM_CHANNEL_ALIGN_LEFT);
pwm_set_channel_frequency(PWM_CHANNEL_3, 25000);
TEST_ASSERT_EQUAL_UINT32(0,
pwm_get_channel_prescaler(PWM_CHANNEL_3));
TEST_ASSERT_EQUAL_UINT32(3360,
pwm_get_channel_period(PWM_CHANNEL_3));
}
TEST(allocate_small_chunk, then_new_chunk_must_be_allocated)
{
MemoryChunk chunk = (MemoryChunk)((char*)mem_asc - MEM_CHUNK_SIZE);
TEST_ASSERT_NOT_NULL(mem_asc);
TEST_ASSERT_EQUAL_UINT32(chunk->memsetorchunk, mc_asc);
TEST_ASSERT_EQUAL_UINT32(chunk->size, 128);
TEST_ASSERT_EQUAL_UINT32(chunk->sizeRequested, 100);
}
void
test_controller_attr_private_connection_type(void) {
lagopus_result_t rc;
controller_attr_t *attr = NULL;
datastore_controller_connection_type_t actual_connection_type
= DATASTORE_CONTROLLER_ROLE_UNKNOWN;
const datastore_controller_connection_type_t expected_connection_type
= actual_connection_type;
datastore_controller_connection_type_t set_connection_type
= DATASTORE_CONTROLLER_ROLE_EQUAL;
datastore_controller_connection_type_t actual_set_connection_type
= DATASTORE_CONTROLLER_ROLE_UNKNOWN;
const datastore_controller_connection_type_t expected_set_connection_type
= set_connection_type;
controller_initialize();
rc = controller_attr_create(&attr);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_NOT_NULL_MESSAGE(attr, "attr_create() will create new controller");
// Normal case of getter
{
rc = controller_get_connection_type(attr, &actual_connection_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(expected_connection_type, actual_connection_type);
}
// Abnormal case of getter
{
rc = controller_get_connection_type(NULL, &actual_connection_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
rc = controller_get_connection_type(attr, NULL);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
}
// Normal case of setter
{
rc = controller_set_connection_type(attr, set_connection_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
rc = controller_get_connection_type(attr, &actual_set_connection_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(expected_set_connection_type,
actual_set_connection_type);
}
// Abnormal case of setter
{
rc = controller_set_connection_type(NULL, set_connection_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
}
controller_attr_destroy(attr);
controller_finalize();
}
TEST(file_cache_realloc, then_minimal_items_should_be_allocated)
{
TEST_ASSERT_EQUAL_UINT32(fileCacheCount, 32);
TEST_ASSERT_EQUAL_UINT32(fileCache[0].nextFree, 1);
for (i = 1; i < 30; i++)
TEST_ASSERT_EQUAL_UINT32(fileCache[i].nextFree, i + 1);
TEST_ASSERT_EQUAL_UINT32(fileCache[31].nextFree, 0);
}
void test_pwm_set_clkx() {
pwm_reset_peripheral();
// For CLKA
pwm_set_clkx(PWM_CLK_ID_CLKA, PWM_PRES_MCK_DIV_1024, 255);
TEST_ASSERT_EQUAL_UINT32(0xA00, (PWM->PWM_CLK & PWM_CLK_PREA_MASK ));
TEST_ASSERT_EQUAL_UINT32(0xFF, (PWM->PWM_CLK & PWM_CLK_DIVA_MASK ));
// For CLKB
pwm_set_clkx(PWM_CLK_ID_CLKB, PWM_PRES_MCK_DIV_32, 128);
TEST_ASSERT_EQUAL_UINT32(0x5000000, (PWM->PWM_CLK & PWM_CLK_PREB_MASK ));
TEST_ASSERT_EQUAL_UINT32(0x800000, (PWM->PWM_CLK & PWM_CLK_DIVB_MASK));
}
TEST(file_cache_insert,
then_the_item_should_be_added_to_the_ring)
{
FCacheEl theHead = &fileCache[0];
int theLessRecentInd = theHead->lessRecent;
FCacheEl theLessRecent = &fileCache[theLessRecentInd];
TEST_ASSERT_EQUAL_UINT32(theHead->lessRecent, 1);
TEST_ASSERT_EQUAL_UINT32(theHead->moreRecent, 1);
TEST_ASSERT_EQUAL_UINT32(theLessRecent->lessRecent, 0);
TEST_ASSERT_EQUAL_UINT32(theLessRecent->moreRecent, 0);
}
TEST(relrow_tests, att_align)
{
int align_i1 = ATT_ALIGN(11, 'i');
int align_i2 = ATT_ALIGN(9, 'i');
int align_d1 = ATT_ALIGN(22, 'd');
int align_d2 = ATT_ALIGN(17, 'd');
int align_s1 = ATT_ALIGN(12, 's');
int align_s2 = ATT_ALIGN(11, 's');
int align_s3 = ATT_ALIGN(9, 's');
int align_o = ATT_ALIGN(12, 'o');
TEST_ASSERT_EQUAL_UINT32(align_i1, 12);
TEST_ASSERT_EQUAL_UINT32(align_i2, 12);
TEST_ASSERT_EQUAL_UINT32(align_d1, 24);
TEST_ASSERT_EQUAL_UINT32(align_d2, 24);
TEST_ASSERT_EQUAL_UINT32(align_s1, 12);
TEST_ASSERT_EQUAL_UINT32(align_s2, 12);
TEST_ASSERT_EQUAL_UINT32(align_s3, 10);
TEST_ASSERT_EQUAL_UINT32(align_o, 12);
}
void test_keyExpansion_given_128_bit_cipher_key(void){
printf("No7.0 - keyExpansion 128-bit cipher key\n");
int i = 0;
char* key = malloc(sizeof(char)*17);
uint8_t cipcherkey[] = { 0x2b,0x7e,0x15,0x16,0x28,0xae,0xd2,0xa6,0xab,0xf7,0x15,0x88,0x09,0xcf,0x4f,0x3c};
for(i = 0; i < 16 ; i++){
key[i] = cipcherkey[i];
}
//printf("key = %.*x\n",8,key[i]);
uint32_t word[44];
keyExpansion(key,word,4,10);
TEST_ASSERT_EQUAL_UINT32(0xb6630ca6,word[43]);
TEST_ASSERT_EQUAL_UINT32(0xac7766f3,word[36]);
TEST_ASSERT_EQUAL_UINT32(0x110b3efd,word[25]);
}
TEST(insert_many_ids_into_same_list, then_only_few_mallocs_must_be_called)
{
int i;
int expectedMallocCalls = 1000 / 36 + 1;
uint expectedMemLen = AlignDefault(sizeof(SHashItem))
+ AlignDefault(sizeof(int))
+ AlignDefault(34);
TEST_ASSERT_TRUE(fakeMemStorageCount > 0);
TEST_ASSERT_EQUAL_UINT32(fakeMemStorageCount, expectedMallocCalls);
for (i = 0; i < expectedMallocCalls; i++)
{
TEST_ASSERT_EQUAL_UINT32(fakeMemStorage[i].memLen, expectedMemLen * 36);
}
}
void test_pwm_channel_polarity() {
pwm_reset_peripheral();
pwm_set_channel_polarity(PWM_CHANNEL_3, PWM_CHANNEL_POLARITY_HIGH);
TEST_ASSERT_EQUAL_UINT32(512, (PWM->PWM_CMR3 & PWM_CMRx_CPOL_MASK ));
pwm_set_channel_polarity(PWM_CHANNEL_3, PWM_CHANNEL_POLARITY_LOW);
TEST_ASSERT_EQUAL_HEX32(0x0, (PWM->PWM_CMR3 & PWM_CMRx_CPOL_MASK ));
}
static void test_find_zero_blocks_null(void)
{
uint64_t offset = 0;
uint32_t len = 0;
find_zero_blocks(NULL, &offset, &len);
TEST_ASSERT_EQUAL_UINT64(0, offset);
TEST_ASSERT_EQUAL_UINT32(0, len);
}
void test_subWord_given_0xcf4f3c09_expected_0x8a84eb01(void){
printf("No5.0 - subWord\n");
uint32_t expect0 = 0x8a << 24 | 0x84 << 16 | 0xeb << 8 | 0x01 << 0;
uint32_t temp = 0xcf << 24 | 0x4f << 16 | 0x3c << 8 | 0x09 << 0;
temp = subWord(temp);
printf("%x %x",expect0,temp);
TEST_ASSERT_EQUAL_UINT32(expect0,temp);
}
void test_subWord_given_0x6c76052a_expected_0x50386be5(void){
printf("No6.0 - subWord\n");
uint32_t expect0 = 0x50 << 24 | 0x38 << 16 | 0x6b << 8 | 0xe5 << 0;
uint32_t temp = 0x6c << 24 | 0x76 << 16 | 0x05 << 8 | 0x2a << 0;
temp = subWord(temp);
printf("%x %x",expect0,temp);
TEST_ASSERT_EQUAL_UINT32(expect0,temp);
}
static void test_countOnesInBitMask(void)
{
unsigned int i = 0;
for (i = 0; i < 32; i++)
{
TEST_ASSERT_EQUAL_UINT32(i, countOnes(makeBitmask(i, 0)));
}
}
void test_keyExpansion_given_256_bit_cipher_key(void){
printf("No9.0 - keyExpansion 256-bit cipher key\n");
int i = 0;
char* key = malloc(sizeof(char)*33);
uint8_t cipcherkey[] = { 0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe,0x2b,0x73,0xae,0xf0,\
0x85,0x7d,0x77,0x81,0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7,\
0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4};
for(i = 0; i < 32 ; i++){
key[i] = cipcherkey[i];
}
uint32_t word[60];
keyExpansion(key,word,8,14);
TEST_ASSERT_EQUAL_UINT32(0x9ba35411,word[8]);
TEST_ASSERT_EQUAL_UINT32(0x98312229,word[22]);
TEST_ASSERT_EQUAL_UINT32(0xde136967,word[40]);
TEST_ASSERT_EQUAL_UINT32(0x706c631e,word[59]);
}
void test_rotWord_given_0x7359f67f_and_expected_0x59f67f73(void){
printf("No4.0 - rotWord\n");
uint32_t expect0 = 0x59 << 24 | 0xf6 << 16 | 0x7f << 8 | 0x73 << 0;
uint32_t temp = 0x73 << 24 | 0x59 << 16 | 0xf6 << 8 | 0x7f << 0;
temp = rotWord(temp);
printf("%x %x",expect0,temp);
TEST_ASSERT_EQUAL_UINT32(expect0,temp);
}
/*
----- -----
--->| 31 | | 34 |
| ----- -----
| | 32 | rotWord | 31 |
| ----- ------> -----
| | 33 | | 32 |
| ----- -----
----| 34 | | 33 |
----- -----
*/
void test_rotWord_given_0x31323334_and_expected_0x34313233(void){
printf("No2.0 - rotWord\n");
uint32_t expect0 = '2' << 24 | '3' << 16 | '4' << 8 | '1' << 0;
uint32_t temp = '1' << 24 | '2' << 16 | '3' << 8 | '4' << 0;
temp = rotWord(temp);
printf("%x %x",expect0,temp);
TEST_ASSERT_EQUAL_UINT32(expect0,temp);
}
void test_rotWord_given_0x2a6c7605_and_expected_0x6c76052a(void){
printf("No3.0 - rotWord\n");
uint32_t expect0 = 0x6c << 24 | 0x76 << 16 | 0x05 << 8 | 0x2a << 0;
uint32_t temp = 0x2a << 24 | 0x6c << 16 | 0x76 << 8 | 0x05 << 0;
temp = rotWord(temp);
printf("%x %x",expect0,temp);
TEST_ASSERT_EQUAL_UINT32(expect0,temp);
}
void
test_controller_role_to_enum(void) {
lagopus_result_t rc;
datastore_controller_role_t actual_type;
// Normal case
{
rc = controller_role_to_enum("unknown", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(DATASTORE_CONTROLLER_ROLE_UNKNOWN, actual_type);
rc = controller_role_to_enum("master", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(DATASTORE_CONTROLLER_ROLE_MASTER, actual_type);
rc = controller_role_to_enum("slave", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(DATASTORE_CONTROLLER_ROLE_SLAVE, actual_type);
rc = controller_role_to_enum("equal", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_OK, rc);
TEST_ASSERT_EQUAL_UINT32(DATASTORE_CONTROLLER_ROLE_EQUAL, actual_type);
rc = controller_role_to_enum("UNKNWON", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
rc = controller_role_to_enum("MASTER", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
rc = controller_role_to_enum("SLAVE", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
rc = controller_role_to_enum("EQUAL", &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
}
// Abnormal case
{
rc = controller_role_to_enum(NULL, &actual_type);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
rc = controller_role_to_enum("equal", NULL);
TEST_ASSERT_EQUAL(LAGOPUS_RESULT_INVALID_ARGS, rc);
}
}
static void test_find_zero_blocks_4095(void)
{
const uint8_t buf[4095] = {0};
uint64_t offset = 0;
uint32_t len = 4095;
find_zero_blocks(buf, &offset, &len);
TEST_ASSERT_EQUAL_UINT64(0, offset);
TEST_ASSERT_EQUAL_UINT32(4095, len);
}
TEST(insert_many_ids_into_same_list, then_hash_list_must_be_filled)
{
int listId = 11111111 & tbl->lowMask;
int sNum = listId >> tbl->segmShift;
int sInd = listId & (tbl->segmSize - 1);
HashItem listPtr = tbl->segments[sNum][sInd];
int numItems = 0;
int key = -1;
while (listPtr != NULL)
{
key = *(int*)GET_HASH_KEY(listPtr);
TEST_ASSERT_EQUAL_UINT32(key, numItems++);
listPtr = listPtr->next;
}
TEST_ASSERT_EQUAL_UINT32(numItems, 1000);
}
/** \brief test function write single register
**
** this function test modbus master write single register
** with callback
**
**/
void test_ciaaModbus_masterCmd0x06WriteSingleRegister_01(void)
{
int32_t hModbusMaster;
uint8_t slaveIdRecv;
uint8_t pduRecv[256];
uint8_t pdu[256] =
{
0X06,
0x00,
0x01,
0X00,
0x03,
};
uint32_t sizeRecv;
/* open modbus master */
hModbusMaster = ciaaModbus_masterOpen();
/* request write single register */
ciaaModbus_masterCmd0x06WriteSingleRegister(
hModbusMaster,
0x0001,
0x0003,
SLAVE_ID,
modbusMaster_cbEndOfComm);
/* perform task modbus master */
ciaaModbus_masterTask(hModbusMaster);
/* receive pdu from master */
ciaaModbus_masterRecvMsg(
hModbusMaster,
&slaveIdRecv,
pduRecv,
&sizeRecv);
/* send message to master */
ciaaModbus_masterSendMsg(
hModbusMaster,
SLAVE_ID,
pdu,
5);
/* verify */
TEST_ASSERT_EQUAL_UINT8(SLAVE_ID, slaveIdRecv);
TEST_ASSERT_EQUAL_UINT8_ARRAY(pdu, pduRecv, 5);
TEST_ASSERT_EQUAL_UINT32(5, sizeRecv);
TEST_ASSERT_EQUAL_UINT8(SLAVE_ID, callBackData_slaveId);
TEST_ASSERT_EQUAL_UINT8(0x06, callBackData_numFunc);
TEST_ASSERT_EQUAL_UINT8(0x00, callBackData_exceptioncode);
}
static void test_find_zero_blocks_8K_zero_zero(void)
{
const uint8_t buf[BLOCK_SIZE * 2] = {0};
uint64_t offset = 0;
uint32_t len = BLOCK_SIZE * 2;
find_zero_blocks(buf, &offset, &len);
TEST_ASSERT_EQUAL_UINT64(BLOCK_SIZE * 2, offset);
TEST_ASSERT_EQUAL_UINT32(0, len);
}
TEST(create_hashtable, then_name_must_be_set_only_with_one_malloc)
{
uint expectedMemLen = sizeof(SHashtable) + strlen("testTable123") + 1;
TEST_ASSERT_EQUAL_STRING(tbl->name, "testTable123");
TEST_ASSERT_TRUE(fakeMemStorageCount > 0);
TEST_ASSERT_EQUAL_UINT32(fakeMemStorage[0].memLen, expectedMemLen);
}
static void test_find_zero_blocks_4097_zero_offset_1(void)
{
const uint8_t buf[BLOCK_SIZE + 1] = {0};
uint64_t offset = 1;
uint32_t len = BLOCK_SIZE;
find_zero_blocks(buf, &offset, &len);
TEST_ASSERT_EQUAL_UINT64(BLOCK_SIZE, offset);
TEST_ASSERT_EQUAL_UINT32(1, len);
}
TEST(checksum, calc_32bit)
{
uint32_t array[] = {
0x11111111, 0x22222222, 0x33333333, 0x44444444, 0x55555555, 0x66666666, 0x77777777, 0x88888888,
0x99999999, 0xAAAAAAAA, 0xBBBBBBBB, 0xCCCCCCCC, 0xDDDDDDDD, 0xEEEEEEEE, 0xFFFFFFFF, 0x00000000
};
size_t len = sizeof(array) / sizeof(array[0]);
uint32_t expects = 0xFFFFFFF8; /* 0x7FFFFFFF8 */
TEST_ASSERT_EQUAL_UINT32( expects, checksum_calc_32bit(array, len) );
}
