Example #1
0
uint8_t tiva_adc_sse_enable(uint8_t adc, uint8_t sse, bool state)
{
  avdbg("ADC%d SSE%d=%01d\n", adc, sse, state);

  uintptr_t actssreg = TIVA_ADC_ACTSS(adc);
  if (state == true)
    {
      modifyreg32(actssreg, 0, (1 << sse));
    }
  else
    {
      modifyreg32(actssreg, (1 << sse), 0);
    }

  return (getreg32(actssreg) & 0xF);
}
Example #2
0
void tiva_adc_dump_reg_cfg(uint8_t adc, uint8_t sse)
{
  /* one-time initialization */

  uintptr_t ccreg = (TIVA_ADC0_BASE + TIVA_ADC_CC_OFFSET); /* Clock */
  uintptr_t pcreg = (TIVA_ADC0_BASE + TIVA_ADC_PC_OFFSET); /* Sample rate */

  /* SSE cfg */

  uintptr_t actssreg = TIVA_ADC_ACTSS(adc);  /* SSE enable state */
  uintptr_t ssprireg = TIVA_ADC_SSPRI(adc);  /* SSE priority */
  uintptr_t emuxreg  = TIVA_ADC_EMUX(adc);   /* SSE trigger */

  /* step cfg */

  uintptr_t ssmuxreg  = (TIVA_ADC_BASE(adc) + TIVA_ADC_SSMUX(sse));  /* step registration */
#ifdef CONFIG_ARCH_CHIP_TM4C129
  uintptr_t ssemuxreg = (TIVA_ADC_BASE(adc) + TIVA_ADC_SSEMUX(sse)); /* extended mux registration */
#endif
  uintptr_t ssopreg   = (TIVA_ADC_BASE(adc) + TIVA_ADC_SSOP(sse));   /* differential status */
#ifdef CONFIG_EXPERIMENTAL
  uintptr_t sstshreg  = (TIVA_ADC_BASE(adc) + TIVA_ADC_SSTSH(sse));  /* sample and hold time */
#endif
  uintptr_t ssctlreg  = (TIVA_ADC_BASE(adc) + TIVA_ADC_SSCTL(sse));  /* step configuration */

  /* Get register contents */

  uint32_t cc = getreg32(ccreg);
  uint32_t pc = getreg32(pcreg);

  /* SSE cfg */

  uint32_t actss = getreg32(actssreg);
  uint32_t sspri = getreg32(ssprireg);
  uint32_t emux  = getreg32(emuxreg);

  /* step cfg */

  uint32_t ssmux = getreg32(ssmuxreg);
#ifdef CONFIG_ARCH_CHIP_TM4C129
  uint32_t ssemux = getreg32(ssemuxreg);
#endif
  uint32_t ssop   = getreg32(ssopreg);
#ifdef CONFIG_EXPERIMENTAL
  uint32_t sstsh  = getreg32(sstshreg);
#endif
  uint32_t ssctl  = getreg32(ssctlreg);

  /* Dump register contents */

  ainfo("CC     [0x%08x]=0x%08x\n", ccreg, cc);
  ainfo("PC     [0x%08x]=0x%08x\n", pcreg, pc);
  ainfo("ACTSS  [0x%08x]=0x%08x\n", actssreg, actss);
  ainfo("SSPRI  [0x%08x]=0x%08x\n", ssprireg, sspri);
  ainfo("EMUX   [0x%08x]=0x%08x\n", emuxreg, emux);
  ainfo("SSMUX  [0x%08x]=0x%08x\n", ssmuxreg, ssmux);
#ifdef CONFIG_ARCH_CHIP_TM4C129
  ainfo("SSEMUX [0x%08x]=0x%08x\n", ssemuxreg, ssemux);
#endif
  ainfo("SSOP   [0x%08x]=0x%08x\n", ssopreg, ssop);
#ifdef CONFIG_EXPERIMENTAL
  ainfo("SSTSH  [0x%08x]=0x%08x\n", sstshreg, sstsh);
#endif
  ainfo("SSCTL  [0x%08x]=0x%08x\n", ssctlreg, ssctl);

}