static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
{
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_MASK,
				     "irq=%d\n", irq);

	if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
	    || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
					     "bad irq=%d\n", irq);
		panic("\n");
	}

	mask_and_ack_8259A(irq);
}
static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq)
{
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_DISABLE,
				     "irq=%d\n", irq);

	if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
	    || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
					     "bad irq=%d\n", irq);
		panic("\n");
	}

	disable_8259A_irq(irq);
}
void toshiba_rbtx4927_irq_dump(char *key)
{
#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
	{
		u32 i, j = 0;
		for (i = 0; i < NR_IRQS; i++) {
			if (strcmp(irq_desc[i].chip->name, "none")
			    == 0)
				continue;

			if ((i >= 1)
			    && (irq_desc[i - 1].chip->name ==
				irq_desc[i].chip->name)) {
				j++;
			} else {
				j = 0;
			}
			TOSHIBA_RBTX4927_IRQ_DPRINTK
			    (TOSHIBA_RBTX4927_IRQ_INFO,
			     "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
			     key, i, i, irq_desc[i].status,
			     (u32) irq_desc[i].chip,
			     (u32) irq_desc[i].action,
			     (u32) (irq_desc[i].action ? irq_desc[i].
				    action->handler : 0),
			     irq_desc[i].depth,
			     irq_desc[i].chip->name, j);
		}
	}
#endif
}
static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
{
	volatile unsigned char v;

	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
				     "irq=%d\n", irq);

	if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
	    || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
					     "bad irq=%d\n", irq);
		panic("\n");
	}

	v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
	v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
	writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
}
static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
{
	volatile unsigned char v;

	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
				     "irq=%d\n", irq);

	if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
	    || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
					     "bad irq=%d\n", irq);
		panic("\n");
	}

	v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
	v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
	TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
}
static void __init toshiba_rbtx4927_irq_ioc_init(void)
{
	int i;

	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
				     "beg=%d end=%d\n",
				     TOSHIBA_RBTX4927_IRQ_IOC_BEG,
				     TOSHIBA_RBTX4927_IRQ_IOC_END);

	for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
	     i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
		set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
					 handle_level_irq);

	setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
		  &toshiba_rbtx4927_irq_ioc_action);
}
static void __init toshiba_rbtx4927_irq_isa_init(void)
{
	int i;

	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_INIT,
				     "beg=%d end=%d\n",
				     TOSHIBA_RBTX4927_IRQ_ISA_BEG,
				     TOSHIBA_RBTX4927_IRQ_ISA_END);

	for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
	     i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++)
		set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_isa_type,
					 handle_level_irq);

	setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
		  &toshiba_rbtx4927_irq_isa_master);
	setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA,
		  &toshiba_rbtx4927_irq_isa_slave);

	/* make sure we are looking at IRR (not ISR) */
	outb(0x0A, 0x20);
	outb(0x0A, 0xA0);
}
void toshiba_rbtx4927_irq_dump_pics(char *s)
{
	u32 level0_m;
	u32 level0_s;
	u32 level1_m;
	u32 level1_s;
	u32 level2;
	u32 level2_p;
	u32 level2_s;
	u32 level3_m;
	u32 level3_s;
	u32 level4_m;
	u32 level4_s;
	u32 level5_m;
	u32 level5_s;

	if (s == NULL)
		s = "null";

	level0_m = (read_c0_status() & 0x0000ff00) >> 8;
	level0_s = (read_c0_cause() & 0x0000ff00) >> 8;

	level1_m = level0_m;
	level1_s = level0_s & 0x87;

	level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
	level2_p = (((level2 & 0x10000)) ? 0 : 1);
	level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));

	level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
	level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;

	level4_m = inb(0x21);
	outb(0x0A, 0x20);
	level4_s = inb(0x20);

	level5_m = inb(0xa1);
	outb(0x0A, 0xa0);
	level5_s = inb(0xa0);

	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "dump_raw_pic() ");
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "cp0:m=0x%02x/s=0x%02x ", level0_m,
				     level0_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "cp0:m=0x%02x/s=0x%02x ", level1_m,
				     level1_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "pic:e=0x%02x/s=0x%02x ", level2_p,
				     level2_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "ioc:m=0x%02x/s=0x%02x ", level3_m,
				     level3_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "sbm:m=0x%02x/s=0x%02x ", level4_m,
				     level4_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
				     "sbs:m=0x%02x/s=0x%02x ", level5_m,
				     level5_s);
	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
				     s);
}