/* Set up some constrol variables common to Resource_Available,
* Reserve_Resources, and Unreserve_Resources. The idea is to break the
* work into two loops and obviate the need to do a Mod operation for every
* cycle checked. The first should check <length1> cycles of <rr>, starting
* with cycle 0 of <rr> and cycle <cycle_mod_ii> of the schedule. The
* second loop should theck <length1> cycles of <rr>, starting with cycle
* <length1> of <rr> and cycle 0 of the schedule.
*/
static void Check_Reserve_Loop_Control(
TI_RES_RES *res,
TOP opcode,
INT cycle,
SI_RR *rr,
INT *length1,
INT *length2,
INT *cycle_mod_ii
)
{
INT32 rr_length;
INT32 length = TI_RES_RES_length(res);
if ( TI_RES_RES_cyclic(res) ) {
*rr = TSI_II_Resource_Requirement(opcode,length);
}
else {
*rr = TSI_Resource_Requirement(opcode);
}
*cycle_mod_ii = Cycle_Mod_II(cycle,length);
rr_length = SI_RR_Length(*rr);
if ( *cycle_mod_ii + rr_length <= length ) {
*length1 = rr_length;
*length2 = 0;
}
else {
*length1 = length - *cycle_mod_ii;
*length2 = rr_length - *length1;
}
}
INT TI_RES_RES_Resources_Length(
TI_RES_RES *res,
TOP opcode
)
{
return SI_RR_Length(TSI_Resource_Requirement(opcode));
}
/* ====================================================================
*
* TI_RES_Can_Dual_Issue
*
* See interface description
*
* ====================================================================
*/
BOOL TI_RES_Can_Dual_Issue(
TOP opcode1,
TOP opcode2
)
{
INT min_length, i;
SI_RR rr1, rr2;
/* Quick check to see if we could ever dual issue something.
*/
if (!PROC_has_same_cycle_branch_shadow()) return FALSE;
/* Resource requirements for each.
*/
rr1 = TSI_Resource_Requirement(opcode1);
rr2 = TSI_Resource_Requirement(opcode2);
/* We only have to check up to the end of the shorter of the two resource
* requests.
*/
if ( SI_RR_Length(rr1) < SI_RR_Length(rr2) )
min_length = SI_RR_Length(rr1);
else
min_length = SI_RR_Length(rr2);
/* Check each cycle.
*/
for ( i = 0; i < min_length; ++i ) {
SI_RRW rrw = SI_RRW_Initial();
rrw = SI_RRW_Reserve(rrw,SI_RR_Cycle_RRW(rr1,i));
rrw = SI_RRW_Reserve(rrw,SI_RR_Cycle_RRW(rr2,i));
if ( SI_RRW_Has_Overuse(rrw) ) return FALSE;
}
return TRUE;
}
/* ====================================================================
*
* TI_RES_RES_Has_TOP
*
* See interface description
*
* ====================================================================
*/
void TI_RES_RES_Has_TOP(
TI_RES_RES *res,
TOP opcode
)
{
if ( !BS_MemberP(TI_RES_RES_si_ids(res), TSI_Id(opcode) ) ) {
UINT rr_length;
TI_RES_RES_si_ids(res) = BS_Union1D(TI_RES_RES_si_ids(res),
TSI_Id(opcode),
TI_RES_RES_pool(res));
TI_RES_RES_bad_iis(res) = SI_BAD_II_SET_Union(TI_RES_RES_bad_iis(res),
TSI_Bad_IIs(opcode));
rr_length = SI_RR_Length(TSI_Resource_Requirement(opcode));
if ( rr_length < TI_RES_RES_min_rr_length(res) ) {
TI_RES_RES_min_rr_length(res) = rr_length;
}
}
}
