/**
*
* This example sends frames with the interrupt coalescing settings altered
* from their defaults.
*
* The default settings will interrupt the processor after every frame has been
* sent. This example will increase the threshold resulting in lower CPU
* utilization since it spends less time servicing interrupts.
*
* @param TemacInstancePtr is a pointer to the instance of the Temac
* component.
*
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
*
* @note None.
*
******************************************************************************/
int TemacSgDmaIntrCoalescingExample(XLlTemac * TemacInstancePtr,
XLlDma * DmaInstancePtr)
{
int Status;
u32 TxFrameLength;
int TxFramesToSend = 1000;
int TxFramesSent = 0;
int PayloadSize = XTE_MTU;
u32 Index;
u32 NumBd;
u16 Threshold = 64;
XLlDma_BdRing *RxRingPtr = &XLlDma_mGetRxRing(DmaInstancePtr);
XLlDma_BdRing *TxRingPtr = &XLlDma_mGetTxRing(DmaInstancePtr);
XLlDma_Bd *BdPtr, *BdCurPtr;
/*
* Clear variables shared with callbacks
*/
FramesRx = 0;
FramesTx = 0;
DeviceErrors = 0;
/*
* Calculate the frame length (not including FCS)
*/
TxFrameLength = XTE_HDR_SIZE + PayloadSize;
/*
* Setup packet to be transmitted. The same packet will be transmitted
* over and over
*/
TemacUtilFrameHdrFormatMAC(&TxFrame, TemacMAC);
TemacUtilFrameHdrFormatType(&TxFrame, PayloadSize);
TemacUtilFrameSetPayloadData(&TxFrame, PayloadSize);
/*
* Flush the TX frame before giving it to DMA TX channel to transmit,
* in case D-Caching is turned on.
*/
XCACHE_FLUSH_DCACHE_RANGE(&TxFrame, TxFrameLength);
/*
* We don't care about the receive channel for this example, so turn it off
*/
Status = XLlTemac_ClearOptions(TemacInstancePtr,
XTE_RECEIVER_ENABLE_OPTION);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error clearing option");
return XST_FAILURE;
}
/*
* Set the interrupt coalescing parameters for the test. The waitbound timer
* is set to 1 (ms) to catch the last few frames.
*
* If you set variable Threshold to some value larger than TXBD_CNT, then
* there can never be enough frames sent to meet the threshold. In this case
* the waitbound timer will always cause the interrupt to occur.
*/
Status = XLlDma_BdRingSetCoalesce(TxRingPtr, Threshold, 1);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting coalescing settings");
return XST_FAILURE;
}
/*
* Prime the engine, allocate all BDs and assign them to the same buffer
*/
Status = XLlDma_BdRingAlloc(TxRingPtr, TXBD_CNT, &BdPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error allocating TxBDs prior to starting");
return XST_FAILURE;
}
/*
* Setup the TxBDs
*/
BdCurPtr = BdPtr;
for (Index = 0; Index < TXBD_CNT; Index++) {
XLlDma_mBdSetBufAddr(BdCurPtr, &TxFrame);
XLlDma_mBdSetLength(BdCurPtr, TxFrameLength);
XLlDma_mBdSetStsCtrl(BdCurPtr, XLLDMA_BD_STSCTRL_SOP_MASK |
XLLDMA_BD_STSCTRL_EOP_MASK);
BdCurPtr = XLlDma_mBdRingNext(TxRingPtr, BdCurPtr);
}
/*
* Enqueue all TxBDs to HW
*/
Status = XLlDma_BdRingToHw(TxRingPtr, TXBD_CNT, BdPtr);
TxFramesSent += TXBD_CNT;
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error committing TxBDs prior to starting");
return XST_FAILURE;
}
/*
* Enable the send interrupts. Nothing should be transmitted yet as the
* device has not been started
*/
XLlDma_mBdRingIntEnable(TxRingPtr, XLLDMA_CR_IRQ_ALL_EN_MASK);
/* Enable temac interrupts to capture errors */
XLlTemac_IntEnable(TemacInstancePtr, XTE_INT_RECV_ERROR_MASK);
/*
* Start the device. Transmission commences now!
*/
XLlTemac_Start(TemacInstancePtr);
/*
* As DMA TX channel has been started in
* TemacSgDmaIntrSingleFrameExample() above, there is no need to start
* it again here
*/
while (TxFramesSent < TxFramesToSend) {
/*
* Wait for the interrupt
*/
while (!FramesTx);
/*
* Some TxBDs are ready for post processing. Get all that are available
* at the moment, free them, then allocate the same number and
* re-enqueue back to HW. At the same time this all occurs here,
* the DMA engine should be processing other TxBDs. If we can stay ahead
* of the transmitter like this, then throughput should be at or near
* line-rate.
*
* Note that this retrieves up to TXBD_CNT outstanding packets,
* so we may be processing more packets here than the threshold
* value, which may result in a seemingly spurious interrupt
* next time if we grab twice (or more) of the threshold value
* this time around (clear as mud, eh!). Bottom line is that we
* ignore if NumBd returns as zero.
*/
NumBd = XLlDma_BdRingFromHw(TxRingPtr, TXBD_CNT, &BdPtr);
if (NumBd > 0) {
TxFramesSent += NumBd;
/*
* Don't bother to check the BDs status, just free them
*/
Status = XLlDma_BdRingFree(TxRingPtr, NumBd, BdPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error freeing TxBDs");
}
/*
* Allocate the same number of BDs just freed
*/
Status = XLlDma_BdRingAlloc(TxRingPtr, NumBd, &BdPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error allocating TxBDs");
return XST_FAILURE;
}
/*
* Setup the TxBDs
*/
BdCurPtr = BdPtr;
for (Index = 0; Index < NumBd; Index++) {
XLlDma_mBdSetBufAddr(BdCurPtr, &TxFrame);
XLlDma_mBdSetLength(BdCurPtr, TxFrameLength);
XLlDma_mBdSetStsCtrl(BdCurPtr,
XLLDMA_BD_STSCTRL_SOP_MASK
|
XLLDMA_BD_STSCTRL_EOP_MASK);
BdCurPtr =
XLlDma_mBdRingNext(TxRingPtr, BdCurPtr);
}
/*
* Enqueue TxBDs to HW
*/
Status = XLlDma_BdRingToHw(TxRingPtr, NumBd, BdPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap
("Error committing TxBDs prior to starting");
return XST_FAILURE;
}
}
/*
* Re-enable the interrupts
*/
FramesTx = 0;
XLlDma_mBdRingIntEnable(TxRingPtr, XLLDMA_CR_IRQ_ALL_EN_MASK);
}
/*
* Wait a second and collect any remaining frames that had been
* queued up but not post processed
*/
#ifndef __MICROBLAZE__
usleep(1000000);
#else
/*
* Not sure if we should depend on there being a timer core in a
* microblaze system
*/
TemacUtilPhyDelay(1);
#endif
NumBd = XLlDma_BdRingFromHw(TxRingPtr, 0xFFFFFFFF, &BdPtr);
if (NumBd > 0) {
Status = XLlDma_BdRingFree(TxRingPtr, NumBd, BdPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error freeing TxBDs");
}
}
/*
* Done sending frames. Stop the device
*/
XLlTemac_Stop(TemacInstancePtr);
return XST_SUCCESS;
}
/**
*
* This function demonstrates the usage usage of the TEMAC by sending by sending
* and receiving frames in interrupt driven SGDMA mode.
*
*
* @param IntcInstancePtr is a pointer to the instance of the Intc component.
* @param TemacInstancePtr is a pointer to the instance of the Temac
* component.
* @param TemacDeviceId is Device ID of the Temac Device , typically
* XPAR_<TEMAC_instance>_DEVICE_ID value from xparameters.h.
* @param TemacIntrId is the Interrupt ID and is typically
* XPAR_<INTC_instance>_<TEMAC_instance>_IP2INTC_IRPT_INTR
* value from xparameters.h.
*
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
*
* @note None.
*
******************************************************************************/
int TemacSgDmaIntrExample(XIntc * IntcInstancePtr,
XLlTemac * TemacInstancePtr,
XLlDma * DmaInstancePtr,
u16 TemacDeviceId,
u16 TemacIntrId, u16 DmaRxIntrId, u16 DmaTxIntrId)
{
int Status;
u32 Rdy;
int dma_mode;
XLlTemac_Config *MacCfgPtr;
XLlDma_BdRing *RxRingPtr = &XLlDma_GetRxRing(DmaInstancePtr);
XLlDma_BdRing *TxRingPtr = &XLlDma_GetTxRing(DmaInstancePtr);
XLlDma_Bd BdTemplate;
/*************************************/
/* Setup device for first-time usage */
/*************************************/
/*
* Initialize instance. Should be configured for SGDMA
*/
MacCfgPtr = XLlTemac_LookupConfig(TemacDeviceId);
Status = XLlTemac_CfgInitialize(TemacInstancePtr, MacCfgPtr,
MacCfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error in initialize");
return XST_FAILURE;
}
XLlDma_Initialize(DmaInstancePtr, TemacInstancePtr->Config.LLDevBaseAddress);
/*
* Check whether the IPIF interface is correct for this example
*/
dma_mode = XLlTemac_IsDma(TemacInstancePtr);
if (! dma_mode) {
TemacUtilErrorTrap
("Device HW not configured for SGDMA mode\r\n");
return XST_FAILURE;
}
/*
* Set the MAC address
*/
Status = XLlTemac_SetMacAddress(TemacInstancePtr, TemacMAC);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting MAC address");
return XST_FAILURE;
}
/*
* Setup RxBD space.
*
* We have already defined a properly aligned area of memory to store RxBDs
* at the beginning of this source code file so just pass its address into
* the function. No MMU is being used so the physical and virtual addresses
* are the same.
*
* Setup a BD template for the Rx channel. This template will be copied to
* every RxBD. We will not have to explicitly set these again.
*/
XLlDma_BdClear(&BdTemplate);
/*
* Create the RxBD ring
*/
Status = XLlDma_BdRingCreate(RxRingPtr, (u32) &RxBdSpace,
(u32) &RxBdSpace, BD_ALIGNMENT, RXBD_CNT);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting up RxBD space");
return XST_FAILURE;
}
Status = XLlDma_BdRingClone(RxRingPtr, &BdTemplate);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error initializing RxBD space");
return XST_FAILURE;
}
/*
* Setup TxBD space.
*
* Like RxBD space, we have already defined a properly aligned area of
* memory to use.
*/
/*
* Create the TxBD ring
*/
Status = XLlDma_BdRingCreate(TxRingPtr, (u32) &TxBdSpace,
(u32) &TxBdSpace, BD_ALIGNMENT, TXBD_CNT);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting up TxBD space");
return XST_FAILURE;
}
/*
* We reuse the bd template, as the same one will work for both rx and tx.
*/
Status = XLlDma_BdRingClone(TxRingPtr, &BdTemplate);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error initializing TxBD space");
return XST_FAILURE;
}
/* Make sure the hard temac is ready */
Rdy = XLlTemac_ReadReg(TemacInstancePtr->Config.BaseAddress,
XTE_RDY_OFFSET);
while ((Rdy & XTE_RDY_HARD_ACS_RDY_MASK) == 0) {
Rdy = XLlTemac_ReadReg(TemacInstancePtr->Config.BaseAddress,
XTE_RDY_OFFSET);
}
#if !SIM
/*
* Set PHY to loopback
*/
TemacUtilEnterLoopback(TemacInstancePtr, TEMAC_LOOPBACK_SPEED);
/*
* Set PHY<-->MAC data clock
*/
XLlTemac_SetOperatingSpeed(TemacInstancePtr, TEMAC_LOOPBACK_SPEED);
/*
* Setting the operating speed of the MAC needs a delay. There
* doesn't seem to be register to poll, so please consider this
* during your application design.
*/
TemacUtilPhyDelay(2);
#endif
/*
* Connect to the interrupt controller and enable interrupts
*/
Status = TemacSetupIntrSystem(IntcInstancePtr,
TemacInstancePtr,
DmaInstancePtr,
TemacIntrId, DmaRxIntrId, DmaTxIntrId);
/****************************/
/* Run through the examples */
/****************************/
/*
* Run the Temac SGDMA Single Frame Interrupt example
*/
Status = TemacSgDmaIntrSingleFrameExample(TemacInstancePtr,
DmaInstancePtr);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Disable the interrupts for the Temac device
*/
TemacDisableIntrSystem(IntcInstancePtr, TemacIntrId, DmaRxIntrId,
DmaTxIntrId);
/*
* Stop the device
*/
XLlTemac_Stop(TemacInstancePtr);
return XST_SUCCESS;
}
/**
*
* This function demonstrates the usage of the TEMAC by sending and receiving
* frames in polled mode.
*
*
* @param TemacDeviceId is device ID of the Temac Device , typically
* XPAR_<TEMAC_instance>_DEVICE_ID value from xparameters.h
*
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE
*
* @note None.
*
******************************************************************************/
int TemacPolledExample(u16 TemacDeviceId, u16 FifoDeviceId)
{
int Status;
XLlTemac_Config *MacCfgPtr;
u32 Rdy;
int LoopbackSpeed;
/*************************************/
/* Setup device for first-time usage */
/*************************************/
/*
* Initialize the FIFO and TEMAC instance
*/
MacCfgPtr = XLlTemac_LookupConfig(TemacDeviceId);
Status = XLlTemac_CfgInitialize(&TemacInstance, MacCfgPtr,
MacCfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error in initialize");
return XST_FAILURE;
}
XLlFifo_Initialize(&FifoInstance,
XLlTemac_LlDevBaseAddress(&TemacInstance));
/*
* Check whether the IPIF interface is correct for this example
*/
if (!XLlTemac_IsFifo(&TemacInstance)) {
TemacUtilErrorTrap
("Device HW not configured for FIFO direct mode\r\n");
return XST_FAILURE;
}
/*
* Set the MAC address
*/
Status = XLlTemac_SetMacAddress(&TemacInstance, (u8 *) TemacMAC);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting MAC address");
return XST_FAILURE;
}
/* Make sure the hard temac is ready */
Rdy = XLlTemac_ReadReg(TemacInstance.Config.BaseAddress,
XTE_RDY_OFFSET);
while ((Rdy & XTE_RDY_HARD_ACS_RDY_MASK) == 0) {
Rdy = XLlTemac_ReadReg(TemacInstance.Config.BaseAddress,
XTE_RDY_OFFSET);
}
/*
* Set PHY to loopback, speed depends on phy type.
* MII is 100 and all others are 1000.
*/
if (XLlTemac_GetPhysicalInterface(&TemacInstance) == XTE_PHY_TYPE_MII)
{
LoopbackSpeed = TEMAC_LOOPBACK_SPEED;
} else {
LoopbackSpeed = TEMAC_LOOPBACK_SPEED_1G;
}
Status = TemacUtilEnterLoopback(&TemacInstance, LoopbackSpeed);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error setting the PHY loopback");
return XST_FAILURE;
}
/*
* Set PHY<-->MAC data clock
*/
XLlTemac_SetOperatingSpeed(&TemacInstance, (u16)LoopbackSpeed);
/*
* Setting the operating speed of the MAC needs a delay. There
* doesn't seem to be register to poll, so please consider this
* during your application design.
*/
TemacUtilPhyDelay(2);
/****************************/
/* Run through the examples */
/****************************/
/*
* Run the Single Frame polled example
*/
Status = TemacSingleFramePolledExample();
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Run the Multiple Frames polled example
*/
Status = TemacMultipleFramesPolledExample();
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
return XST_SUCCESS;
}
