/********************************************************************************
* TODO check if the DSP should be powered down after every test
*/
static void coldStartup(Tfa98xx_handle_t handle)
{
Tfa98xx_Error_t err;
unsigned short status;
/* load the optimal TFA9887 in HW settings */
err = Tfa98xx_Init(handle);
assert(err == Tfa98xx_Error_Ok);
err = Tfa98xx_SetSampleRate(handle, 44100);
assert(err == Tfa98xx_Error_Ok);
err = Tfa98xx_Powerdown(handle, 0);
assert(err == Tfa98xx_Error_Ok);
}
static void coldStartup(Tfa98xx_handle_t handle)
{
enum Tfa98xx_Error err;
unsigned short status;
int ready = 0;
int timeout;
unsigned short dcdcRead = 0;
unsigned short dcdcBoost = 0;
/* load the optimal TFA98xx in HW settings */
err = Tfa98xx_Init(handle);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_Init failed %d\n", __func__, err);
return;
}
/* NXP SL: Sample rate should be set before power up */
/* Set sample rate to example 48000*/
err = Tfa98xx_SetSampleRate(handle, SAMPLE_RATE);
if (err != Tfa98xx_Error_Ok)
pr_err("%s: Tfa98xx_SetSampleRate failed %d\n", __func__, err);
/* Power On the device by setting bit 0 to 0 of register 9*/
err = Tfa98xx_Powerdown(handle, 0);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_Powerdown failed %d\n", __func__, err);
return;
}
/* set Max boost coil current 1.92 A */
err = Tfa98xx_ReadRegister16(handle, TFA98XX_DCDCBOOST, &dcdcRead);
dcdcRead &= ~(TFA98XX_DCDCBOOST_DCMCC_MSK);
dcdcRead |= (3 << TFA98XX_DCDCBOOST_DCMCC_POS);
err = Tfa98xx_WriteRegister16(handle, TFA98XX_DCDCBOOST, dcdcRead);
/* set Max boost voltage 7.5 V */
err = Tfa98xx_ReadRegister16(handle, TFA98XX_DCDCBOOST, &dcdcBoost);
dcdcBoost &= ~(TFA98XX_DCDCBOOST_DCVO_MSK);
dcdcBoost |= 3;
err = Tfa98xx_WriteRegister16(handle, TFA98XX_DCDCBOOST, dcdcBoost);
/* Check the PLL is powered up from status register 0*/
err = Tfa98xx_ReadRegister16(handle, TFA98XX_STATUSREG, &status);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_ReadRegister16 failed %d\n",
__func__, err);
return;
}
timeout = 0;
while ((status & TFA98XX_STATUSREG_AREFS_MSK) == 0) {
/* not ok yet */
err = Tfa98xx_ReadRegister16(handle, TFA98XX_STATUSREG,
&status);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_ReadRegister16 failed %d\n",
__func__, err);
return;
}
msleep(20);
timeout++;
if (timeout > 50) {
pr_info("%s timeout status:%x\n", __func__, status);
break;
}
}
/* powered on
* - now it is allowed to access DSP specifics
* - stall DSP by setting reset
* */
err = Tfa98xx_DspReset(handle, 1);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_DspReset failed %d\n", __func__, err);
return;
}
/* wait until the DSP subsystem hardware is ready
* note that the DSP CPU is not running yet (RST=1)
* */
timeout = 0;
while (ready == 0) {
/* are we ready? */
err = Tfa98xx_DspSystemStable(handle, &ready);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_DspSystemStable failed %d\n",
__func__, err);
return;
}
msleep(20);
timeout++;
if (timeout > 50) {
pr_info("%s timeout ready:%d\n", __func__, ready);
break;
}
}
/* Load cold-boot patch for the first time to force cold start-up.
* use the patchload only to write the internal register
* */
dspPatch(handle, &patch_data[PATCH_COLDBOOT]);
err = Tfa98xx_ReadRegister16(handle, TFA98XX_STATUSREG, &status);
if (err != Tfa98xx_Error_Ok) {
pr_err("%s: Tfa98xx_ReadRegister16 failed %d\n",
__func__, err);
return;
}
if ((status & TFA98XX_STATUSREG_ACS_MSK) == 0) {
pr_err("%s: status & TFA98XX_STATUSREG_ACS_MSK == 0\n",
__func__);
return;
}
/* cold boot, need to load all parameters and patches */
/* patch the ROM code */
dspPatch(handle, &patch_data[PATCH_DSP]);
}
