/*******************************************************************************
* Function Name: UART_1_SpiUartWriteTxData
****************************************************************************//**
*
* Places a data entry into the transmit buffer to be sent at the next available
* bus time.
* This function is blocking and waits until there is space available to put the
* requested data in the transmit buffer.
*
* \param txDataByte: the data to be transmitted.
* The amount of data bits to be transmitted depends on TX data bits selection
* (the data bit counting starts from LSB of txDataByte).
*
* \globalvars
* UART_1_txBufferHead - the start index to put data into the
* software transmit buffer.
* UART_1_txBufferTail - start index to get data from the software
* transmit buffer.
*
*******************************************************************************/
void UART_1_SpiUartWriteTxData(uint32 txData)
{
#if (UART_1_INTERNAL_TX_SW_BUFFER_CONST)
uint32 locHead;
#endif /* (UART_1_INTERNAL_TX_SW_BUFFER_CONST) */
#if (UART_1_CHECK_TX_SW_BUFFER)
{
/* Put data directly into the TX FIFO */
if ((UART_1_txBufferHead == UART_1_txBufferTail) &&
(UART_1_SPI_UART_FIFO_SIZE != UART_1_GET_TX_FIFO_ENTRIES))
{
/* TX software buffer is empty: put data directly in TX FIFO */
UART_1_TX_FIFO_WR_REG = txData;
}
/* Put data into TX software buffer */
else
{
/* Head index to put data */
locHead = (UART_1_txBufferHead + 1u);
/* Adjust TX software buffer index */
if (UART_1_TX_BUFFER_SIZE == locHead)
{
locHead = 0u;
}
/* Wait for space in TX software buffer */
while (locHead == UART_1_txBufferTail)
{
}
/* TX software buffer has at least one room */
/* Clear old status of INTR_TX_NOT_FULL. It sets at the end of transfer when TX FIFO is empty. */
UART_1_ClearTxInterruptSource(UART_1_INTR_TX_NOT_FULL);
UART_1_PutWordInTxBuffer(locHead, txData);
UART_1_txBufferHead = locHead;
/* Check if TX Not Full is disabled in interrupt */
if (0u == (UART_1_INTR_TX_MASK_REG & UART_1_INTR_TX_NOT_FULL))
{
/* Enable TX Not Full interrupt source to transmit from software buffer */
UART_1_INTR_TX_MASK_REG |= (uint32) UART_1_INTR_TX_NOT_FULL;
}
}
}
#else
{
/* Wait until TX FIFO has space to put data element */
while (UART_1_SPI_UART_FIFO_SIZE == UART_1_GET_TX_FIFO_ENTRIES)
{
}
UART_1_TX_FIFO_WR_REG = txData;
}
#endif
}
/*******************************************************************************
* Function Name: UART_1_SpiUartWriteTxData
********************************************************************************
*
* Summary:
* Places a data entry into the transmit buffer to be sent at the next available
* bus time.
* This function is blocking and waits until there is space available to put the
* requested data in the transmit buffer.
*
* Parameters:
* txDataByte: the data to be transmitted.
*
* Return:
* None
*
*******************************************************************************/
void UART_1_SpiUartWriteTxData(uint32 txData)
{
#if(UART_1_INTERNAL_TX_SW_BUFFER_CONST)
uint32 locHead;
uint32 intSourceMask;
#endif /* (UART_1_INTERNAL_TX_SW_BUFFER_CONST) */
#if(UART_1_CHECK_TX_SW_BUFFER)
{
/* Head index to put data */
locHead = (UART_1_txBufferHead + 1u);
/* Adjust TX software buffer index */
if(UART_1_TX_BUFFER_SIZE == locHead)
{
locHead = 0u;
}
while(locHead == UART_1_txBufferTail)
{
/* Wait for space in TX software buffer */
}
/* TX software buffer has at least one room */
if((UART_1_txBufferHead == UART_1_txBufferTail) &&
(UART_1_FIFO_SIZE != UART_1_GET_TX_FIFO_ENTRIES))
{
/* TX software buffer is empty: put data directly in TX FIFO */
UART_1_TX_FIFO_WR_REG = txData;
}
/* Put data in TX software buffer */
else
{
/* Clear old status of INTR_TX_NOT_FULL. It sets at the end of transfer when TX FIFO is empty. */
UART_1_ClearTxInterruptSource(UART_1_INTR_TX_NOT_FULL);
UART_1_PutWordInTxBuffer(locHead, txData);
UART_1_txBufferHead = locHead;
/* Enable interrupt to transmit */
intSourceMask = UART_1_INTR_TX_NOT_FULL;
intSourceMask |= UART_1_GetTxInterruptMode();
UART_1_SpiUartEnableIntTx(intSourceMask);
}
}
#else
{
while(UART_1_FIFO_SIZE == UART_1_GET_TX_FIFO_ENTRIES)
{
/* Block while TX FIFO is FULL */
}
UART_1_TX_FIFO_WR_REG = txData;
}
#endif
}
/*******************************************************************************
* Function Name: UART_1_SpiUartClearTxBuffer
****************************************************************************//**
*
* Clears the transmit buffer and TX FIFO.
*
* \globalvars
* UART_1_txBufferHead - the start index to put data into the
* software transmit buffer.
* UART_1_txBufferTail - start index to get data from the software
* transmit buffer.
*
*******************************************************************************/
void UART_1_SpiUartClearTxBuffer(void)
{
#if (UART_1_CHECK_TX_SW_BUFFER)
{
/* Lock from component interruption */
UART_1_DisableInt();
/* Flush TX software buffer */
UART_1_txBufferHead = UART_1_txBufferTail;
UART_1_INTR_TX_MASK_REG &= (uint32) ~UART_1_INTR_TX_NOT_FULL;
UART_1_CLEAR_TX_FIFO;
UART_1_ClearTxInterruptSource(UART_1_INTR_TX_ALL);
/* Release lock */
UART_1_EnableInt();
}
#else
{
UART_1_CLEAR_TX_FIFO;
}
#endif
}
