void
putDebugChar(unsigned char c)
{
while ((*UART_REG(ULSR) & ULSR_THRE) == 0);
*UART_REG(UTHR) = c;
}
void
putDebugChar(unsigned char c)
{
while (!(*UART_REG(USR1) & BIT(UART_SR1_TRDY)));
*UART_REG(UTXD) = c;
}
void
handle_reset_on_serial(void){
static char* reset_code_ptr = "reset";
while(*UART_REG(USR2) & BIT(UART_SR2_RXFIFO_RDR)){
/* We have a character */
char c = *UART_REG(URXD);
/* set to clear interrupt flag */
*UART_REG(USR1) = UART_SR1_RRDY;
if(c == *reset_code_ptr){
reset_code_ptr++;
if(*reset_code_ptr == '\0'){
/* sequence found */
volatile uint32_t *src_reg = (volatile uint32_t*)SRC_PPTR;
volatile uint16_t *wdt_reg = (volatile uint16_t*)WATCHDOG_PPTR;
printf("\n\nTrying to restart\n");
src_reg[0] &= (~ (BIT(22) | BIT(23) | BIT(24)));
src_reg[8] = 0;
wdt_reg[0] = BIT(2);
wdt_reg[0] = BIT(2);
while(1);
}
}else{
reset_code_ptr = "reset";
}
}
}
//------------------------------------------------------------------------------
// Handle uart interrupt
//------------------------------------------------------------------------------
static void uart_handler(uint8_t module)
{
uint16_t events = 0;
uint32_t module_offset = module * UART_MODULE_OFFSET;
if(UART_REG(module_offset, UART_MIS) & 0x10) events |= IO_EVENT_READ;
if(UART_REG(module_offset, UART_MIS) & 0x20) events |= IO_EVENT_WRITE;
//----------------------------------------------------------------------------
// No known events but we have still been called. Check if we got a DMA
// interrupt
//----------------------------------------------------------------------------
if(!events) {
uint8_t channel_rx = uart_info[module].dma_channel_rx;
uint8_t channel_tx = uart_info[module].dma_channel_tx;
uint8_t enc = uart_info[module].dma_channel_enc;
if(TM4C_dma_check_interrupt(channel_rx, enc))
events |= IO_EVENT_DMA_READ;
if(TM4C_dma_check_interrupt(channel_tx, enc))
events |= IO_EVENT_DMA_WRITE;
}
//----------------------------------------------------------------------------
// Call the user handler
//----------------------------------------------------------------------------
if(uart_devices[module] && uart_devices[module]->event)
uart_devices[module]->event(uart_devices[module], events);
}
int uart_getchar_nb(uint8_t uart, uint8_t *ch)
{
uint8_t lsr;
lsr = readb(UART_REG(uart, LSR));
/* something strange happened */
if (lsr & 0x02)
printf("LSR RX_OE\n");
if (lsr & 0x04)
printf("LSR RX_PE\n");
if (lsr & 0x08)
printf("LSR RX_FE\n");
if (lsr & 0x10)
printf("LSR RX_BI\n");
if (lsr & 0x80)
printf("LSR RX_FIFO_STS\n");
/* is the Rx FIFO empty? */
if (!(lsr & 0x01))
return 0;
*ch = readb(UART_REG(uart, RHR));
//printf("getchar_nb(%u) = %02x\n", uart, *ch);
return 1;
}
//------------------------------------------------------------------------------
// Disable events on UART device
//------------------------------------------------------------------------------
int32_t TM4C_uart_event_disable(IO_io *io, uint16_t events)
{
uint32_t uart_offset = io->channel*UART_MODULE_OFFSET;
if(events & IO_EVENT_READ) UART_REG(uart_offset, UART_IM) &= ~0x10;
if(events & IO_EVENT_WRITE) UART_REG(uart_offset, UART_IM) &= ~0x20;
return 0;
}
unsigned char
getDebugChar(void)
{
while (!(*UART_REG(USR1) & BIT(UART_SR1_RRDY)));
return *UART_REG(URXD);
}
void uart_putchar_wait(uint8_t uart, int c)
{
/* wait while TX FIFO indicates full */
while (readb(UART_REG(uart, SSR)) & 0x01) { }
/* put character in TX FIFO */
writeb(c, UART_REG(uart, THR));
}
void
putDebugChar(unsigned char c)
{
while ( (*UART_REG(USR) & USR_TXEMP) == 0 );
/* Tell the peripheral how many characters to send */
*UART_REG(UNTX) = 1;
/* Write the character into the FIFO */
*UART_REG(UTF) = c & 0xff;
}
unsigned char
getDebugChar(void)
{
if ( (*UART_REG(UTRSTAT) & RXBUF_READY)) {
return (unsigned char) * UART_REG(URXH);
} else {
return -1;
}
}
static void uart_set_lcr_bf(int uart, int on)
{
if (on) {
old_lcr = readb(UART_REG(uart, LCR));
writeb(0xBF, UART_REG(uart, LCR));
} else {
writeb(old_lcr, UART_REG(uart, LCR));
}
}
int uart_putchar_nb(uint8_t uart, int c)
{
/* if TX FIFO indicates full, abort */
if (readb(UART_REG(uart, SSR)) & 0x01)
return 0;
writeb(c, UART_REG(uart, THR));
return 1;
}
void
omap3_uart_putchar(char c)
{
while ((*UART_REG(ULSR) & ULSR_THRE) == 0);
*UART_REG(UTHR) = c;
if (c == '\n') {
omap3_uart_putchar('\r');
}
}
void
hikey_uart_putchar(char c)
{
while ((*UART_REG(UARTFR) & PL011_UARTFR_TXFF) != 0);
*UART_REG(UARTDR) = c;
if (c == '\n') {
hikey_uart_putchar('\r');
}
}
/* enable or disable the divisor latch for access to DLL, DLH */
static void uart_set_lcr7bit(int uart, int on)
{
uint8_t reg;
reg = readb(UART_REG(uart, LCR));
if (on)
reg |= (1 << 7);
else
reg &= ~(1 << 7);
writeb(reg, UART_REG(uart, LCR));
}
/* Enable or disable the TCR_TLR latch bit in MCR[6] */
static void uart_set_mcr6bit(int uart, int on)
{
uint8_t mcr;
/* we assume EFR[4] is always set to 1 */
mcr = readb(UART_REG(uart, MCR));
if (on)
mcr |= (1 << 6);
else
mcr &= ~(1 << 6);
writeb(mcr, UART_REG(uart, MCR));
}
void
__plat_putchar(int c)
{
/* Wait for serial to become ready. */
while (!(*UART_REG(USR1) & BIT(UART_SR1_TRDY)));
/* Write out the next character. */
*UART_REG(UTXD) = c;
if (c == '\n') {
__plat_putchar('\r');
}
}
int
__fputc(int c, FILE *stream)
{
/* Wait until UART ready for the next character. */
while ( !(*UART_REG(UTRSTAT) & TXBUF_EMPTY) );
/* Put in the register to be sent*/
*UART_REG(UTXH) = (c & 0xff);
/* Send '\r' after every '\n'. */
if (c == '\n') {
(void)__fputc('\r', stream);
}
return 0;
}
static void uart_reg_write(int uart, enum uart_reg reg, uint8_t val)
{
if (reg & LCRBFBIT)
{
uart_set_lcr_bf(uart, 1);
}
else if (reg & LCR7BIT)
{
uart_set_lcr7bit(uart, 1);
}
else if (reg & MCR6BIT)
{
uart_set_mcr6bit(uart, 1);
}
writeb(val, UART_REG(uart, REG_OFFS(reg)));
if (reg & LCRBFBIT)
{
uart_set_lcr_bf(uart, 0);
}
else if (reg & LCR7BIT)
{
uart_set_lcr7bit(uart, 0);
}
else if (reg & MCR6BIT)
{
uart_set_mcr6bit(uart, 0);
}
}
int uart_tx_busy(uint8_t uart)
{
/* Check THRE bit (LSR[5]) to see if FIFO is full */
if (~readb(UART_REG(uart, LSR)) & 0x20)
return 1;
return 0;
}
static uint8_t uart_reg_read(int uart, enum uart_reg reg)
{
uint8_t ret;
if (reg & LCRBFBIT)
{
uart_set_lcr_bf(uart, 1);
}
else if (reg & LCR7BIT)
{
uart_set_lcr7bit(uart, 1);
}
else if (reg & MCR6BIT)
{
uart_set_mcr6bit(uart, 1);
}
ret = readb(UART_REG(uart, REG_OFFS(reg)));
if (reg & LCRBFBIT)
{
uart_set_lcr_bf(uart, 0);
}
else if (reg & LCR7BIT)
{
uart_set_lcr7bit(uart, 0);
}
else if (reg & MCR6BIT)
{
uart_set_mcr6bit(uart, 0);
}
return ret;
}
int
__fputc(int c, FILE *stream)
{
/* Wait until UART ready for the next character. */
while ((*UART_REG(ULSR) & ULSR_THRE) == 0);
/* Add character to the buffer. */
*UART_REG(UTHR) = c;
/* Send '\r' after every '\n'. */
if (c == '\n') {
(void)__fputc('\r', stream);
}
return 0;
}
//------------------------------------------------------------------------------
// Sync uart
//------------------------------------------------------------------------------
static int32_t uart_sync(IO_io *io)
{
uint32_t uart_offset = io->channel*UART_MODULE_OFFSET;
// the UART busy bit is set until all complete bytes, including the stop bits
// have been transmitted
while(UART_REG(uart_offset, UART_FR) & 0x08);
return 0;
}
//------------------------------------------------------------------------------
// Read from given UART
//------------------------------------------------------------------------------
static int32_t uart_read_normal(IO_io *io, void *data, uint32_t length)
{
uint32_t uart_offset = io->channel*UART_MODULE_OFFSET;
uint8_t *b_data = data;
for(uint32_t i = 0; i < length; ++i) {
// we cannot read if RXFE is 1
if(io->flags & IO_NONBLOCKING) {
if((UART_REG(uart_offset, UART_FR) & 0x10) != 0) {
if(i == 0) return -IO_EWOULDBLOCK;
else return i;
}
}
else
while((UART_REG(uart_offset, UART_FR) & 0x10) != 0);
b_data[i] = UART_REG(uart_offset, UART_DR) & 0xff;
}
return length;
}
int uart_tx_busy(uint8_t uart)
{
if (readb(UART_REG(uart, SSR)) & 0x01)
{
return 1;
}
return 0;
}
//------------------------------------------------------------------------------
// Write to given UART
//------------------------------------------------------------------------------
static int32_t uart_write_normal(IO_io *io, const void *data, uint32_t length)
{
uint32_t uart_offset = io->channel*UART_MODULE_OFFSET;
const uint8_t *b_data = data;
for(uint32_t i = 0; i < length; ++i) {
// we cannot write if TXFF is 1
if(io->flags & IO_NONBLOCKING) {
if((UART_REG(uart_offset, UART_FR) & 0x20) != 0) {
if(i == 0) return -IO_EWOULDBLOCK;
else return i;
}
}
else
while((UART_REG(uart_offset, UART_FR) & 0x20) != 0);
UART_REG(uart_offset, UART_DR) = b_data[i];
}
return length;
}
int uart_getchar_nb(uint8_t uart, uint8_t *ch)
{
uint8_t lsr;
lsr = readb(UART_REG(uart, LSR));
/* something strange happened */
if (lsr & 0x02)
{
printf("LSR RX_OE\n");
}
if (lsr & 0x04)
{
printf("LSR RX_PE\n");
}
if (lsr & 0x08)
{
printf("LSR RX_FE\n");
}
if (lsr & 0x10)
{
printf("LSR RX_BI\n");
}
if (lsr & 0x80)
{
printf("LSR RX_FIFO_STS\n");
}
/* is the Rx FIFO empty? */
if (!(lsr & 0x01))
{
return 0;
}
*ch = readb(UART_REG(uart, RHR));
return 1;
}
static void __init init_port(void)
{
unsigned int divisor;
BDEV_WR(UART_REG(UART_LCR), 0x3); /* 8n1 */
BDEV_WR(UART_REG(UART_IER), 0); /* no interrupt */
BDEV_WR(UART_REG(UART_FCR), 0); /* no fifo */
BDEV_WR(UART_REG(UART_MCR), 0x3); /* DTR + RTS */
BDEV_SET(UART_REG(UART_LCR), UART_LCR_DLAB);
#if defined(CONFIG_BRCM_IKOS)
/* Reverse-engineer brcm_base_baud0 from the bootloader's setting */
divisor = (BDEV_RD(UART_REG(UART_DLM)) << 8) |
BDEV_RD(UART_REG(UART_DLL));
brcm_base_baud0 = divisor * BAUD;
#endif
divisor = (brcm_base_baud0 + BAUD/2) / BAUD;
BDEV_WR(UART_REG(UART_DLL), divisor & 0xff);
BDEV_WR(UART_REG(UART_DLM), (divisor >> 8) & 0xff);
BDEV_UNSET(UART_REG(UART_LCR), UART_LCR_DLAB);
}
int uart_baudrate(uint8_t uart, enum uart_baudrate bdrt)
{
uint16_t div;
if (bdrt >= ARRAY_SIZE(divider))
return -1;
div = divider[bdrt];
uart_set_lcr7bit(uart, 1);
writeb(div & 0xff, UART_REG(uart, DLL));
writeb(div >> 8, UART_REG(uart, DLH));
uart_set_lcr7bit(uart, 0);
return 0;
}
void sysSerialHwInit (
void
) {
int i;
for (i = 0; i < N_UART_CHANNELS; i++) {
memset(&i8250Chan[i], 0, sizeof(I8250_CHAN));
i8250Chan[i].int_vec = devParams[i].vector;
i8250Chan[i].channelMode = 0x0000;
i8250Chan[i].lcr = UART_REG(UART_LCR, i);
i8250Chan[i].data = UART_REG(UART_RDR, i);
i8250Chan[i].brdl = UART_REG(UART_BRDL, i);
i8250Chan[i].brdh = UART_REG(UART_BRDH, i);
i8250Chan[i].ier = UART_REG(UART_IER, i);
i8250Chan[i].iid = UART_REG(UART_IID, i);
i8250Chan[i].mdc = UART_REG(UART_MDC, i);
i8250Chan[i].lst = UART_REG(UART_LST, i);
i8250Chan[i].msr = UART_REG(UART_MSR, i);
i8250HrdInit(&i8250Chan[i]);
}
}