UCG_C11(0x025, 0x03f), /* set contrast -64 ... 63 */
//UCG_C11(0x03a, 0x003), /* set pixel format to 12 bit per pixel */
UCG_C11(0x03a, 0x005),
//UCG_C10(0x003), /* booster on */
UCG_C10(0x023), /* all pixel on */
UCG_DLY_MS(199),
UCG_C10(0x013), /* normal display on */
UCG_C11( 0x036, 0x000), /* memory control */
UCG_C12( 0x02a, 0x000, 0x07f), /* Horizontal GRAM Address Set */
UCG_C12( 0x02b, 0x000, 0x07f), /* Vertical GRAM Address Set */
UCG_C10( 0x02c), /* Write Data to GRAM */
UCG_DLY_MS(10),
UCG_CS(1), /* disable chip */
UCG_END(), /* end of sequence */
};
static const ucg_pgm_uint8_t ucg_tft_132x132_pcf8833_init_seq[] = {
UCG_CFG_CD(0,1), /* DC=0 for command mode, DC=1 for data and args */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(5),
UCG_RST(0),
UCG_CS(0), /* enable chip */ //UCG_C11(0x0fd, 0x012), /* Unlock normal commands, reset default: unlocked */ UCG_C10(0x0ae), /* Set Display Off */ //UCG_C10(0x0af), /* Set Display On */ UCG_C11(0x0a0, 0x0b2), /* 65k format 2, RGB Mode */ UCG_C11(0x0a1, 0x000), /* Set Display Start Line */ UCG_C11(0x0a2, 0x000), /* Set Display Offset */ UCG_C11(0x0a8, 0x03f), /* Multiplex, reset value = 0x03f */ UCG_C11(0x0ad, 0x08e), /* select supply (must be set before 0x0af) */ UCG_C11(0x0b0, 0x00b), /* Disable power save mode */ UCG_C11(0x0b1, 0x031), /* Set Phase Length, reset default: 0x74 */ UCG_C11(0x0b3, 0x0f0), /* Display Clock Divider/Osc, reset value=0x0d0 */ UCG_C12(0x015, 0x000, 0x05f), /* Set Column Address */ UCG_C12(0x075, 0x000, 0x03f), /* Set Row Address */ UCG_C11(0x081, 0x080), /* contrast red, Adafruit: 0x091, UC9664: 0x080 */ UCG_C11(0x082, 0x080), /* contrast green, Adafruit: 0x050, UC9664: 0x080 */ UCG_C11(0x083, 0x080), /* contrast blue, Adafruit: 0x07d, UC9664: 0x080 */ UCG_C11(0x087, 0x00f), /* master current/contrast 0x00..0x0f UG-9664: 0x0f, Adafruit: 0x06 */ UCG_C11(0x08a, 0x064), /* second precharge speed red */ UCG_C11(0x08b, 0x078), /* second precharge speed green */ UCG_C11(0x08c, 0x064), /* second precharge speed blue */ UCG_C11(0x0bb, 0x03c), /* set shared precharge level, default = 0x03e */ UCG_C11(0x0be, 0x03e), /* voltage select, default = 0x03e */ UCG_C10(0x0b9), /* Reset internal grayscale lookup */ // UCG_C10(0x0b8), /* Set CMD Grayscale Lookup, 63 Bytes follow */ // UCG_A8(0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c),
UCG_C10(0x20), /* not inverted */ //UCG_C10(0x21), /* inverted */ UCG_C11(0x03a, 0x066), /* set pixel format to 18 bit */ //UCG_C11(0x03a, 0x055), /* set pixel format to 16 bit */ //UCG_C12(0x0b1, 0x000, 0x01b), /* frame rate control (POR values) */ UCG_C14(0x0b6, 0x00a, 0x082 | (1<<5), 0x027, 0x000), /* display function control (POR values, except for shift direction bit) */ //UCG_C11(0x0b7, 0x006), /* entry mode, bit 0: Low voltage detection control (0=off) */ UCG_C11(0x0c0, 0x021), /* power control 1 (reference voltage level), POR=21 */ UCG_C11(0x0c1, 0x002), /* power control 2 (step up factor), POR=2 */ UCG_C11(0x0c7, 0x0c0), /* VCOM control 2, enable VCOM control 1 */ UCG_C12(0x0c5, 0x031, 0x03c), /* VCOM control 1, POR=31,3C */ UCG_C15(0x0cb, 0x039, 0x02c, 0x000, 0x034, 0x002), /* power control A (POR values) */ UCG_C13(0x0cf, 0x000, 0x081, 0x030), /* power control B (POR values) */ UCG_C13(0x0e8, 0x084, 0x011, 0x07a), /* timer driving control A (POR values) */ UCG_C12(0x0ea, 0x066, 0x000), /* timer driving control B (POR values) */ //UCG_C12(0x0ea, 0x000, 0x000), /* timer driving control B */ //UCG_C10(0x28), /* display off */ //UCG_C11(0x0bf, 0x003), /* backlight control 8 */ UCG_C10(0x029), /* display on */ //UCG_C11(0x051, 0x07f), /* brightness */ //UCG_C11(0x053, 0x02c), /* control brightness */ //UCG_C10(0x028), /* display off */
#include "ucg.h"
//static const uint8_t ucg_dev_ssd1351_128x128_init_seq[] PROGMEM = {
static const ucg_pgm_uint8_t ucg_tft_240x320_ili9325_spi_init_seq[] = {
UCG_CFG_CD(0,1), /* DC=0 for command mode, DC=1 for data and args */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(5),
UCG_RST(0),
UCG_DLY_MS(5),
UCG_RST(1),
UCG_DLY_MS(50),
UCG_CS(0), /* enable chip */
UCG_DLY_MS(1), /* delay 1 ms */
UCG_C12(0x001,0x001, 0x000), /* Driver Output Control, bits 8 & 10 */
UCG_C12(0x002, 0x007, 0x000), /* LCD Driving Wave Control, bit 9: Set line inversion */
//UCG_C12(0x003, 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1 (16 bit transfer, 65K Mode)*/
UCG_C12(0x003, 0xc0 | 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1, set TRI (Bit 15) and DFM (Bit 14) --> three byte transfer */
//UCG_C12(0x004, 0x000, 0x000), /* Resize register, all 0: no resize */
UCG_C12(0x008, 0x002, 0x007), /* Display Control 2: set the back porch and front porch */
//UCG_C12(0x009, 0x000, 0x000), /* Display Control 3: normal scan */
//UCG_C12(0x00a, 0x000, 0x000), /* Display Control 4: set to "no FMARK output" */
UCG_C12(0x00c, 0x000, 0x000), /* RGB Display Interface Control 1, RIM=10 (3x6 Bit), 12 Jan 14: RIM=00 */
//UCG_C12(0x00d, 0x000, 0x000), /* Frame Maker Position */
//UCG_C12(0x00f, 0x000, 0x000), /* RGB Display Interface Control 2 */
UCG_C12(0x010, 0x000, 0x000), /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB, actual setting is done below */
UCG_C12(0x011, 0x000, 0x007), /* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
UCG_C12(0x012, 0x000, 0x000), /* Power Control 3: VREG1OUT voltage */
UCG_C12(0x013, 0x000, 0x000), /* Power Control 4: VDV[4:0] for VCOM amplitude */
//UCG_C12(0x007, 0x000, 0x001), /* Display Control 1: Operate, but do not display */
