Example #1
0
//--------------------------------------------------------------
USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE * pdev)
{
    USB_OTG_STS status = USB_OTG_OK;
    USB_OTG_GUSBCFG_TypeDef usbcfg;
    USB_OTG_GCCFG_TypeDef gccfg;
    USB_OTG_GI2CCTL_TypeDef i2cctl;
    USB_OTG_GAHBCFG_TypeDef ahbcfg;

    usbcfg.d32 = 0;
    gccfg.d32 = 0;
    ahbcfg.d32 = 0;



    if (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY) {
        gccfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GCCFG);
        gccfg.b.pwdn = 0;

        if (pdev->cfg.Sof_output) {
            gccfg.b.sofouten = 1;
        }
        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GCCFG, gccfg.d32);

        /* Init The ULPI Interface */
        usbcfg.d32 = 0;
        usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);

        usbcfg.b.physel = 0;    /* HS Interface */

        usbcfg.b.term_sel_dl_pulse = 0; /* Data line pulsing using utmi_txvalid */
        usbcfg.b.ulpi_utmi_sel = 1;     /* ULPI seleInterfacect */

        usbcfg.b.phyif = 0;     /* 8 bits */
        usbcfg.b.ddrsel = 0;    /* single data rate */

        usbcfg.b.ulpi_fsls = 0;
        usbcfg.b.ulpi_clk_sus_m = 0;
        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);

        /* Reset after a PHY select  */
        USB_OTG_CoreReset(pdev);

        if (pdev->cfg.dma_enable == 1) {

            ahbcfg.b.hburstlen = 5;     /* 64 x 32-bits */
            ahbcfg.b.dmaenable = 1;
            USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);

        }
    } else {                    /* FS interface (embedded Phy or I2C Phy) */


        usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);;
        usbcfg.b.physel = 1;    /* FS Interface */
        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
        /* Reset after a PHY select and set Host mode */
        USB_OTG_CoreReset(pdev);
        /* Enable the I2C interface and deactivate the power down */
        gccfg.d32 = 0;
        gccfg.b.pwdn = 1;

        if (pdev->cfg.phy_itface == USB_OTG_I2C_PHY) {
            gccfg.b.i2cifen = 1;
        }
        gccfg.b.vbussensingA = 1;
        gccfg.b.vbussensingB = 1;

        if (pdev->cfg.Sof_output) {
            gccfg.b.sofouten = 1;
        }

        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GCCFG, gccfg.d32);
        USB_OTG_BSP_mDelay(20);
        /* Program GUSBCFG.OtgUtmifsSel to I2C */
        usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);

        if (pdev->cfg.phy_itface == USB_OTG_I2C_PHY) {
            usbcfg.b.otgutmifssel = 1;
        }

        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);

        if (pdev->cfg.phy_itface == USB_OTG_I2C_PHY) {
            /*Program GI2CCTL.I2CEn */
            i2cctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GI2CCTL);
            i2cctl.b.i2cdevaddr = 1;
            i2cctl.b.i2cen = 0;
            i2cctl.b.dat_se0 = 1;
            i2cctl.b.addr = 0x2D;
            USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GI2CCTL, i2cctl.d32);

            USB_OTG_BSP_mDelay(200);

            i2cctl.b.i2cen = 1;
            USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GI2CCTL, i2cctl.d32);
            USB_OTG_BSP_mDelay(200);
        }
    }
    /* case the HS core is working in FS mode */
    if (pdev->cfg.dma_enable == 1) {

        ahbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GAHBCFG);
        ahbcfg.b.hburstlen = 5; /* 64 x 32-bits */
        ahbcfg.b.dmaenable = 1;
        USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);

    }
    /* initialize OTG features */

    return status;
}
//--------------------------------------------------------------
USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
{
  USB_OTG_STS status = USB_OTG_OK;
  USB_OTG_GUSBCFG_TypeDef  usbcfg;
  USB_OTG_GCCFG_TypeDef    gccfg;
  USB_OTG_GAHBCFG_TypeDef  ahbcfg;
  
  usbcfg.d32 = 0;
  gccfg.d32 = 0;
  ahbcfg.d32 = 0;
  
  
  
  if (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY)
  {
    gccfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GCCFG);
    gccfg.b.pwdn = 0;
    
    if (pdev->cfg.Sof_output)
    {
      gccfg.b.sofouten = 1;   
    }
    USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
    
    /* Init The ULPI Interface */
    usbcfg.d32 = 0;
    usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
    
    usbcfg.b.physel            = 0; /* HS Interface */
    
    usbcfg.b.ulpi_ext_vbus_drv = 1; /* Use external VBUS */
 
    usbcfg.b.term_sel_dl_pulse = 0; /* Data line pulsing using utmi_txvalid */    
    
    usbcfg.b.ulpi_fsls = 0;
    usbcfg.b.ulpi_clk_sus_m = 0;
    USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
    
    /* Reset after a PHY select  */
    USB_OTG_CoreReset(pdev);
    
    if(pdev->cfg.dma_enable == 1)
    {
      
      ahbcfg.b.hburstlen = 5; /* 64 x 32-bits*/
      ahbcfg.b.dmaenable = 1;
      USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);
      
    }    
  }
  else /* FS interface (embedded Phy) */
  {
    
    usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);;
    usbcfg.b.physel  = 1; /* FS Interface */
    USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
    /* Reset after a PHY select and set Host mode */
    USB_OTG_CoreReset(pdev);
    /* Deactivate the power down*/
    gccfg.d32 = 0;
    gccfg.b.pwdn = 1;
    
    gccfg.b.vbussensingA = 1 ;
    gccfg.b.vbussensingB = 1 ;     

    gccfg.b.disablevbussensing = 1; 
   
    
    if(pdev->cfg.Sof_output)
    {
      gccfg.b.sofouten = 1;  
    }
    
    USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
    USB_OTG_BSP_mDelay(20);
  }
  /* case the HS core is working in FS mode */
  if(pdev->cfg.dma_enable == 1)
  {
    
    ahbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GAHBCFG);
    ahbcfg.b.hburstlen = 5; /* 64 x 32-bits*/
    ahbcfg.b.dmaenable = 1;
    USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);
    
  }
  /* initialize OTG features */

  return status;
}