Example #1
0
void __init plat_mem_setup(void)
{
	static struct uart_port uart;
	unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
	int i;

	_machine_restart = cobalt_machine_restart;
	_machine_halt = cobalt_machine_halt;
	pm_power_off = cobalt_machine_power_off;

        set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));

	/* I/O port resource must include UART and LCD/buttons */
	ioport_resource.end = 0x0fffffff;

	/* request I/O space for devices used on all i[345]86 PCs */
	for (i = 0; i < COBALT_IO_RESOURCES; i++)
		request_resource(&ioport_resource, cobalt_io_resources + i);

        /* Read the cobalt id register out of the PCI config space */
        PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
        cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
        cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
        cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);

	printk("Cobalt board ID: %d\n", cobalt_board_id);

#ifdef CONFIG_PCI
	register_pci_controller(&cobalt_pci_controller);
#endif

#ifdef CONFIG_SERIAL_8250
	if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {

#ifdef CONFIG_EARLY_PRINTK
		cobalt_early_console();
#endif

		uart.line	= 0;
		uart.type	= PORT_UNKNOWN;
		uart.uartclk	= 18432000;
		uart.irq	= COBALT_SERIAL_IRQ;
		uart.flags	= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
		uart.iobase	= 0xc800000;
		uart.iotype	= UPIO_PORT;

		early_serial_setup(&uart);
	}
#endif
}
Example #2
0
void __init plat_mem_setup(void)
{
	static struct uart_port uart;
	unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
	int i;

	_machine_restart = cobalt_machine_restart;
	_machine_halt = cobalt_machine_halt;
	pm_power_off = cobalt_machine_power_off;

	set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));

	/* I/O port resource must include LCD/buttons */
	ioport_resource.end = 0x0fffffff;

	/* These resources have been reserved by VIA SuperI/O chip. */
	for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
		request_resource(&ioport_resource, cobalt_reserved_resources + i);

        /* Read the cobalt id register out of the PCI config space */
        PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
        cobalt_board_id = GT_READ(GT_PCI0_CFGDATA_OFS);
        cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
        cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);

	printk("Cobalt board ID: %d\n", cobalt_board_id);

#ifdef CONFIG_PCI
	register_pci_controller(&cobalt_pci_controller);
#endif

	if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
#ifdef CONFIG_SERIAL_8250
		uart.line	= 0;
		uart.type	= PORT_UNKNOWN;
		uart.uartclk	= 18432000;
		uart.irq	= COBALT_SERIAL_IRQ;
		uart.flags	= UPF_IOREMAP | UPF_BOOT_AUTOCONF |
				  UPF_SKIP_TEST;
		uart.iotype	= UPIO_MEM;
		uart.mapbase	= 0x1c800000;

		early_serial_setup(&uart);
#endif
	}
}
Example #3
0
void __init pcibios_init(void)
{
	struct pci_dev dev;

	printk("PCI: Probing PCI hardware\n");

	/* Read the cobalt id register out of the PCI config space */
	dev.devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
	PCI_CFG_SET(&dev, (VIA_COBALT_BRD_ID_REG & ~0x3));
	cobalt_board_id = *PCI_CFG_DATA >> ((VIA_COBALT_BRD_ID_REG & 3) * 8);
	cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);

	printk("Cobalt Board ID: %d\n", cobalt_board_id);

	ioport_resource.start = 0x00000000;
	ioport_resource.end = 0x0fffffff;

	iomem_resource.start = 0x01000000;
	iomem_resource.end = 0xffffffff;

	pci_scan_bus(0, &qube_pci_ops, NULL);
}