bool simplify_impl(Env& env, Vlabel b, size_t i, Simplify simplify) {
auto& unit = env.unit;
return vmodify(unit, b, i, [&] (Vout& v) {
auto& blocks = unit.blocks;
auto const nremove = simplify(v);
// Update use counts for to-be-removed instructions.
for (auto j = i; j < i + nremove; ++j) {
visitUses(unit, blocks[b].code[j], [&] (Vreg r) {
--env.use_counts[r];
});
}
// Update use counts and def instructions for to-be-added instructions.
for (auto const& inst : blocks[Vlabel(v)].code) {
visitUses(unit, inst, [&] (Vreg r) {
if (r >= env.use_counts.size()) {
env.use_counts.resize(size_t{r}+1);
}
++env.use_counts[r];
});
visitDefs(unit, inst, [&] (Vreg r) {
if (r >= env.def_insts.size()) {
env.def_insts.resize(size_t{r}+1, Vinstr::nop);
}
env.def_insts[r] = inst.op;
});
}
return nremove;
});
}
void DFSSortClusters::dfs(uint32_t cid) {
if (m_visited.test(cid)) return;
m_visited.set(cid);
m_list.push_back(Vlabel(cid));
// find the best successor, which is the one to which cid has the
// highest weight among the ones that haven't been visited yet
int64_t maxWgt = 0;
uint32_t bestSucc = uint32_t(-1);
for (auto& sInfo : m_clusterSuccs[cid]) {
auto succId = sInfo.first;
if (m_visited.test(succId)) continue;
auto wgt = sInfo.second;
if (wgt >= maxWgt) {
maxWgt = wgt;
bestSucc = succId;
}
}
if (bestSucc == uint32_t(-1)) return;
// visit bestSucc first
dfs(bestSucc);
// now visit the remaining ones
for (auto& sInfo : m_clusterSuccs[cid]) {
if (sInfo.first != bestSucc) {
dfs(sInfo.first);
}
}
}
// overall emitter
void Vgen::emit(jit::vector<Vlabel>& labels) {
// Some structures here track where we put things just for debug printing.
struct Snippet {
const IRInstruction* origin;
TcaRange range;
};
struct BlockInfo {
jit::vector<Snippet> snippets;
};
// This is under the printir tracemod because it mostly shows you IR and
// machine code, not vasm and machine code (not implemented).
bool shouldUpdateAsmInfo = !!m_asmInfo
&& Trace::moduleEnabledRelease(HPHP::Trace::printir, kCodeGenLevel);
std::vector<TransBCMapping>* bcmap = nullptr;
if (mcg->tx().isTransDBEnabled() || RuntimeOption::EvalJitUseVtuneAPI) {
bcmap = &mcg->cgFixups().m_bcMap;
}
jit::vector<jit::vector<BlockInfo>> areaToBlockInfos;
if (shouldUpdateAsmInfo) {
areaToBlockInfos.resize(areas.size());
for (auto& r : areaToBlockInfos) {
r.resize(unit.blocks.size());
}
}
for (int i = 0, n = labels.size(); i < n; ++i) {
assertx(checkBlockEnd(unit, labels[i]));
auto b = labels[i];
auto& block = unit.blocks[b];
codeBlock = &area(block.area).code;
vixl::MacroAssembler as { *codeBlock };
a = &as;
auto blockStart = a->frontier();
addrs[b] = blockStart;
{
// Compute the next block we will emit into the current area.
auto cur_start = start(labels[i]);
auto j = i + 1;
while (j < labels.size() && cur_start != start(labels[j])) {
j++;
}
next = j < labels.size() ? labels[j] : Vlabel(unit.blocks.size());
}
const IRInstruction* currentOrigin = nullptr;
auto blockInfo = shouldUpdateAsmInfo
? &areaToBlockInfos[unsigned(block.area)][b]
: nullptr;
auto start_snippet = [&](Vinstr& inst) {
if (!shouldUpdateAsmInfo) return;
blockInfo->snippets.push_back(
Snippet { inst.origin, TcaRange { codeBlock->frontier(), nullptr } }
);
};
auto finish_snippet = [&] {
if (!shouldUpdateAsmInfo) return;
if (!blockInfo->snippets.empty()) {
auto& snip = blockInfo->snippets.back();
snip.range = TcaRange { snip.range.start(), codeBlock->frontier() };
}
};
for (auto& inst : block.code) {
if (currentOrigin != inst.origin) {
finish_snippet();
start_snippet(inst);
currentOrigin = inst.origin;
}
if (bcmap && inst.origin) {
auto sk = inst.origin->marker().sk();
if (bcmap->empty() ||
bcmap->back().md5 != sk.unit()->md5() ||
bcmap->back().bcStart != sk.offset()) {
bcmap->push_back(TransBCMapping{sk.unit()->md5(), sk.offset(),
main().frontier(), cold().frontier(),
frozen().frontier()});
}
}
switch (inst.op) {
#define O(name, imms, uses, defs) \
case Vinstr::name: emit(inst.name##_); break;
VASM_OPCODES
#undef O
}
}
finish_snippet();
}
for (auto& p : jccs) {
assertx(addrs[p.target]);
backend.smashJcc(p.instr, addrs[p.target]);
}
for (auto& p : bccs) {
assertx(addrs[p.target]);
auto link = (Instruction*) p.instr;
link->SetImmPCOffsetTarget(Instruction::Cast(addrs[p.target]));
}
for (auto& p : jmps) {
assertx(addrs[p.target]);
backend.smashJmp(p.instr, addrs[p.target]);
}
for (auto& p : catches) {
mcg->registerCatchBlock(p.instr, addrs[p.target]);
}
for (auto& p : ldpoints) {
CodeCursor cc(main(), p.instr);
MacroAssembler a{main()};
a.Mov(X(p.d), points[p.pos]);
}
if (!shouldUpdateAsmInfo) {
return;
}
for (auto i = 0; i < areas.size(); ++i) {
const IRInstruction* currentOrigin = nullptr;
auto& blockInfos = areaToBlockInfos[i];
for (auto const blockID : labels) {
auto const& blockInfo = blockInfos[static_cast<size_t>(blockID)];
if (blockInfo.snippets.empty()) continue;
for (auto const& snip : blockInfo.snippets) {
if (currentOrigin != snip.origin && snip.origin) {
currentOrigin = snip.origin;
}
m_asmInfo->updateForInstruction(
currentOrigin,
static_cast<AreaIndex>(i),
snip.range.start(),
snip.range.end());
}
}
}
}
