static int ad1889_aclink_reset(struct pci_dev * pcidev)
{
u16 stat;
int retry = 200;
ad1889_dev_t *dev = pci_get_drvdata(pcidev);
AD1889_WRITEW(dev, AD_DSCCS, 0x8000); /* turn on clock */
AD1889_READW(dev, AD_DSCCS);
WAIT_10MS();
stat = AD1889_READW(dev, AD_ACIC);
stat |= 0x0002; /* Reset Disable */
AD1889_WRITEW(dev, AD_ACIC, stat);
(void) AD1889_READW(dev, AD_ACIC); /* flush posted write */
udelay(10);
stat = AD1889_READW(dev, AD_ACIC);
stat |= 0x0001; /* Interface Enable */
AD1889_WRITEW(dev, AD_ACIC, stat);
do {
if (AD1889_READW(dev, AD_ACIC) & 0x8000) /* Ready */
break;
WAIT_10MS();
retry--;
} while (retry > 0);
if (!retry) {
printk(KERN_ERR "ad1889_aclink_reset: codec is not ready [0x%x]\n",
AD1889_READW(dev, AD_ACIC));
return -EBUSY;
}
/* TODO reset AC97 codec */
/* TODO set wave/adc pci ctrl status */
stat = AD1889_READW(dev, AD_ACIC);
stat |= 0x0004; /* Audio Stream Output Enable */
AD1889_WRITEW(dev, AD_ACIC, stat);
return 0;
}
/************************* helper routines ***************************** */
static inline void ad1889_set_wav_rate(ad1889_dev_t *dev, int rate)
{
struct ac97_codec *ac97_codec = dev->ac97_codec;
DBG("Setting WAV rate to %d\n", rate);
dev->state[AD_WAV_STATE].dmabuf.rate = rate;
AD1889_WRITEW(dev, AD_DSWAS, rate);
/* Cycle the DAC to enable the new rate */
ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0x0200);
WAIT_10MS();
ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0);
}