void WDOG_Init(WDOG_Type *base, const wdog_config_t *config) { assert(config); uint32_t value = 0U; uint32_t primaskValue = 0U; value = WDOG_STCTRLH_WDOGEN(config->enableWdog) | WDOG_STCTRLH_CLKSRC(config->clockSource) | WDOG_STCTRLH_IRQRSTEN(config->enableInterrupt) | WDOG_STCTRLH_WINEN(config->enableWindowMode) | WDOG_STCTRLH_ALLOWUPDATE(config->enableUpdate) | WDOG_STCTRLH_DBGEN(config->workMode.enableDebug) | WDOG_STCTRLH_STOPEN(config->workMode.enableStop) | #if defined(FSL_FEATURE_WDOG_HAS_WAITEN) && FSL_FEATURE_WDOG_HAS_WAITEN WDOG_STCTRLH_WAITEN(config->workMode.enableWait) | #endif /* FSL_FEATURE_WDOG_HAS_WAITEN */ WDOG_STCTRLH_DISTESTWDOG(1U); /* Disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence * and the WCT may expire. After the configuration finishes, re-enable the global interrupts. */ primaskValue = DisableGlobalIRQ(); WDOG_Unlock(base); /* Wait one bus clock cycle */ base->RSTCNT = 0U; /* Set configruation */ base->PRESC = WDOG_PRESC_PRESCVAL(config->prescaler); base->WINH = (uint16_t)((config->windowValue >> 16U) & 0xFFFFU); base->WINL = (uint16_t)((config->windowValue) & 0xFFFFU); base->TOVALH = (uint16_t)((config->timeoutValue >> 16U) & 0xFFFFU); base->TOVALL = (uint16_t)((config->timeoutValue) & 0xFFFFU); base->STCTRLH = value; EnableGlobalIRQ(primaskValue); }
/*FUNCTION********************************************************************** * * Function Name : WDOG_HAL_SetConfig * Description : Configures WDOG control register. * *END**************************************************************************/ void WDOG_HAL_SetConfig(WDOG_Type * base, const wdog_config_t *configPtr) { assert(configPtr); uint32_t value = 0; value = WDOG_STCTRLH_WDOGEN(configPtr->wdogEnable) | WDOG_STCTRLH_CLKSRC(configPtr->clkSrc) | WDOG_STCTRLH_IRQRSTEN(configPtr->intEnable) | WDOG_STCTRLH_WINEN(configPtr->winEnable) | WDOG_STCTRLH_ALLOWUPDATE(configPtr->updateEnable) | WDOG_STCTRLH_DBGEN(configPtr->workMode.kWdogEnableInDebugMode) | WDOG_STCTRLH_STOPEN(configPtr->workMode.kWdogEnableInStopMode) | #if FSL_FEATURE_WDOG_HAS_WAITEN WDOG_STCTRLH_WAITEN(configPtr->workMode.kWdogEnableInWaitMode) | #endif WDOG_STCTRLH_DISTESTWDOG(1U); WDOG_BWR_PRESC_PRESCVAL(base, configPtr->prescaler); WDOG_WR_WINH(base, (uint16_t)((configPtr->windowValue>>16U) & 0xFFFFU)); WDOG_WR_WINL(base, (uint16_t)((configPtr->windowValue) & 0xFFFFU)); WDOG_WR_TOVALH(base, (uint16_t)((configPtr->timeoutValue >> 16U) & 0xFFFFU)); WDOG_WR_TOVALL(base, (uint16_t)((configPtr->timeoutValue) & 0xFFFFU)); WDOG_WR_STCTRLH(base, value); }
void WDOG_SetTestModeConfig(WDOG_Type *base, wdog_test_config_t *config) { assert(config); uint32_t value = 0U; uint32_t primaskValue = 0U; value = WDOG_STCTRLH_DISTESTWDOG(0U) | WDOG_STCTRLH_TESTWDOG(1U) | WDOG_STCTRLH_TESTSEL(config->testMode) | WDOG_STCTRLH_BYTESEL(config->testedByte) | WDOG_STCTRLH_IRQRSTEN(0U) | WDOG_STCTRLH_WDOGEN(1U) | WDOG_STCTRLH_ALLOWUPDATE(1U); /* Disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence * and the WCT may expire. After the configuration finishes, re-enable the global interrupts. */ primaskValue = DisableGlobalIRQ(); WDOG_Unlock(base); /* Wait one bus clock cycle */ base->RSTCNT = 0U; /* Set configruation */ base->TOVALH = (uint16_t)((config->timeoutValue >> 16U) & 0xFFFFU); base->TOVALL = (uint16_t)((config->timeoutValue) & 0xFFFFU); base->STCTRLH = value; EnableGlobalIRQ(primaskValue); }
/** * @brief Low-level initialize the system * * Low level setup of the microcontroller system. \n * Called very early in the initialisation. \n * May NOT use globals etc (as will be overwritten by BSS initialization) */ void SystemInitLowLevel(void) { /* * This is generic initialization code * It may not be correct for a specific target */ #ifdef __VTOR_PRESENT /* Set the interrupt vector table position */ SCB->VTOR = (uint32_t)__vector_table; #endif #ifdef SCB_CCR_DIV_0_TRP_Msk /* Enable trapping of divide by zero */ SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk; #endif #ifdef RCM_MR_BOOTROM // Clear Boot ROM flag RCM->MR = RCM_MR_BOOTROM(3); #endif #if defined(SIM_COPC_COPT_MASK) // Disable watch-dog SIM->COPC = SIM_COPC_COPT(0); #endif #ifdef WDOG_CS_UPDATE /* Unlocking Watchdog word */ #define WDOG_UPDATE_KEY (0xD928C520U) // Disable watch-dog WDOG->CNT = WDOG_UPDATE_KEY; // Write the unlock word WDOG->TOVAL = -1; // Setting time-out value WDOG->CS = WDOG_CS_CLK(1) | // Setting 1-kHz clock source WDOG_CS_UPDATE(1); // Allow future update #endif #ifdef WDOG_CS1_UPDATE_MASK /* Unlocking Watchdog sequence words*/ #define WDOG_KEY1 (0x20C5) #define WDOG_KEY2 (0x28D9) /* Disable watch-dog */ WDOG->CNT = WDOG_KEY1; // Write the 1st unlock word WDOG->CNT = WDOG_KEY2; // Write the 2nd unlock word WDOG->TOVAL = -1; // Setting time-out value WDOG->CS2 = WDOG_CS2_CLK(1); // Setting 1-kHz clock source WDOG->CS1 = WDOG_CS1_UPDATE(1); // Disable watchdog and allow future changes #endif #ifdef WDOG_UNLOCK_WDOGUNLOCK_MASK /* Unlocking Watchdog sequence words*/ #define WDOG_KEY1 (0xC520) #define WDOG_KEY2 (0xD928) /* Disable watch-dog */ WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(WDOG_KEY1); WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(WDOG_KEY2); __DSB(); WDOG->STCTRLH = WDOG_STCTRLH_WDOGEN(0)| // Disable WDOG WDOG_STCTRLH_ALLOWUPDATE(1)| // Allow future updates WDOG_STCTRLH_CLKSRC(0); // WDOG clk=LPO #endif }