void BT656OutputEnable(BYTE fOn, BYTE clear_port)
{
DECLARE_LOCAL_page
ReadTW88Page(page);
WriteTW88Page(PAGE0_INPUT);
if (fOn)
{
#ifdef SUPPORT_UART1
Printf("\nBUGBUG:BT656 and UART1..");
#else
WriteTW88(REG007, ReadTW88(REG007) | 0x08);
#endif
}
else
{
WriteTW88(REG007, ReadTW88(REG007) & ~0x08); //DataInitNTSC clear it.
//clear port
if (clear_port)
{
if (P1_6 == 0)
P1_6 = 1;
}
}
WriteTW88Page(page);
}
void SetDefaultPClock(void)
{
WriteTW88Page(PAGE0_SSPLL);
WriteTW88(REG0F9, 0x50); //SSPLL 70MKz. 0x50:70MHz, 0x3C:66.6MHz..Pls use SspllSetFreqReg(0x015000);
WriteTW88(REG0F6, 0x00); //PCLK div:1. SPI CLK div:1
WriteTW88Page(PAGE2_SCALER);
WriteTW88(REG20D, 0x81 ); // PCLKO div by 2. ??Polarity
}
/**
* control LEDC digital block
*/
void LedBackLight(BYTE on)
{
WaitVBlank(1);
WriteTW88Page(PAGE0_LEDC);
if (on)
WriteTW88(REG0E0, ReadTW88(REG0E0 ) | 1 );
else
WriteTW88(REG0E0, ReadTW88(REG0E0 ) & ~0x01 );
}
/*
DMA for SPI LUT needs a PCLK divider 2 on the TW8835.
LutOffset
size
address: LUT data location at SPIFlash.
example: ctest sosdlut 1 0 100 410010 <--logo
ctest sosdlut 1 0 100 41e081 <- setup menu, main background
*/
void ChipTest_SOsdLut(BYTE winno, WORD LutOffset, WORD size,DWORD address)
{
WORD ii;
BYTE j;
BYTE bgra[4], value;
volatile BYTE B0;
BYTE rcount;
WORD error=0;
//write LUT by DMA
SpiOsdLoadLUT(winno, /*type=*/1, LutOffset, size*4, address, 0xFF);
//read back test
for(ii=LutOffset; ii < (LutOffset+size); ii++) {
//read BGRA data at REG4D0~REG4D3
//SpiFlashDmaRead(DMA_DEST_CHIPREG, DMA_BUFF_REG_ADDR, address+(ii-LutOffset)*4, 4);
SpiFlashDmaRead2XMem(bgra, address+(ii-LutOffset)*4, 4);
//read LUT data & compare
for(j=0; j < 4; j++) {
WriteTW88Page(PAGE4_SOSD );
value = 0xa0 + j; //?BGRA
if(ii & 0x100) value += 0x08; //high
#ifdef MODEL_TW8836
if(winno==1 || winno==2) value += 0x04; //Group B
#endif
WriteTW88(REG410,value);
WriteTW88(REG411,(BYTE)ii); //addr 0
//read twice or three times.
value=ReadTW88(REG412);
rcount=1;
while(1) {
B0=ReadTW88(REG412);
rcount++;
if(B0 == value)
break;
value = B0;
}
if(rcount > 3) {
Printf("\n %d:%bd rcount:%bd",ii,j, rcount);
}
//bgra = ReadTW88(REG4D0+j);
if(B0 != bgra[j]) {
error++;
if(error <= 10)
Printf("\nfail %d+%bd R:%bx Wrote:%bx", ii,j, B0, bgra[j]);
}
}
}
if(error==0)
Printf("\n==>Success");
}
void DecoderSetAFE(BYTE input_mode)
{
WriteTW88Page(PAGE1_DECODER );
if(input_mode==0) {
WriteTW88(REG105, (ReadTW88(REG105) & 0xF0) | 0x04); //? C is for decoder, not RGB
}
else {
WriteTW88(REG105, (ReadTW88(REG105) | 0x0F));
}
}
void MonOsdChangeAttr(BYTE winno, BYTE attr)
{
WORD i;
Printf("\nOSD %bd LUT set to all %02bx", winno, attr);
WriteTW88(OSD_LUT_WINNO, winno<<6 );
for(i=0; i<256; i++) {
WriteTW88(OSD_LUT_INDEX, i );
WriteTW88(OSD_LUT_ATTR, attr );
}
}
void SetAutoDetectStd(void)
{
BYTE val;
BYTE page;
page = ReadTW88(0xFF);
val = ReadTW88_Page(0xb09);
WriteTW88(0x09,val|0x01); // SDTR
WriteTW88(0xFF,page);
}
/**
* set input mux format
*
* register
* R102 - input format.
* R105.
* R106.
* @param InputMode
*/
void InMuxSetInput(BYTE InputMode)
{
BYTE r102, r105, r106;
WriteTW88Page(PAGE1_DECODER );
r105 = ReadTW88(REG105) & 0xF0;
r106 = ReadTW88(REG106) & ~0x03; //Do not change Y.
switch(InputMode) {
case INPUT_CVBS:
r102 = 0x40; // 0x40 - FC27:27MHz, IFSEL:Composite, YSEL:YIN0
r105 |= 0x0F; //decoder mode
r106 |= 0x03; // C,V adc in Power Down.
break;
case INPUT_SVIDEO:
r102 = 0x54; // 0x54 - FC27:27MHz, IFSEL:S-Video, YSEL:YIN1, CSEL:CIN0
r105 |= 0x0F; //decoder mode
r106 |= 0x01; // V in PowerDown
break;
case INPUT_COMP: //target r102:4A,r105:04 r016:00
// -> 4A 00 00
r102 = 0x4A ; // 0x4A - FC27:27MHz,
// IFSEL:Composite, We are using aRGB. So composite is a correct value
// YSEL:YIN2, CSEL:CIN1, VSEL:VIN0
//r105 |= 0x04; //??? ? someone overwrite as 00. R105[2]=0b is a correct
//r106 //C & V adc in normal(not Power Down)
break;
case INPUT_PC: //target r102:4A r105:04 r106:00
r102 = 0x4A; // 0x4A - FC27:27MHz,
// IFSEL:Composite, We are using aRGB. So composite is a correct value
// YSEL:YIN2, CSEL:CIN1, VSEL:VIN0
//r105 = //RGB mode
//?? I think R105[2] have to be 0. not 1b.
//r106 //C & V adc in normal(not Power Down)
break;
case INPUT_DVI: //target ? don't care
case INPUT_HDMIPC:
case INPUT_HDMITV:
case INPUT_BT656:
//digital. don't care.
r102 = 0x00;
break;
}
if(r102) { //need update?
WriteTW88(REG102, r102 );
WriteTW88(REG105, r105 );
WriteTW88(REG106, r106 );
}
}
/**
* desc
* set output crop for Decoder
*
*
* register
* vDelay R107[7:6]R108[7:0]
* vActive R107[5:4]R109[7:0]
* hDelay R107[3:2]R10A[7:0]
* hActive R107[1:0]R10B[7:0]
*
* hDelay hActive vDelay vActive
* NTSC 8 720 21 240
* PAL 6 720 23 288
*
*/
void DecoderSetOutputCrop(WORD hDelay, WORD hActive, WORD vDelay, WORD vActive)
{
BYTE bTemp;
bTemp = vDelay >> 8; bTemp <<= 2;
bTemp |= vActive >> 8; bTemp <<= 2;
bTemp |= hDelay >> 8; bTemp <<= 2;
bTemp |= hActive >> 8;
WriteTW88(REG107, bTemp);
WriteTW88(REG108, (BYTE)vDelay);
WriteTW88(REG109, (BYTE)vActive);
WriteTW88(REG10A, (BYTE)hDelay);
WriteTW88(REG10B, (BYTE)hActive);
}
/**
* I2CCMD read commad
*
* @ingroup I2CCMD
* @see I2CCMD_exec_main
*/
BYTE I2CCMD_Read(void)
{
BYTE cmd;
BYTE ret;
ret = ERR_FAIL;
cmd = ReadTW88(I2CCMD_REG1);
if(cmd==0) {
WriteTW88(I2CCMD_REG4,InputMain);
ret = ERR_SUCCESS;
}
else if(cmd==1) {
WriteTW88(I2CCMD_REG4,MenuGetLevel());
ret = ERR_SUCCESS;
}
else if(cmd==2) {
WriteTW88(I2CCMD_REG4,DebugLevel);
ret = ERR_SUCCESS;
}
else if(cmd==3) {
WriteTW88(I2CCMD_REG4,access);
ret = ERR_SUCCESS;
}
else if(cmd==4) {
WriteTW88(I2CCMD_REG4,access);
if(SFR_WDCON & 0x02) WriteTW88(I2CCMD_REG4,0x01); //On
else WriteTW88(I2CCMD_REG4,0x00); //Off
ret = ERR_SUCCESS;
}
else if(cmd==5) {
WriteTW88(I2CCMD_REG3,(WORD)SPI_Buffer>>8);
WriteTW88(I2CCMD_REG4,(BYTE)SPI_Buffer);
ret = ERR_SUCCESS;
}
/**
* I2CCMD main
*
* @ingroup I2CCMD
* @see I2CCMD_Read
* @see I2CCMD_Exec
* @see I2CCMD_Sfr
* @see I2CCmd_eeprom
* @see I2CCmd_key
*/
BYTE I2CCMD_exec_main(void)
{
BYTE ret;
//I2CCMD_REG0~I2CCMD_REG4
Printf("\nI2CCMD %bx:%bx:%bx:%bx:%bx",
ReadTW88(I2CCMD_REG0),
ReadTW88(I2CCMD_REG1),
ReadTW88(I2CCMD_REG2),
ReadTW88(I2CCMD_REG3),
ReadTW88(I2CCMD_REG4));
switch(ReadTW88(I2CCMD_REG0)) {
case 0: ret = I2CCMD_Read(); break;
case 1: ret = I2CCMD_Exec(); break;
case 2: ret = I2CCMD_Sfr(); break;
case 3: ret = I2CCmd_eeprom(); break;
case 4: ret = I2CCmd_key(); break;
default: ret = ERR_FAIL;
}
if(ret!=ERR_SUCCESS) {
WriteTW88(REG009, 0xE0);
}
return ret;
}
/**
* set GPIO for FP
*/
void FP_GpioDefault(void)
{
WriteTW88Page(PAGE0_GPIO);
//IR uses PORT1_4(GPIO40). To disable TCPOLN output, we need to enable it as GPIO and uses it as input port with INT11.
WriteTW88(REG084, 0x01); //GPIO 4x Enable - GPIO40 enable
WriteTW88(REG08C, 0x00); //GPIO 4x direction - GPIO40 input
WriteTW88(REG094, 0x00); //GPIO 4x output data - GPIO40 outdata as 0.
if(access) {
//turn off FPPWC & FPBias. make default
// 0x40 R0 R1 is related with FP_PWC_OnOff
WriteI2CByte( I2CID_SX1504, 1, 0/*3*/ ); //RegDir: input
WriteI2CByte( I2CID_SX1504, 0, 0xFF/*3*/ ); //RegData: FPBias OFF. FPPWC disable.
//WriteI2CByte( I2CID_SX1504, 1, 0xFF/*3*/ ); //RegDir: input
Printf("\nI2CID_SX1504 0:%02bx 1:%bx",ReadI2CByte(I2CID_SX1504, 0), ReadI2CByte(I2CID_SX1504, 1));
}
}
void McuSpiClkSelect(BYTE McuSpiClkSel)
{
#ifdef PANEL_AUO_B133EW01
//I will use SSPLL. Do not change MCU clock.
BYTE value=McuSpiClkSel;
#else
BYTE value;
WriteTW88Page(PAGE4_CLOCK);
value = ReadTW88(REG4E1) & 0x0F;
WriteTW88(REG4E1, (McuSpiClkSel << 4) | value);
#endif
}
void ClearLogo(void)
{
DECLARE_LOCAL_page
BYTE i, j;
ReadTW88Page(page);
WriteTW88Page(PAGE3_FOSD );
//=============================== Fade OUT ======================================
for ( i=0; i<9; i++ ) {
delay1ms(30);
for ( j=0; j<16; j++ ) {
WriteTW88(REG_FOSD_ALPHA_SEL, j );
WriteTW88(FOSDWinBase[TECHWELLOGO_OSDWIN] +1, i );
WriteTW88(FOSDWinBase[TECHWELLOGO_OSDWIN+2]+1, i );
}
}
//============ Disable window and recover Trans value ============================
FOsdOnOff(OFF, 1); //with vdelay 1
FOsdWinEnable(TECHWELLOGO_OSDWIN,FALSE);
FOsdWinEnable(TECHWELLOGO_OSDWIN+2,FALSE);
//assume page3
for ( j=0; j<16; j++ ) {
WriteTW88(REG_FOSD_ALPHA_SEL, j );
WriteTW88(FOSDWinBase[TECHWELLOGO_OSDWIN] +1, 0 );
WriteTW88(FOSDWinBase[TECHWELLOGO_OSDWIN+2]+1, 0 );
}
WriteTW88Page(page );
}
BYTE LEDCOn(BYTE step)
{
BYTE i;
WriteTW88Page(PAGE0_LEDC);
switch(step)
{
case 0:
WriteTW88(REG0E0, 0x72); //default. & disable OverVoltage
WriteTW88(REG0E5, 0x80); //LEDC digital output enable.
WriteTW88(REG0E0, 0x12); //Off OverCurrent. Disable Protection
WriteTW88(REG0E0, 0x13); //LEDC digital block enable
break;
case 1:
WriteTW88(REG0E0, 0x11); //Analog block powerup
break;
case 2:
WriteTW88(REG0E0, 0x71); //enable OverCurrent, enable Protection control
break;
//default:
// ePuts("\nBUG");
// return;
}
for(i=0; i < 10; i++) {
if((ReadTW88(REG0E2) & 0x30)==0x30) { //wait normal
//dPrintf("\nLEDC(%bd):%bd",step,i);
return ERR_SUCCESS; //break;
}
delay1ms(2);
}
dPrintf("\nLEDC(%bd) FAIL",step);
return ERR_FAIL;
}
void WritePannelData_Func(BYTE sys)
{
UINT j ;
BYTE index,val;
for(j = 0; j<8194; j += 2)
{
switch(sys)
{
case Pannel_init_tw8836:
index =tInit_tw8836_9inch[j];
val =tInit_tw8836_9inch[j+1];
break;
case Pannel_DTV_type:
index = tInit_DTV_9inch[j];
val = tInit_DTV_9inch[j+1];
break;
default:
return;
}
if(val == 0xFF && index == 0xFF)
break;
WriteTW88(index, val);
}
//SetAutoDetectStd();//×Ô¶¯ÖÆʽ¼ì²â
WriteTW88(0xff, 0x00); // set page 0
//PannelType_last=sys;
}
BYTE DCDC_On(BYTE step)
{
BYTE i;
// dPrintf("\nDCDC_On(%bx)",step);
//-------------
//DCDC ON
WriteTW88Page(PAGE0_DCDC);
switch(step) {
case 0:
#if 0
WriteTW88(REG0E8, 0x72); //default. & disable OverVoltage
WriteTW88(REG0E8, 0x12); //disable OverCurrent, disable UnderCurrent
WriteTW88(REG0E8, 0x13); //enable DC convert digital block
#endif
WriteTW88(REG0E8, 0xF2); //Printf("\nREG0E8:F2[%bd]",ReadTW88(REG0EA)>>4);
WriteTW88(REG0E8, 0x02); //Printf("\nREG0E8:02[%bd]",ReadTW88(REG0EA)>>4);
WriteTW88(REG0E8, 0x03); //Printf("\nREG0E8:03[%bd]",ReadTW88(REG0EA)>>4);
WriteTW88(REG0E8, 0x01); //Printf("\nREG0E8:01[%bd]",ReadTW88(REG0EA)>>4);
break;
case 1:
WriteTW88(REG0E8, 0x11); //powerup DC sense block
break;
case 2:
WriteTW88(REG0E8, 0x71); //turn on under current feedback control
//0x11->0x51->0x71
break;
//default:
// ePuts("\nBUG");
// return;
}
for(i=0; i < 10; i++) {
if((ReadTW88(REG0EA) & 0x30)==0x30) {
//dPrintf("\nDCDC(%bd):%bd",step,i);
return ERR_SUCCESS; //break;
}
delay1ms(2);
}
// Printf("\nDCDC_On(%bd) FAIL",step);
return ERR_FAIL;
}
/**
* enable Output pin
*
* DataOut need EnableOutputPin(ON,ON)
* target R008 = 0x89
*/
void OutputEnablePin(BYTE fFPDataPin, BYTE fOutputPin)
{
BYTE value;
Printf("\nFP_Data:%s OutputPin:%s", fFPDataPin ? "On" : "Off", fOutputPin ? "On" : "Off");
WriteTW88Page(PAGE0_GENERAL);
// WriteTW88(REG008, 0x80 | (ReadTW88(REG008) & 0x0F)); //Output enable......BUGBUG
value = ReadTW88(REG008) & ~0x30;
if (fFPDataPin == 0)
value |= 0x20;
if (fOutputPin == 0)
value |= 0x10;
WriteTW88(REG008, value);
}
/**
* set FP_PWC
*/
void FP_PWC_OnOff(BYTE fOn)
{
Printf("\nFP_PWC %s",fOn ? "On" : "Off");
I2C_delay_base = 3; //assume 108/1.5.
WriteTW88Page(PAGE0_GENERAL);
WriteTW88(REG084, 0x01); //disable
if(fOn) {
WriteI2CByte( I2CID_SX1504, 1, 0 ); // output enable
WriteI2CByte( I2CID_SX1504, 0, ReadI2CByte(I2CID_SX1504, 0) & 0xFE ); // FPPWC enable
}
else {
WriteI2CByte( I2CID_SX1504, 1, 0 ); // output enable
WriteI2CByte( I2CID_SX1504, 0, ReadI2CByte(I2CID_SX1504, 0) | 0x01 ); // FPPWC disable
}
}
void I2CDeviceInitialize(BYTE *RegSet, BYTE delay)
{
int cnt=0;
BYTE addr, index, val;
WORD w_page=0;
// BYTE speed;
addr = *RegSet;
#ifdef DEBUG_TW88
dPrintf("\nI2C address : %02bx", addr);
#endif
cnt = *(RegSet+1); //ignore cnt
RegSet+=2;
// if(addr)
// speed = SetI2CSpeed(I2C_SPEED_SLOW);
while (( RegSet[0] != 0xFF ) || ( RegSet[1]!= 0xFF )) { // 0xff, 0xff is end of data
index = *RegSet;
val = *(RegSet+1);
if ( addr == 0 ) {
if(index==0xFF) {
w_page=val << 8;
}
else {
WriteTW88(w_page+index, val);
}
}
else
WriteI2CByte(addr, index, val);
if(delay)
delay1ms(delay);
#ifdef DEBUG_TW88
dPrintf("\n addr=%02x index=%03x val=%02x", (WORD)addr, w_page | index, (WORD)val );
#endif
RegSet+=2;
}
// if(addr)
// SetI2CSpeed(speed);
}
void ChipTest_GPIO(void)
{
DECLARE_LOCAL_page
BYTE prev_en,prev_oe,prev_od;
BYTE value;
BYTE i;
BYTE result;
ReadTW88Page(page);
WriteTW88Page(0);
//GPIO0~6
for(i=0; i < 7; i++) {
result = ERR_SUCCESS;
Printf("\nGPIO_%01bxx ",i);
//read previous value
prev_en = ReadTW88(REG080+i);
prev_oe = ReadTW88(REG088+i);
prev_od = ReadTW88(REG090+i);
value = ReadTW88(REG098+i);
Printf("PREV EN:%02X OE:%02X OD:%02X ID:%02X ", prev_en,prev_oe,prev_od,value);
WriteTW88(REG080+i, 0xFF & GPIO_mask[i]); //enable GPIO
WriteTW88(REG088+i, 0xFF & GPIO_mask[i]); //output enable
WriteTW88(REG090+i, 0xFF & GPIO_mask[i]); //output data
value= ReadTW88(REG098+i) & GPIO_mask[i]; //read input
Printf(" W:%02bx R:%02bx ",0xFF & GPIO_mask[i], value);
if((0xFF & GPIO_mask[i]) != (value & GPIO_mask[i]))
result = ERR_FAIL;
WriteTW88(REG090+i, 0x00); //output data
value=ReadTW88(REG098+i) & GPIO_mask[i]; //read input
Printf(" W:00 R:%02bx ",value);
if((value & GPIO_mask[i]))
result = ERR_FAIL;
if(result==ERR_SUCCESS)
Puts(" Pass");
//restore orginal value
WriteTW88(REG080+i, prev_en);
WriteTW88(REG088+i, prev_oe);
WriteTW88(REG090+i, prev_od);
}
WriteTW88Page(page);
}
//code WORD LOGO_COLOR_8[16] = {
// 0xFFFF,0x0020,0xDEDB,0xA534,0x6B6D,0xC826,0x4A49,0xDCD5,
// 0xFFFF,0xC806,0xC98C,0xCB31,0xFE79,0xFCD9,0xCCD4,0xE71C
//};
//-------------------------------------------------------------------
// Display/Clear FOSD LOGO
//-------------------------------------------------------------------
void DisplayLogo(void)
{
#ifdef SUPPORT_8BIT_CHIP_ACCESS
BYTE page;
#endif
BYTE i;
ReadTW88Page(page);
InitFOsdMenuWindow(Init_Osd_DisplayLogo);
#ifdef ADD_ANALOGPANEL
if(IsAnalogOn())
InitFOsdMenuWindow(Init_Osd_DisplayLogo_A);
#endif
InitFontRamByNum(FONT_NUM_LOGO, 0); //FOsdDownloadFont(2);
FOsdSetPaletteColorArray(0, LOGO_COLOR_8, 16, 1);
WriteTW88Page(PAGE4_CLOCK);
dPrintf("\nDisplayLogo-Current MCU SPI Clock select : [0x4E0]=0x%02bx, [0x4E1]=0x%02bx", ReadTW88(REG4E0), ReadTW88(REG4E1));
WriteTW88Page(PAGE3_FOSD );
WriteTW88(REG304, ReadTW88(REG304)&0xFE); // OSD RAM Auto Access Enable
WriteTW88(REG304, (ReadTW88(REG304)&0xF3)); // Normal
for ( i=0; i<70; i++ ) {
WriteTW88(REG306, i );
WriteTW88(REG307, i*3 );
WriteTW88(REG308, (i / 42)*2 );
}
WriteTW88(REG30B, 0 ); // 2bit multi color start = 0
WriteTW88(REG_FOSD_MADD3, 0 ); // 3bit multi color start = 0
WriteTW88(REG_FOSD_MADD4, 0xff ); // 4bit multi color start = 0
FOsdWinEnable(TECHWELLOGO_OSDWIN,TRUE);
FOsdWinEnable(TECHWELLOGO_OSDWIN+1,FALSE);
FOsdWinEnable(TECHWELLOGO_OSDWIN+2,TRUE);
}
void WaitVBlank(BYTE cnt)
{
XDATA BYTE i;
WORD loop;
DECLARE_LOCAL_page
ReadTW88Page(page);
WriteTW88Page(PAGE0_GENERAL );
for ( i=0; i<cnt; i++ ) {
WriteTW88(REG002, 0xff );
loop = 0;
while (!( ReadTW88(REG002 ) & 0x40 ) ) {
// wait VBlank
loop++;
if(loop > VBLANK_WAIT_VALUE ) {
wPrintf("\nERR:WaitVBlank");
break;
}
}
}
WriteTW88Page(page);
}
void TW8836_WritePage( uint8_t dat )
{
//sI2cWriteByte(0x8A, 0xFF, dat);
WriteTW88(0xff,dat);
}
void TW8836_Write( uint8_t suba, uint8_t dat )
{
//sI2cWriteByte(0x8A, suba, dat);
WriteTW88(suba,dat);
}
void WriteBlockTW88(WORD reg, BYTE *Buff, BYTE len)
{
BYTE i;
for(i=0; i < len; i++)
WriteTW88(reg+i, Buff[i]);
}
void ClkPllSetSpiInputClockLatch(BYTE property)
{
BYTE bTemp;
bTemp = ReadTW88(REG4E1) & 0x3F;
WriteTW88(REG4E1, bTemp | (property << 6));
}
void DecoderSetPath(BYTE path)
{
WriteTW88Page(PAGE1_DECODER );
WriteTW88(REG102, path );
}
void ChipTest_SPIDMA(BYTE wait)
{
/*
WriteTW88Page(4);
SpiFlashDmaDestType(DMA_DEST_CHIPREG, 0);
SpiFlashDmaBuffAddr(DMA_BUFF_REG_ADDR);
SpiFlashDmaReadLen(0); //clear high & middle bytes
SpiFlashCmd(SPICMD_RDID, 1);
SpiFlashDmaReadLenByte(3);
SpiFlashDmaStart(SPIDMA_READ,0, __LINE__);
vid = ReadTW88(REG4D0);
dat0 = ReadTW88(REG4D1);
cid = ReadTW88(REG4D2);
*/
BYTE r4c1, i;
volatile BYTE value;
WriteTW88Page(4);
r4c1 = ReadTW88(REG4C1); //save
Printf("\nREG4C1:%02bx ",r4c1);
Printf(" REG4C5:%02bx ",ReadTW88(REG4C5));
Printf(" REG4D8:%02bx ",ReadTW88(REG4D8));
Printf(" REG4D9:%02bx ",ReadTW88(REG4D9));
WriteTW88(REG4C1, 1); //1:At vertical blank
WriteTW88(REG4C3, (DMA_DEST_CHIPREG << 6) | 1);
WriteTW88(REG4C5, 0x80);
WriteTW88(REG4C6, 0x04); //0x04D0 chip register address
WriteTW88(REG4C7, 0xD0);
WriteTW88(REG4CA, 0x00); //dma length 3
WriteTW88(REG4C8, 0x00);
WriteTW88(REG4C9, 0x03);
WriteTW88(REG4CA, 0x9F); //cmd read JEDEC id
WriteTW88(REG4D0, 0x00); //clear buffer
WriteTW88(REG4D1, 0x00);
WriteTW88(REG4C2, 0x00);
if(wait) {
WriteTW88(REG4C4, 1);
for(i=0; i < wait; i++) ;
}
else {
//NO WAIT
WriteTW88(REG4C4, 1);
}
//=========================
// check REG4C4
//=========================
value=ReadTW88(REG4C4);
if(value & 0x01) {
for(i=0; i < 127; i++) {
delay1ms(1);
value=ReadTW88(REG4C4);
if((value & 0x01)==0)
break;
}
Printf("\nREG4C4:%02bx wait:%bd",value, i);
}
else
Printf("\nREG4C4:%02bx",value);
Printf("\nRead ID: %02bx %02bx %02bx",ReadTW88(REG4D0),ReadTW88(REG4D1),ReadTW88(REG4D2));
WriteTW88(REG4C1, r4c1); //restore
}
void ChipTest_Register_RW(BYTE page)
{
BYTE *pDefData, *pWMask, *pRMask, Mask;
BYTE i,j,Index;
WORD PageIndex;
BYTE prev_data;
volatile BYTE value;
//link data
switch(page) {
case 0: pDefData = DefPage0Regs; pWMask = RegMask_W_Page0; pRMask = RegMask_R_Page0; break;
case 1: pDefData = DefPage1Regs; pWMask = RegMask_W_Page1; pRMask = RegMask_R_Page1; break;
case 2: pDefData = DefPage2Regs; pWMask = RegMask_W_Page2; pRMask = RegMask_R_Page2; break;
case 3: pDefData = DefPage3Regs; pWMask = RegMask_W_Page3; pRMask = RegMask_R_Page3; break;
case 4: pDefData = DefPage4Regs; pWMask = RegMask_W_Page4; pRMask = RegMask_R_Page4; break;
case 5: pDefData = DefPage5Regs; pWMask = RegMask_W_Page5; pRMask = RegMask_R_Page5; break;
}
Printf("\nPage:%bd================", page);
for(i=0; i < 16; i++ ) {
for(j=0; j < 16; j++) {
//default value check
Index = i*16+j;
PageIndex = ((WORD)page << 8) + Index;
Mask = pWMask[Index] | pRMask[Index];
if(pWMask[Index]) {
Printf("\nREG%01bx%02bx WMask:%02bx RMask:%02bx Def:%02bx",page, Index, pWMask[Index], pRMask[Index], pDefData[Index]);
value = ReadTW88(PageIndex);
if((value & Mask) != (pDefData[Index] & Mask)) {
Printf(" Read:%02bx", value);
}
}
else if(pRMask[Index]) {
//read only.
Printf("\nREG%01bx%02bx WMask:%02bx RMask:%02bx Def:__",page, Index, pWMask[Index], pRMask[Index]);
value = ReadTW88(PageIndex);
Printf(" Read:%02bx", value);
}
else if(pDefData[Index]==0xBF) {
value = ReadTW88(PageIndex);
if(value != 0xBF) {
Printf("\nREG%01bx%02bx BF. Read:%02bx", page, Index, value);
WriteTW88(PageIndex, 0xFF);
value = ReadTW88(PageIndex);
if(value != 00) {
Printf("\nREG%01bx%02bx BF. but writable.", page, Index);
}
}
else {
//assume NO register.
}
}
//skip
if(PageIndex == REG4E1) { //it is a clock
Puts("->skip");
continue;
}
//write test
if(pWMask[Index]) {
prev_data = ReadTW88(PageIndex);
WriteTW88(PageIndex, 0x00);
value = ReadTW88(PageIndex);
if(value != 0x00) {
//Printf(" REG%01bx%02bx W:00 R:%02bx", page,Index,value);
Printf(" W:00_R:%02bx", value);
}
WriteTW88(PageIndex, 0xFF & pWMask[Index]);
value = ReadTW88(PageIndex);
if((value & pWMask[Index]) != (0xFF & pWMask[Index])) {
//Printf(" REG%01bx%02bx W:%02bx R:%02bx", page,Index, pWMask[Index], value);
Printf(" W:%02bx_R:%02bx", pWMask[Index], value);
}
WriteTW88(PageIndex,prev_data);
}
}
}
}
