int main() {
init_platform();
// Initialize the GPIO peripherals.
XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
interrupts_init();
print("made it past interrupts_init\n\r");
// apparently we don't need to init it, just HardReset
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_ExtendedAudioStat, 1);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_PCM_DAC_Rate, AC97_PCM_RATE_11025_HZ);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_MasterVol, AC97_VOL_MAX);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_PCMOutVol, AC97_VOL_MAX);
while (1);
cleanup_platform();
return 0;
}
/* Audio Interrup Activation
\param[in] Xuint32 ac97
*/
void audio_enable_interrupt(Xuint32 ac97) {
int i = 16;
XAC97_SoftReset(ac97);
while (i--)
XAC97_WriteFifo(ac97, 0x00FF00FF);
XAC97_mSetControl(ac97, AC97_ENABLE_OUT_FIFO_INTERRUPT);
}
int interruptManager (unsigned int * framePointer0) {
init_platform();
// Initialize the GPIO peripherals.
int success;
// Used for CPU utilization. Uncomment if desired
// XTmrCtr_Initialize(instPtr, 0);
success = XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
// Reset the XAC97 Chip
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XAC97_mSetControl(AC97_ExtendedAudioStat, AC97_EXTENDED_AUDIO_CONTROL_VRA);
setVolLevel(AC97_VOL_MAX);
clearAllSounds();
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK | XPAR_AXI_AC97_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
// Uncomment for CPU utilization stats
/*XTmrCtr Timer;
XTmrCtr *instPtr = &Timer;
XTmrCtr_Initialize(instPtr, 0);
XTmrCtr_Start(instPtr, 0);*/
while(!isEndOfGame()); // Program never ends.
// Uncomment for CPU utilization stats
/*XTmrCtr_Stop(instPtr, 0);
int val = (int) XTmrCtr_GetValue(instPtr, 0);
xil_printf("%d\n\r", val);*/
clearAllSounds();
XAC97_ClearFifos(XPAR_AXI_AC97_0_BASEADDR);
drawGameOver();
cleanup_platform();
return 0;
}
// Inits the AC97. Note: you must also enable interrupts by either calling
// sound_initInterupts, or create your own interrupt handler routine.
void sound_initAC97()
{
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_ClearFifos(XPAR_AXI_AC97_0_BASEADDR);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_ExtendedAudioStat, AC97_EXTENDED_AUDIO_CONTROL_VRA);
XAC97_AwaitCodecReady(XPAR_AXI_AC97_0_BASEADDR);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_PCM_DAC_Rate, AC97_PCM_RATE_11025_HZ);
XAC97_AwaitCodecReady(XPAR_AXI_AC97_0_BASEADDR);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XAC97_Delay(100000);
}
// This function writes data to the XAC97.
void fifo_writer(int* array, int frameNums){
int diff;
if (indexInArray == 0){ // This means that the function will begin playing a new sound
pointInArray = array; // The pointInArray iterator is set to the beginning of the sound array
setSwitchContext(false); // Disable the ability to assign new sound flags
}
if (indexInArray + XAC97_FIFO_BUFFER_SIZE >= frameNums){ // This means we've reached the end of a sound data array
diff = indexInArray + XAC97_FIFO_BUFFER_SIZE - frameNums; // This is the number of array locations to the end of the array
XAC97_PlayAudio(XPAR_AXI_AC97_0_BASEADDR, pointInArray, pointInArray+diff); // Play the audio
pointInArray = array; // Reset the point in the array
indexInArray = 0; // Reset the index in the array
setSwitchContext(true); // Allow other sound flags to be set
clearAllSounds(); // Clear all sounds (except for the saucerHighPitch)
XAC97_ClearFifos(XPAR_AXI_AC97_0_BASEADDR); // Clear the FIFO of all data
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT); // Re-enable interrupts
} else {
XAC97_PlayAudio(XPAR_AXI_AC97_0_BASEADDR, pointInArray, pointInArray+XAC97_FIFO_BUFFER_SIZE);// This means we're in the middle of a sound data array
pointInArray += XAC97_FIFO_BUFFER_SIZE; // Increment the pointInArray by how much was written to FIFO
indexInArray += XAC97_FIFO_BUFFER_SIZE; // Increment the indexInArray by how much was written to FIFO
}
}
void interrupts_init() {
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
// Enable interrupts from FIT, GPIO block, and AC97
// XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
// (XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
// | XPAR_AXI_AC97_0_INTERRUPT_MASK));
// Enable interrupts from the PIT, GPIO block, and AC97
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_PIT_0_MYINTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
| XPAR_AXI_AC97_0_INTERRUPT_MASK | XPAR_DMA_CTRL_0_INTERRUPT_MASK));
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
pit_load_value(1000000);
pit_enable_load();
pit_enable_count();
pit_enable_interrupts();
microblaze_enable_interrupts();
}
void Foliage::SoundManager::init()
{
// hard reset & initialization
XAC97_HardReset(XPAR_AUDIO_CODEC_BASEADDR);
XAC97_InitAudio(XPAR_AUDIO_CODEC_BASEADDR, AC97_ANALOG_LOOPBACK);
XAC97_DisableInput(XPAR_AUDIO_CODEC_BASEADDR, AC97_MIC_INPUT);
XAC97_DisableInput(XPAR_AUDIO_CODEC_BASEADDR, AC97_LINE_INPUT);
XAC97_AwaitCodecReady(XPAR_AUDIO_CODEC_BASEADDR);
// volume settings
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_MasterVol, AC97_VOL_MAX);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_AuxOutVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_MasterVolMono, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_PCBeepVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_PhoneInVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_MicVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_LineInVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_CDVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_VideoVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_AuxInVol, AC97_VOL_MUTE);
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_PCMOutVol, AC97_VOL_MAX);
XAC97_AwaitCodecReady(XPAR_AUDIO_CODEC_BASEADDR);
// VRA mode OFF
XAC97_WriteReg(XPAR_AUDIO_CODEC_BASEADDR, AC97_ExtendedAudioStat, 0);
// clear FIFOs
XAC97_ClearFifos(XPAR_AUDIO_CODEC_BASEADDR);
// interrupt
XIntc_RegisterHandler(XPAR_OPB_INTC_0_BASEADDR,
XPAR_OPB_INTC_0_AUDIO_CODEC_INTERRUPT_INTR,
(XInterruptHandler)Foliage::SoundManager::AC97_Callback,
NULL);
XAC97_mSetControl(XPAR_AUDIO_CODEC_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
std::cout << " * sound manager initialized" << std::endl;
}
int main()
{
init_platform();
//verbose = 1;
xil_printf("\n\rLoading Sounds and initializing hardware...\n\r");
loadWaveFiles();
initializeAC97();
xil_printf("Playing Sound\r\n");
microblaze_enable_interrupts();
microblaze_register_handler((XInterruptHandler) AC97_InterruptHandler, NULL);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XIntc_EnableIntr(XPAR_INTC_SINGLE_BASEADDR, XPAR_AXI_AC97_0_INTERRUPT_MASK);
XIntc_MasterEnable(XPAR_INTC_SINGLE_BASEADDR);
//xil_printf("Current Wave = %08x, CurrentAddress = %08x, CurrentStopAddress =%08x\r\n", CurrentWave, CurrentWave->ddrCurrentAddress, CurrentWave->ddrStopAddress );
while(1){
xil_printf("Please Select a Sound Effect (0-9)\r\n");
char ch;
read(0,&ch, 1);
switch(ch){
case '0':
playWaveFile(&DarthVader);
break;
case '1':
playWaveFile(&BaseHit);
break;
case '2':
playWaveFile(&InvHit);
break;
case '3':
playWaveFile(&UFO);
break;
case '4':
playWaveFile(&UFOHit);
break;
case '5':
playWaveFile(&Shot);
break;
case '6':
playWaveFile(&Walk1);
break;
case '7':
playWaveFile(&Walk2);
break;
case '8':
playWaveFile(&Walk3);
break;
case '9':
playWaveFile(&Walk4);
break;
}
}
//Xuint32 Current_Mode = Check_Initial_Mode (XPAR_QUAD_SPI_IF_0_BASEADDR);
//u32 testResult = Quad_SPI_Flash_Test (XPAR_QUAD_SPI_IF_0_BASEADDR);
//xil_printf("Quad_SPI_Flash Test Result %08X.\r\n", testResult);
//u8 ReadByte = Read_Flash_8(XPAR_QUAD_SPI_IF_0_BASEADDR, 0x00000000);
//xil_printf("I read Byte %2X, from the SPI Flash.\r\n", ReadByte);
//u32 FLASH_ID = Manufact_ID (XPAR_QUAD_SPI_IF_0_BASEADDR);
//xil_printf("Flash ID is: %08x.\r\n", FLASH_ID);
//for(i = 0; i<256; i++){
// data[i]=i;
// }
//Page_Program (XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0, 256, data);
//Fast_Read(XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0x00C00000, 256, 10, data1);
//Fast_Read(XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0x00C00000, 256, 10, data2);
//Page_Program (XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0, 256, data);
// for(i = 0; i<256; i++){
// xil_printf("%02x %02x\r\n", data1[i], data2[i]);
//}
//while(1) XAC97_WriteFifo(XPAR_AC97_PLB_CONTROLLER_0_BASEADDR, 0x0);
//xil_printf("Final i: %d", i);
cleanup_platform();
return 0;
}
void Foliage::SoundManager::disableSound()
{
XAC97_mSetControl(XPAR_AUDIO_CODEC_BASEADDR, 0);
std::cout << "LEAF_sound: sound disabled" << std::endl;
}