int main()
{
XCsuDma_Config *Config;
s32 Status;
u32 Index;
u8 EncData[XSECURE_DATA_SIZE + XSECURE_SECURE_GCM_TAG_SIZE]__attribute__ ((aligned (64)));
init_platform();
print("Adiuvo Engineering & Training AES CSU Example \n\r");
Config = XCsuDma_LookupConfig(XSECURE_CSUDMA_DEVICEID);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XCsuDma_CfgInitialize(&CsuDma, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
XSecure_AesInitialize(&Secure_Aes, &CsuDma,
XSECURE_CSU_AES_KEY_SRC_KUP,
(u32 *)Iv, (u32 *)Key);
xil_printf("Data to be encrypted: \n\r");
for (Index = 0; Index < XSECURE_DATA_SIZE; Index++) {
xil_printf("%02x", Data[Index]);
}
xil_printf( "\r\n\n");
XSecure_AesEncryptInit(&Secure_Aes, EncData, XSECURE_DATA_SIZE);
XSecure_AesEncryptUpdate(&Secure_Aes, Data, XSECURE_DATA_SIZE);
xil_printf("Encrypted data: \n\r");
for (Index = 0; Index < XSECURE_DATA_SIZE; Index++) {
xil_printf("%02x", EncData[Index]);
}
xil_printf( "\r\n");
xil_printf("GCM tag: \n\r");
for (Index = 0; Index < XSECURE_SECURE_GCM_TAG_SIZE; Index++) {
xil_printf("%02x", EncData[XSECURE_DATA_SIZE + Index]);
}
xil_printf( "\r\n\n");
cleanup_platform();
return 0;
}
/**
*
* This function performs data transfer in loop back mode in polled mode
* and verify the data.
*
* @param DeviceId is the XPAR_<CSUDMA Instance>_DEVICE_ID value from
* xparameters.h.
*
* @return
* - XST_SUCCESS if successful.
* - XST_FAILURE if failed.
*
* @note None.
*
******************************************************************************/
int XCsuDma_PolledExample(u16 DeviceId)
{
int Status;
XCsuDma_Config *Config;
u32 Index = 0;
u32 *SrcPtr = (u32 *)SRC_ADDR;
u32 *DstPtr = (u32 *)DST_ADDR;
u32 Test_Data = 0xABCD1234;
u32 *Ptr = (u32 *)SRC_ADDR;
u32 EnLast = 0;
/*
* Initialize the CsuDma driver so that it's ready to use
* look up the configuration in the config table,
* then initialize it.
*/
Config = XCsuDma_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XCsuDma_CfgInitialize(&CsuDma, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Performs the self-test to check hardware build.
*/
Status = XCsuDma_SelfTest(&CsuDma);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Setting CSU_DMA in loop back mode.
*/
Xil_Out32(XCSU_BASEADDRESS + CSU_SSS_CONFIG_OFFSET,
((Xil_In32(XCSU_BASEADDRESS + CSU_SSS_CONFIG_OFFSET) & 0xF0000) |
CSUDMA_LOOPBACK_CFG));
/* Data writing at source address location */
for(Index = 0; Index < SIZE; Index++)
{
*Ptr = Test_Data;
Test_Data += 0x1;
Ptr++;
}
/* Data transfer in loop back mode */
XCsuDma_Transfer(&CsuDma, XCSUDMA_DST_CHANNEL, DST_ADDR, SIZE, EnLast);
XCsuDma_Transfer(&CsuDma, XCSUDMA_SRC_CHANNEL, SRC_ADDR, SIZE, EnLast);
/* Polling for transfer to be done */
XCsuDma_WaitForDone(&CsuDma, XCSUDMA_DST_CHANNEL);
/* To acknowledge the transfer has completed */
XCsuDma_IntrClear(&CsuDma, XCSUDMA_SRC_CHANNEL, XCSUDMA_IXR_DONE_MASK);
XCsuDma_IntrClear(&CsuDma, XCSUDMA_DST_CHANNEL, XCSUDMA_IXR_DONE_MASK);
/*
* Verifying data of transfered by comparing data at source
* and address locations.
*/
for (Index = 0; Index < SIZE; Index++) {
if (*SrcPtr != *DstPtr) {
return XST_FAILURE;
}
else {
SrcPtr++;
DstPtr++;
}
}
return XST_SUCCESS;
}
/**
*
* This function performs data transfer in loop back mode in interrupt mode
* and verify the data.
*
* @param DeviceId is the XPAR_<CSUDMA Instance>_DEVICE_ID value from
* xparameters.h.
*
* @return
* - XST_SUCCESS if successful.
* - XST_FAILURE if failed.
*
* @note None.
*
******************************************************************************/
int XCsuDma_IntrExample(u16 DeviceId)
{
int Status;
XCsuDma_Config *Config;
u32 Index = 0;
u32 *SrcPtr = (u32 *)SRC_ADDR;
u32 *DstPtr = (u32 *)DST_ADDR;
u32 Test_Data = 0xABCD1234;
u32 *Ptr = (u32 *)SRC_ADDR;
u32 EnLast = 0;
/*
* Initialize the CsuDma driver so that it's ready to use
* look up the configuration in the config table,
* then initialize it.
*/
Config = XCsuDma_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XCsuDma_CfgInitialize(&CsuDma, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Performs the self-test to check hardware build.
*/
Status = XCsuDma_SelfTest(&CsuDma);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect to the interrupt controller.
*/
Status = SetupInterruptSystem(&Intc, &CsuDma,
INTG_CSUDMA_INTR_DEVICE_ID);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/* Enable interrupts */
XCsuDma_EnableIntr(&CsuDma, XCSUDMA_DST_CHANNEL,
XCSUDMA_IXR_DONE_MASK);
/*
* Setting CSU_DMA in loop back mode.
*/
Xil_Out32(XCSU_BASEADDRESS + CSU_SSS_CONFIG_OFFSET,
(Xil_In32(XCSU_BASEADDRESS + CSU_SSS_CONFIG_OFFSET) |
CSUDMA_LOOPBACK_CFG));
/* Data writing at source address location */
for(Index = 0; Index < SIZE; Index++)
{
*Ptr = Test_Data;
Test_Data += 0x1;
Ptr++;
}
/* Data transfer in loop back mode */
XCsuDma_Transfer(&CsuDma, XCSUDMA_DST_CHANNEL, DST_ADDR, SIZE, EnLast);
XCsuDma_Transfer(&CsuDma, XCSUDMA_SRC_CHANNEL, SRC_ADDR, SIZE, EnLast);
/* Wait for generation of destination work is done */
while(DstDone == 0);
/* Disable interrupts */
XCsuDma_DisableIntr(&CsuDma, XCSUDMA_DST_CHANNEL,
XCSUDMA_IXR_DONE_MASK);
/* To acknowledge the transfer has completed */
XCsuDma_IntrClear(&CsuDma, XCSUDMA_SRC_CHANNEL, XCSUDMA_IXR_DONE_MASK);
XCsuDma_IntrClear(&CsuDma, XCSUDMA_DST_CHANNEL, XCSUDMA_IXR_DONE_MASK);
/*
* Verifying data of transfered by comparing data at
* source and address locations.
*/
for (Index = 0; Index < SIZE; Index++) {
if (*SrcPtr != *DstPtr) {
return XST_FAILURE;
}
else {
SrcPtr++;
DstPtr++;
}
}
return XST_SUCCESS;
}
