/**
*
* This function reads a frame from the device as an example using polled mode.
*
* @param DeviceId is the XPAR_<HWICAP_INSTANCE>_DEVICE_ID value from
* xparameters.h
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE
*
* @note None
*
****************************************************************************/
int HwIcapReadFramePolledExample(u16 DeviceId)
{
int Status;
u32 Index;
XHwIcap_Config *CfgPtr;
u32 FrameData[XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME];
/*
* Initialize the HwIcap instance.
*/
CfgPtr = XHwIcap_LookupConfig(DeviceId);
if (CfgPtr == NULL) {
return XST_FAILURE;
}
Status = XHwIcap_CfgInitialize(&HwIcap, CfgPtr, CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XHwIcap_SelfTest(&HwIcap);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Read the Frame
*/
Status = XHwIcap_DeviceReadFrame(&HwIcap,
HWICAP_EXAMPLE_TOP,
HWICAP_EXAMPLE_BLOCK,
HWICAP_EXAMPLE_HCLK,
HWICAP_EXAMPLE_MAJOR,
HWICAP_EXAMPLE_MINOR,
(u32 *) &FrameData[0]);
if (Status != XST_SUCCESS) {
printf("Failed to Read Frame: %d \r\n", Status);
return XST_FAILURE;
}
/*
* Print Frame contents
*/
for (Index = XHI_NUM_FRAME_WORDS;
Index < (XHI_NUM_FRAME_WORDS << 1) ; Index++) {
printf("Frame Word %d -> \t %x \r\n",
(Index - XHI_NUM_FRAME_WORDS) , FrameData[Index]);
}
printf("\r\nHwIcapReadFramePolledExample Passed Successfully.\r\n\r\n");
return XST_SUCCESS;
}
/**
*
* The purpose of this function is to illustrate the usage of the HwIcap driver.
*
* @param HwIcapDeviceId is device ID of the XHwIcap Device, typically
* XPAR_<HWICAP_instance>_DEVICE_ID value from xparameters.h
*
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
*
* @note None.
*
****************************************************************************/
int HwIcapTestAppExample(u16 HwIcapDeviceId)
{
int Status;
XHwIcap_Config *ConfigPtr;
u32 ConfigRegData;
/*
* Initialize the HwIcap driver.
*/
ConfigPtr = XHwIcap_LookupConfig(HwIcapDeviceId);
if (ConfigPtr == NULL) {
return XST_FAILURE;
}
Status = XHwIcap_CfgInitialize(&HwIcap, ConfigPtr,
ConfigPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XHwIcap_SelfTest(&HwIcap);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Read the ID Code register inside the FPGA.
*/
Status = XHwIcap_GetConfigReg(&HwIcap, XHI_IDCODE, &ConfigRegData);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
return XST_SUCCESS;
}
///
/// Initialize the ICAP
///
void icap_init(void){
CYG_REPORT_FUNCTION();
XStatus Status;
icap_config = XHwIcap_LookupConfig(HWICAP_DEVICEID);
Status = XHwIcap_CfgInitialize(&HwIcap, &icap_config, icap_config->BaseAddress);
if (Status != XST_SUCCESS)
{
switch (Status) {
case XST_INVALID_PARAM:
diag_printf("HWICAP: invalid parameter\n");
break;
case XST_FAILURE:
diag_printf("HWICAP: failure\n");
break;
case XST_DEVICE_IS_STARTED:
diag_printf("HWICAP: device already started\n");
break;
case XST_DEVICE_NOT_FOUND:
diag_printf("HWICAP: device not found\n");
break;
default:
diag_printf("HWICAP: failed with return value %d\n", Status);
}
CYG_FAIL("failed to initialize icap\naborting\n");
}
// Run self test
Status = XHwIcap_SelfTest(&HwIcap);
if (Status != XST_SUCCESS) {
CYG_FAIL("HWICAP: self-test failed\n");
}
cyg_mutex_init(&icap_mutex);
CYG_REPORT_RETURN();
}
/**
*
* This function does a minimal test on the HwIcap device and driver as a
* design example. The purpose of this function is to illustrate how to use
* the XHwIcap component using the interrupt mode.
*
* This function sends data and expects to receive the same data.
*
*
* @param IntcInstancePtr is a pointer to the instance of the INTC component.
* @param HwIcapInstancePtr is a pointer to the instance of HwIcap component.
* @param HwIcapDeviceId is the Device ID of the HwIcap Device and is the
* XPAR_<HWICAP_instance>_DEVICE_ID value from xparameters.h.
* @param HwIcapIntrId is the interrupt Id and is typically
* XPAR_<INTC_instance>_<HWICAP_instance>_IP2INTC_IRPT_INTR
* value from xparameters.h .
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note
*
* This function contains an infinite loop such that if interrupts are not
* working it may never return.
*
******************************************************************************/
int HwIcapIntrExample(XIntc *IntcInstancePtr, XHwIcap *HwIcapInstancePtr,
u16 HwIcapDeviceId, u16 HwIcapIntrId)
{
int Status;
u32 Count;
u8 Test;
XHwIcap_Config *ConfigPtr;
/*
* Initialize the HwIcap driver.
*/
ConfigPtr = XHwIcap_LookupConfig(HwIcapDeviceId);
if (ConfigPtr == NULL) {
return XST_FAILURE;
}
Status = XHwIcap_CfgInitialize(HwIcapInstancePtr,
ConfigPtr,
ConfigPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XHwIcap_SelfTest(HwIcapInstancePtr);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the HwIcap device to the interrupt subsystem such that
* interrupts can occur. This function is application specific.
*/
Status = HwIcapSetupInterruptSystem(IntcInstancePtr,
HwIcapInstancePtr,
HwIcapIntrId);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Setup the handler for the HwIcap that will be called from the
* interrupt context when an HwIcap status occurs, specify a pointer
* to the HwIcap driver instance as the callback reference so the
* handler is able to access the instance data.
*/
XHwIcap_SetInterruptHandler(HwIcapInstancePtr, HwIcapInstancePtr,
(XHwIcap_StatusHandler)HwIcapIntrHandler);
/*
* Initialize the write buffer with pattern to write.
*/
for (Count = 0; Count < TEST_WRITE_BUFFER_SIZE;) {
WriteBuffer[Count++] = XHI_DUMMY_PACKET;
WriteBuffer[Count++] = XHI_SYNC_PACKET;
WriteBuffer[Count++] = XHwIcap_Type1Read(XHI_IDCODE) | 1;
WriteBuffer[Count++] = XHI_NOOP_PACKET;
WriteBuffer[Count++] = XHI_NOOP_PACKET;
WriteBuffer[Count++] = XHI_DUMMY_PACKET;
WriteBuffer[Count++] = XHI_SYNC_PACKET;
WriteBuffer[Count++] = XHwIcap_Type1Read(XHI_COR) | 1;
WriteBuffer[Count++] = XHI_NOOP_PACKET;
WriteBuffer[Count++] = XHI_NOOP_PACKET;
}
/*
* Enable the Write FIFO Half Full Interrupt.
*/
XHwIcap_IntrEnable(HwIcapInstancePtr, XHI_IPIXR_WRP_MASK);
/*
* Write the the data to the device.
*/
TransferInProgress = TRUE;
Status = XHwIcap_DeviceWrite(HwIcapInstancePtr,
(u32 *) &WriteBuffer[0],
TEST_WRITE_BUFFER_SIZE);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Wait for the data to be written to the device.
*/
while (TransferInProgress);
return XST_SUCCESS;
}
/**
*
* This function reads the configuration registers inside the FPGA.
*
* @param DeviceId is the XPAR_<HWICAP_INSTANCE>_DEVICE_ID value from
* xparameters.h.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
******************************************************************************/
int HwIcapReadConfigRegExample(u16 DeviceId)
{
int Status;
XHwIcap_Config *CfgPtr;
u32 ConfigRegData;
/*
* Initialize the HwIcap instance.
*/
CfgPtr = XHwIcap_LookupConfig(DeviceId);
if (CfgPtr == NULL) {
return XST_FAILURE;
}
Status = XHwIcap_CfgInitialize(&HwIcap, CfgPtr, CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Run the Self test.
*/
Status = XHwIcap_SelfTest(&HwIcap);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
printf("Value of the Configuration Registers. \r\n\r\n");
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CRC, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CRC -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_FAR, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" FAR -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_FDRI, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" FDRI -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_FDRO, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" FDRO -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CMD, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CMD -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CTL, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CTL -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_MASK, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" MASK -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_STAT, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" STAT -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_LOUT, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" LOUT -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" COR -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_MFWR, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" MFWR -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CBC, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CBC -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_AXSS, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" AXSS -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_IDCODE, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" IDCODE -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR_1, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" COR_1 -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CSOB, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CSOB -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_WBSTAR, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" WBSTAR -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_TIMER, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" TIMER -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_BOOTSTS, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" BOOTSTS -> \t %x \t\r\n", ConfigRegData);
}
if (XHwIcap_GetConfigReg(&HwIcap, XHI_CTL_1, (u32 *)&ConfigRegData) ==
XST_SUCCESS) {
printf(" CTL_1 -> \t %x \t\r\n", ConfigRegData);
}
printf("\r\n HwIcapReadConfigRegExample Passed Successfully.\r\n\r\n");
return XST_SUCCESS;
}
// Initialize all of the PR data
void init_PR_data() {
// Initialize the ICAP
hthread_mutexattr_t attr;
if (hthread_mutexattr_init(&attr)) {
printf("Error intializing mutex attribute\n");
while(1);
}
// Set MID to maximum ID allowed
if (hthread_mutexattr_setnum(&attr,(Huint) HT_SEM_MAXNUM)) {
printf("Error setting MID (%u) for mutex attribute\n", HT_SEM_MAXNUM);
while(1);
}
if(hthread_mutex_init(&icap_mutex, &attr)) {
printf("error initializing icap mutex\n");
while(1);
}
#ifdef ICAP
// Initialize the ICAP
if(XHwIcap_CfgInitialize(&HwIcap, (XHwIcap_Config *) 0x1, ICAP_BASEADDR)) {
printf("Error initializing the ICAP\n");
while(1);
}
// Initialize the pointers
// init CRC
crc_bit[0] = (unsigned char *) (&crc0_bit[0]);
crc_bit[1] = (unsigned char *) (&crc1_bit[0]);
crc_bit[2] = (unsigned char *) (&crc2_bit[0]);
crc_bit[3] = (unsigned char *) (&crc3_bit[0]);
crc_bit[4] = (unsigned char *) (&crc4_bit[0]);
crc_bit[5] = (unsigned char *) (&crc5_bit[0]);
// init sort
sort_bit[0] = (unsigned char *) (&sort0_bit[0]);
sort_bit[1] = (unsigned char *) (&sort1_bit[0]);
sort_bit[2] = (unsigned char *) (&sort2_bit[0]);
sort_bit[3] = (unsigned char *) (&sort3_bit[0]);
sort_bit[4] = (unsigned char *) (&sort4_bit[0]);
sort_bit[5] = (unsigned char *) (&sort5_bit[0]);
// init vector
vector_bit[0] = (unsigned char *) (&vector0_bit[0]);
vector_bit[1] = (unsigned char *) (&vector1_bit[0]);
vector_bit[2] = (unsigned char *) (&vector2_bit[0]);
vector_bit[3] = (unsigned char *) (&vector3_bit[0]);
vector_bit[4] = (unsigned char *) (&vector4_bit[0]);
vector_bit[5] = (unsigned char *) (&vector5_bit[0]);
// Create accelerate profiles - containers that hold
// pointers to each accelerator specific for each slave.
unsigned int i;
for (i = 0; i < NUM_AVAILABLE_HETERO_CPUS; i++) {
set_accelerator_structure((accelerator_list_t *) &accelerator_list[i], i);
// -------------------------------------------------------------- //
// Write extra parameters for PR functionality //
// -------------------------------------------------------------- //
_hwti_set_accelerator_ptr((Huint) hwti_array[i], (Huint)&accelerator_list[i]);
// Write the ICAP Mutex
_hwti_set_icap_mutex( (Huint) hwti_array[i], (Huint) &icap_mutex);
// Write the ICAP Data Strucutre
_hwti_set_icap_struct_ptr( (Huint) hwti_array[i], (Huint) &HwIcap);
// Write pointer for last_used_accelerator so slave can update the table
_hwti_set_last_accelerator_ptr( (Huint) hwti_array[i], (Huint) &slave_table[i].last_used_acc);
// Write pointer to tuning_table
_hwti_set_tuning_table_ptr((Huint) hwti_array[i], (Huint) &tuning_table);
}
#endif
// Reset thread create statistical data
no_free_slaves_num = 0;
possible_slaves_num = 0;
best_slaves_num = 0;
}
/**
*
* This function does a test on the BRAM FF as an example.
*
* @param DeviceId is the XPAR_<HWICAP_INSTANCE>_DEVICE_ID value from
* xparameters.h
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE
*
* @note None
*
****************************************************************************/
int HwIcapBramFfExample(u16 DeviceId)
{
u32 SrMode=0;
int Status;
u32 Row;
u32 Col;
u32 Slice;
u32 Loop;
u32 Value;
u8 Contents[1];
XHwIcap_Config *CfgPtr;
/*
* Initialize the HwIcap instance.
*/
CfgPtr = XHwIcap_LookupConfig(DeviceId);
if (CfgPtr == NULL) {
return XST_FAILURE;
}
Status = XHwIcap_CfgInitialize(&HwIcap, CfgPtr, CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Identify the FF to change: FFX in SLICE_X0Y0.
*/
Col = XHwIcap_SliceX2Col(HWICAP_EXAMPLE_TEST_COL);
Row = XHwIcap_SliceY2Row(&HwIcap, HWICAP_EXAMPLE_TEST_ROW);
Slice = XHwIcap_SliceXY2Slice(HWICAP_EXAMPLE_TEST_COL,
HWICAP_EXAMPLE_TEST_ROW);
printf("Setting the SRMODE -> SRHIGH. \r\n");
Status = XHwIcap_SetClbBits(&HwIcap, Row, Col,
XHI_CLB_FF.SRMODE[Slice][XHI_CLB_XQ], XHI_CLB_FF.SRHIGH, 1);
if (Status != XST_SUCCESS) {
printf("Failed to Set SRMODE->SRHIGH: %d \r\n", Status);
return XST_FAILURE;
}
printf("Setting the SRMODE -> SRLOW. \r\n");
Status = XHwIcap_SetClbBits(&HwIcap, Row, Col,
XHI_CLB_FF.SRMODE[Slice][XHI_CLB_XQ], XHI_CLB_FF.SRLOW, 1);
if (Status != XST_SUCCESS) {
printf("Failed to Set SRMODE->SRLOW: %d \r\n", Status);
return XST_FAILURE;
}
printf("Set SRINV to SR \r\n");
Status = XHwIcap_SetClbBits(&HwIcap, Row, Col,
XHI_CLB_SRINV.RES[Slice], XHI_CLB_SRINV.SR, 1);
if (Status != XST_SUCCESS) {
printf("Failed to Set SRINV->SR: %d \r\n", Status);
return XST_FAILURE;
}
/*
* Set it back
*/
printf("Set SRINV to SR_B \r\n");
Status = XHwIcap_SetClbBits(&HwIcap, Row, Col,
XHI_CLB_SRINV.RES[Slice], XHI_CLB_SRINV.SR_B, 1);
if (Status != XST_SUCCESS) {
printf("Failed to Set SRINV->SR_B: %d \r\n", Status);
return XST_FAILURE;
}
/*
* Capture the FF states. If the CAPTURE block is instantiated in
* the design then the XHwIcap_CommandCapture() is not necessary.
*/
printf("Capture the FF state. \r\n");
Status = XHwIcap_CommandCapture(&HwIcap);
if (Status != XST_SUCCESS) {
printf("Failed to capture FF states: %d \r\n", Status);
return XST_FAILURE;
}
/*
* Read the FF Contents
*/
Status = XHwIcap_GetClbBits(&HwIcap, Row, Col,
XHI_CLB_FF.CONTENTS[Slice][XHI_CLB_XQ],
Contents, 1);
if (Status != XST_SUCCESS) {
printf("Failed to Get FF Contents: %d \r\n", Status);
return XST_FAILURE;
}
/*
* The readback value of the FF is inverted from its true value.
*/
Value = ~Contents[0] & 0x1;
printf("FF Contents: %d \r\n", Value);
printf("HwicapBramFFExample Passed Successfully ... \r\n\r\n");
return XST_SUCCESS;
}
