/** * * Reads one frame from the device and puts it in the storage buffer. * * @param InstancePtr - a pointer to the XHwIcap instance to be worked on. * * @param Block - Block Address (XHI_FAR_CLB_BLOCK, * XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK) * * @param MajorFrame - selects the column * * @param MinorFrame - selects frame inside column * * @return XST_SUCCESS, XST_BUFFER_TOO_SMALL or XST_INVALID_PARAM. * * @note None. * *****************************************************************************/ XStatus XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, s32 Block, s32 MajorFrame, s32 MinorFrame) { s32 Packet; s32 Data; s32 TotalWords; XStatus Status; /* Make sure we aren't trying to read more than what we have room * for. */ if (InstancePtr->BytesPerFrame > (XHI_MAX_BUFFER_BYTES-XHI_HEADER_BUFFER_BYTES)) { return XST_BUFFER_TOO_SMALL; } /* DUMMY and SYNC */ XHwIcap_StorageBufferWrite(InstancePtr, 0, XHI_DUMMY_PACKET); XHwIcap_StorageBufferWrite(InstancePtr, 1, XHI_SYNC_PACKET); /* Setup CMD register to read configuration */ Packet = XHwIcap_Type1Write(XHI_CMD) | 1; Data = XHI_CMD_RCFG; XHwIcap_StorageBufferWrite(InstancePtr, 2,Packet); XHwIcap_StorageBufferWrite(InstancePtr, 3,Data); /* Setup FAR register. */ Packet = XHwIcap_Type1Write(XHI_FAR) | 1; Data = XHwIcap_SetupFar(Block, MajorFrame, MinorFrame); XHwIcap_StorageBufferWrite(InstancePtr, 4,Packet); XHwIcap_StorageBufferWrite(InstancePtr, 5,Data); /* Setup read data packet header. */ TotalWords = InstancePtr->WordsPerFrame << 1; /* mult by 2 */ /* Create Type one packet */ Packet = XHwIcap_Type1Read(XHI_FDRO) | TotalWords; XHwIcap_StorageBufferWrite(InstancePtr, 6,Packet); XHwIcap_StorageBufferWrite(InstancePtr, 7,0); /* flush */ XHwIcap_StorageBufferWrite(InstancePtr, 8,0); /* flush */ /* Write To ICAP. */ Status = XHwIcap_DeviceWrite(InstancePtr, 0, 9); if (Status != XST_SUCCESS) { return Status; } /* Read pad frame (skip header). */ Status = XHwIcap_DeviceRead(InstancePtr, XHI_HEADER_BUFFER_WORDS, InstancePtr->WordsPerFrame); if (Status != XST_SUCCESS) { return Status; } /* Read data on top of pad frame (skip header). */ Status = XHwIcap_DeviceRead(InstancePtr, XHI_HEADER_BUFFER_WORDS, InstancePtr->WordsPerFrame); if (Status != XST_SUCCESS) { return Status; } /* send DESYNC command */ Status = XHwIcap_CommandDesync(InstancePtr); if (Status != XST_SUCCESS) { return Status; } return XST_SUCCESS; };
/** * * Reads one frame from the device and puts it in memory specified by the user. * * @param InstancePtr - a pointer to the XHwIcap instance to be worked on. * @param Top - top (0) or bottom (1) half of device * @param Block - Block Address (XHI_FAR_CLB_BLOCK, * XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK) * @param HClkRow - selects the HClk Row * @param MajorFrame - selects the column * @param MinorFrame - selects frame inside column * @param FrameBuffer is a pointer to the memory where the frame read * from the device is stored * * @return XST_SUCCESS else XST_FAILURE. * * @note This is a blocking call. * *****************************************************************************/ int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameBuffer) { u32 Packet; u32 Data; u32 TotalWords; int Status; u32 WriteBuffer[READ_FRAME_SIZE]; u32 Index = 0; Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertNonvoid(FrameBuffer != NULL); /* * DUMMY and SYNC */ WriteBuffer[Index++] = XHI_DUMMY_PACKET; WriteBuffer[Index++] = XHI_SYNC_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; /* * Reset CRC */ Packet = XHwIcap_Type1Write(XHI_CMD) | 1; WriteBuffer[Index++] = Packet; WriteBuffer[Index++] = XHI_CMD_RCRC; WriteBuffer[Index++] = XHI_NOOP_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; /* * Setup CMD register to read configuration */ Packet = XHwIcap_Type1Write(XHI_CMD) | 1; WriteBuffer[Index++] = Packet; WriteBuffer[Index++] = XHI_CMD_RCFG; WriteBuffer[Index++] = XHI_NOOP_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; /* * Setup FAR register. */ Packet = XHwIcap_Type1Write(XHI_FAR) | 1; Data = XHwIcap_SetupFar(Top, Block, HClkRow, MajorFrame, MinorFrame); WriteBuffer[Index++] = Packet; WriteBuffer[Index++] = Data; /* * Setup read data packet header. * The frame will be preceeded by a dummy frame, and we need to read one * extra word for V4 and V5 devices. */ TotalWords = (InstancePtr->WordsPerFrame << 1); /* * Create Type one packet */ Packet = XHwIcap_Type1Read(XHI_FDRO) | TotalWords; WriteBuffer[Index++] = Packet; WriteBuffer[Index++] = XHI_NOOP_PACKET; WriteBuffer[Index++] = XHI_NOOP_PACKET; /* * Write the data to the FIFO and initiate the transfer of data * present in the FIFO to the ICAP device */ Status = XHwIcap_DeviceWrite(InstancePtr, (u32 *)&WriteBuffer[0], Index); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the write is done. */ while (XHwIcap_IsDeviceBusy(InstancePtr) != FALSE); /* * Read the frame of the data including the NULL frame. */ Status = XHwIcap_DeviceRead(InstancePtr, FrameBuffer, TotalWords); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Send DESYNC command */ Status = XHwIcap_CommandDesync(InstancePtr); if (Status != XST_SUCCESS) { return XST_FAILURE; } return XST_SUCCESS; };