/*
* IIC Write 2
*/
int iic_write2(XIicPs *IicPs, u8 Address, u8 Register, u8 Data) {
u8 WriteBuffer[2];
int Status;
/*
* A temporary write buffer must be used which contains both the address
* and the data to be written, put the address in first
*/
WriteBuffer[0] = Register;
WriteBuffer[1] = Data;
/*
* Wait until bus is idle to start another transfer.
*/
while (XIicPs_BusIsBusy(IicPs)) {
/* NOP */
//sleep(1);
}
/*
* Send the buffer using the IIC and check for errors.
*/
Status = XIicPs_MasterSendPolled(IicPs, WriteBuffer, 2, Address);
if (Status != XST_SUCCESS) {
myprintf("XIicPs_MasterSendPolled error!\n\r");
return XST_FAILURE;
}
return XST_SUCCESS;
}
int IicSendCommand(u8* message, int messageSize)
{
while (XIicPs_BusIsBusy(&Iic)) {
/* NOP */
}
int Status, i;
Status = XIicPs_MasterSendPolled(&Iic, message, messageSize, IIC_SLAVE_ADDR);
if (Status != XST_SUCCESS)
{
// failed at this point..
// do something about it
return -1;
}
return 0;
}
/*
* IIC Burst Write
*/
int iic_burstWrite(XIicPs *IicPs, u8 Address, u8 Register, u32 length,
unsigned char* Data) {
u8 WriteBuffer[length + 1];
int Status;
int cnt = 0;
/*
* A temporary write buffer must be used which contains both the address
* and the data to be written, put the address in first
*/
WriteBuffer[0] = Register;
memcpy(&WriteBuffer[1], Data, length);
/*
* Wait until bus is idle to start another transfer.
*/
while (XIicPs_BusIsBusy(IicPs)) {
/* NOP */
usleep(100);
cnt++;
if (cnt > IIC_TIMEOUT) {
busy = BOOL_TRUE;
return XST_DEVICE_BUSY;
}
}
/*
* Send the buffer using the IIC and check for errors.
*/
Status = XIicPs_MasterSendPolled(IicPs, WriteBuffer, length + 1, Address);
if (Status != XST_SUCCESS) {
#ifdef DEBUG
//Get Timestamp
unsigned long timestamp_ms = getElapsedRuntimeUS()/1000;
myprintf("XIicPs_MasterSendPolled error at %ds!\n\r", timestamp_ms);
#endif
return Status;
}
//print and return
//myprintf("[iic_burstWrite] 0x%02X(0x%02X)=0x%X\n\r", Address, Register, *Data);
return XST_SUCCESS;
}
/*
* IIC Write 1
*/
int iic_write1(XIicPs *IicPs, u8 Address, u8 Data) {
int Status;
/*
* Wait until bus is idle to start another transfer.
*/
while (XIicPs_BusIsBusy(IicPs)) {
/* NOP */
}
/*
* Send the buffer using the IIC and check for errors.
*/
Status = XIicPs_MasterSendPolled(IicPs, &Data, 1, Address);
if (Status != XST_SUCCESS) {
myprintf("XIicPs_MasterSendPolled error!\n\r");
return XST_FAILURE;
}
return XST_SUCCESS;
}
/**
* This function is used to perform GT configuration for ZCU102 board.
* It also provides reset to GEM, enables FMC ADJ
*
* @param none
*
* @return
* - XFSBL_SUCCESS for successful configuration
* - errors as mentioned in xfsbl_error.h
*
*****************************************************************************/
static s32 XFsbl_BoardConfig(void)
{
u8 WriteBuffer[BUF_LEN] = {0};
XIicPs_Config *I2c0CfgPtr;
s32 Status = XFSBL_SUCCESS;
u32 ICMCfg0;
u32 ICMCfg1;
/* Initialize the IIC0 driver so that it is ready to use */
I2c0CfgPtr = XIicPs_LookupConfig(XPAR_XIICPS_0_DEVICE_ID);
if (I2c0CfgPtr == NULL) {
Status = XFSBL_ERROR_I2C_INIT;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_INIT\r\n");
goto END;
}
Status = XIicPs_CfgInitialize(&I2c0InstancePtr, I2c0CfgPtr,
I2c0CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_INIT;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_INIT\r\n");
goto END;
}
/* Set the IIC serial clock rate */
XIicPs_SetSClk(&I2c0InstancePtr, IIC_SCLK_RATE_IOEXP);
/* Configure I/O pins as Output */
WriteBuffer[0] = CMD_CFG_0_REG;
WriteBuffer[1] = DATA_OUTPUT;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, IOEXPANDER1_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle to start another transfer */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/*
* Deasserting I2C_MUX_RESETB
* And GEM3 Resetb
* Selecting lanes based on configuration
*/
WriteBuffer[0] = CMD_OUTPUT_0_REG;
/* Populate WriteBuffer[1] based on ICM_CFG configuration */
ICMCfg0 = XFsbl_In32(SERDES_ICM_CFG0) &
(SERDES_ICM_CFG0_L0_ICM_CFG_MASK | SERDES_ICM_CFG0_L1_ICM_CFG_MASK);
ICMCfg1 = XFsbl_In32(SERDES_ICM_CFG1) &
(SERDES_ICM_CFG1_L2_ICM_CFG_MASK | SERDES_ICM_CFG1_L3_ICM_CFG_MASK);
if ((ICMCfg0 == ICM_CFG0_PCIE_DP) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1110 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1110_CFG;
}
else
if ((ICMCfg0 == ICM_CFG0_DP_DP) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1111 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1111_CFG;
}
else
if ((ICMCfg0 == ICM_CFG0_PCIE_PCIE) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1100 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1100_CFG;
}
else
{
/* gt0000 or no GT configuration */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_0000_CFG;
}
/* Send the Data */
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, IOEXPANDER1_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/* Change the IIC serial clock rate */
XIicPs_SetSClk(&I2c0InstancePtr, IIC_SCLK_RATE_I2CMUX);
/* Set I2C Mux for channel-2 (MAXIM_PMBUS) */
WriteBuffer[0] = CMD_CH_2_REG;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 1, PCA9544A_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/* Enable Regulator (FMC ADJ) */
WriteBuffer[0] = CMD_ON_OFF_CFG;
WriteBuffer[1] = ON_OFF_CFG_VAL;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, MAX15301_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
XFsbl_Printf(DEBUG_INFO,"Board Configuration successful \n\r");
END:
return Status;
}
int i2c_write(XIicPs* i2c_dev, uint8_t dev_id, uint8_t* buffer, int size)
{
while(XIicPs_BusIsBusy(i2c_dev));
return XIicPs_MasterSendPolled(i2c_dev, buffer, size, dev_id);
}
/*
* IIC Read 2
*/
int iic_read2(XIicPs *IicPs, u8 Address, u8 Register, u8 *Data, int ByteCount) {
int Status;
int cnt = 0;
/*
* Wait until bus is idle to start another transfer.
*/
while (XIicPs_BusIsBusy(IicPs)) {
usleep(100);
//Timeout
cnt++;
if (cnt > IIC_TIMEOUT) {
busy = BOOL_TRUE;
return XST_DEVICE_BUSY;
}
}
/*
* Set the IIC Repeated Start option.
*/
Status = XIicPs_SetOptions(IicPs, XIICPS_REP_START_OPTION);
if (Status != XST_SUCCESS) {
return Status;
}
/*
* Send the buffer using the IIC and check for errors.
*/
Status = XIicPs_MasterSendPolled(IicPs, &Register, 1, Address);
if (Status != XST_SUCCESS) {
#ifdef DEBUG
//Get Timestamp
unsigned long timestamp_ms = getElapsedRuntimeUS()/1000;
myprintf("XIicPs_MasterSendPolled error at %d ms!\n\r", timestamp_ms);
#endif
return Status;
}
/*
* Receive the data.
*/
Status = XIicPs_MasterRecvPolled(IicPs, Data, ByteCount, Address);
if (Status != XST_SUCCESS) {
#ifdef DEBUG
//Get Timestamp
unsigned long timestamp_ms = getElapsedRuntimeUS()/1000;
myprintf("XIicPs_MasterRecvPolled error at %d ms!\n\r", timestamp_ms);
#endif
return Status;
}
/*
* Clear the IIC Repeated Start option.
*/
Status = XIicPs_ClearOptions(IicPs, XIICPS_REP_START_OPTION);
if (Status != XST_SUCCESS) {
return Status;
}
//myprintf("[iic_read2] 0x%02X(0x%02X)=0x%X\n\r", Address, Register, *Data);
return XST_SUCCESS;
}
