Example #1
0
void ClearScreen(u32 lBgColor) {
	u32 ilAddr;
	
	for (ilAddr = 0; ilAddr < 1280*720; ilAddr ++) {
		XIo_Out16(XPAR_DDR2_SDRAM_MPMC_BASEADDR + ilAddr * 2, lBgColor);
	}
	
	return 0;
}
Example #2
0
/**
*
* This function sets the options for the SPI device driver. The options control
* how the device behaves relative to the SPI bus. The device must be idle
* rather than busy transferring data before setting these device options.
*
* @param    InstancePtr is a pointer to the XSpi instance to be worked on.
* @param    Options contains the specified options to be set. This is a bit
*           mask where a 1 means to turn the option on, and a 0 means to turn
*           the option off. One or more bit values may be contained in the mask.
*           See the bit definitions named XSP_*_OPTIONS in the file xspi.h.
*
* @return
*
* XST_SUCCESS if options are successfully set.  Otherwise, returns:
* - XST_DEVICE_BUSY if the device is currently transferring data. The transfer
*   must complete or be aborted before setting options.
* - XST_SPI_SLAVE_ONLY if the caller attempted to configure a slave-only
*   device as a master.
*
* @note
*
* This function makes use of internal resources that are shared between the
* XSpi_Stop() and XSpi_SetOptions() functions. So if one task might be setting
* device options options while another is trying to stop the device, the user
* is required to provide protection of this shared data (typically using a
* semaphore).
*
******************************************************************************/
XStatus XSpi_SetOptions(XSpi * InstancePtr, u32 Options)
{
	u16 ControlReg;
	int Index;

	XASSERT_NONVOID(InstancePtr != NULL);
	XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);

	/*
	 * Do not allow the slave select to change while a transfer is in progress.
	 * No need to worry about a critical section here since even if the Isr
	 * changes the busy flag just after we read it, the function will return
	 * busy and the caller can retry when notified that their current transfer
	 * is done.
	 */
	if (InstancePtr->IsBusy) {
		return XST_DEVICE_BUSY;
	}
	/*
	 * Do not allow master option to be set if the device is slave only
	 */
	if ((Options & XSP_MASTER_OPTION) && (InstancePtr->SlaveOnly)) {
		return XST_SPI_SLAVE_ONLY;
	}

	ControlReg = XIo_In16(InstancePtr->BaseAddr + XSP_CR_OFFSET);

	/*
	 * Loop through the options table, turning the option on or off
	 * depending on whether the bit is set in the incoming options flag.
	 */
	for (Index = 0; Index < XSP_NUM_OPTIONS; Index++) {
		if (Options & OptionsTable[Index].Option) {
			ControlReg |= OptionsTable[Index].Mask;	/* turn it on */
		} else {
			ControlReg &= ~OptionsTable[Index].Mask;	/* turn it off */
		}
	}

	/*
	 * Now write the control register. Leave it to the upper layers
	 * to restart the device.
	 */
	XIo_Out16(InstancePtr->BaseAddr + XSP_CR_OFFSET, ControlReg);

	return XST_SUCCESS;
}
Example #3
0
Xuint32 Read_Bitmap_Header_Bytes(Xuint32 FLASH_ADDR, Xuint32 offset)
{
Xuint32 Bitmap_Header_Data;
Xuint8 Flash_Data;

XIo_Out16 (FLASH_ADDR, 0xFF);
Flash_Data = XIo_In8(FLASH_ADDR + offset);
Bitmap_Header_Data = 0x00000000 | Flash_Data;
Flash_Data = XIo_In8(FLASH_ADDR + offset + 1);
Bitmap_Header_Data = Bitmap_Header_Data | (Flash_Data << 8);
Flash_Data = XIo_In8(FLASH_ADDR + offset + 2);
Bitmap_Header_Data = Bitmap_Header_Data | (Flash_Data << 16);
Flash_Data = XIo_In8(FLASH_ADDR + offset + 3);
Bitmap_Header_Data = Bitmap_Header_Data | (Flash_Data << 24);


}
Example #4
0
/******************************************************************************
*
* Send the specified buffer to the device that has been previously addressed
* on the IIC bus. This function assumes that the 7 bit address has been sent.
*
* @param    BaseAddress contains the base address of the IIC Device.
* @param    BufferPtr points to the data to be sent.
* @param    ByteCount is the number of bytes to be sent.
* @param    Option: XIIC_STOP = end with STOP condition, XIIC_REPEATED_START
*           = don't end with STOP condition.
*
* @return   The number of bytes remaining to be sent.
*
* @note     This function does not take advantage of the transmit Fifo because
*           it is designed for minimal code space and complexity.
*
******************************************************************************/
static unsigned DynSendData(u32 BaseAddress, u8 *BufferPtr,
			    u8 ByteCount, u8 Option)
{
	u32 IntrStatus;

	while (ByteCount > 0) {
		/*
		 * Wait for the transmit to be empty before sending any more
		 * data by polling the interrupt status register.
		 */
		while (1) {
			IntrStatus = XIIC_READ_IISR(BaseAddress);
			if (IntrStatus & (XIIC_INTR_TX_ERROR_MASK |
					  XIIC_INTR_ARB_LOST_MASK |
					  XIIC_INTR_BNB_MASK)) {
				/*
				 * Error condition (NACK or ARB Lost or BNB
				 * Error Has occurred. Clear the Control
				 * register to send a STOP condition on the Bus
				 * and return the number of bytes still to
				 * transmit.
				 */

				XIo_Out8(BaseAddress + XIIC_CR_REG_OFFSET,
					 0x03);
				XIo_Out8(BaseAddress + XIIC_CR_REG_OFFSET,
					 0x01);

				return ByteCount;
			}

			/*
			 * Check for the transmit Fifo to become Empty.
			 */
			if (IntrStatus & XIIC_INTR_TX_EMPTY_MASK) {
				break;
			}
		}

		/*
		 * Send data to Tx Fifo. If a stop condition is specified and
		 * the last byte is being sent, then set the dynamic stop bit.
		 */
		if ((ByteCount == 1) && (Option == XIIC_STOP)) {
			/*
			 * The MSMS will be cleared automatically upon setting
			 *  dynamic stop.
			 */
			XIo_Out16(BaseAddress + XIIC_DTR_REG_OFFSET - 1,
				  	XIIC_TX_DYN_STOP_MASK | *BufferPtr++);
		}
		else {
			XIo_Out8(BaseAddress + XIIC_DTR_REG_OFFSET,
				 				*BufferPtr++);
		}

		/*
		 * Update the byte count to reflect the byte sent.
		 */
		ByteCount--;
	}

	if (Option == XIIC_STOP) {
		/*
		 * If the Option is to release the bus after transmission of
		 * data, Wait for the bus to transition to not busy before
		 * returning, the IIC device cannot be disabled until this
		 * occurs.
		 */
		while (1) {
			if (XIIC_READ_IISR(BaseAddress) & XIIC_INTR_BNB_MASK) {
				break;
			}
		}
	}

	return ByteCount;
}
Example #5
0
Xuint32 Decode_display_bitmap(XTft * InstancePtr, Xuint32 FRAME_ADDR)
{

Xuint16 Flash_Data;
Xuint8  Pixel_R;
Xuint8  Pixel_G;
Xuint8  Pixel_B;
Xuint32 Pixel_Data0, Pixel_Data1, Pixel_Data2;
Xuint32 temp;
Xuint32 Pixel_Data;
Xuint32 Bitmap_File_Size;
Xuint32 Bitmap_Data_Offset;
Xuint32 Bitmap_Width_Pixels;
Xuint32 Bitmap_Height_Pixels;
Xuint16 Bitmap_Bits_Per_Pixel;
Xuint32 Bitmap_Image_Size;
Xuint32 Bytes_Per_Row;
Xuint32 MEM_ADDR;
Xuint32 MEM_HIGHADDR;

Xuint32 i, j, k;


if (verbose) xil_printf ("\r\nDecoding bitmap");

//reset FLASH to read mode
XIo_Out16 (XPAR_FLASH_MEM0_BASEADDR, 0xFF);

Flash_Data = XIo_In16(XPAR_FLASH_MEM0_BASEADDR+FLASH_START_ADDR);
if (verbose) xil_printf("\r\nFile Type is 0x%X", Flash_Data);

//check if the bitmap is present in the FLASH memory by checking for the 'B' and 'M' characters
//at the beginnig of the file location
if (Flash_Data != 0x424d)
{
   if (verbose) xil_printf("\r\nBitmap was not found in the FLASH memory, data found in the FLASH memory is 0x%X", Flash_Data);	

return 1;
}

//determine bitmap parameters
Bitmap_File_Size = Read_Bitmap_Header_Bytes(FLASH_BASEADDR+FLASH_START_ADDR, BITMAP_FILE_SIZE_OFFSET);
//Bitmap_File_Size = XIo_In32(XPAR_FLASH_MEM0_BASEADDR+FLASH_START_ADDR+BITMAP_FILE_SIZE_OFFSET);
if (verbose) xil_printf("\r\nFile Size is 0x%X", Bitmap_File_Size);

Bitmap_Data_Offset = Read_Bitmap_Header_Bytes(FLASH_BASEADDR+FLASH_START_ADDR, BITMAP_DATA_OFFSET);
if (verbose) xil_printf("\r\nBitmap Data Offset is 0x%X", Bitmap_Data_Offset);

Bitmap_Width_Pixels = Read_Bitmap_Header_Bytes(FLASH_BASEADDR+FLASH_START_ADDR, BITMAP_WIDTH_OFFSET);
if (verbose) xil_printf("\r\nBitmap Width in pixels is %d", Bitmap_Width_Pixels);

Bitmap_Height_Pixels = Read_Bitmap_Header_Bytes(FLASH_BASEADDR+FLASH_START_ADDR, BITMAP_HEIGHT_OFFSET);
if (verbose) xil_printf("\r\nBitmap Height in pixels is %d", Bitmap_Height_Pixels);

Bitmap_Bits_Per_Pixel = XIo_In16(FLASH_BASEADDR + FLASH_START_ADDR + BITMAP_BITS_PER_PIXEL_OFFSET);
Bitmap_Bits_Per_Pixel = Bitmap_Bits_Per_Pixel >> 8;
if (verbose) xil_printf("\r\nBitmap Bits per pixel is %d", Bitmap_Bits_Per_Pixel);

Bitmap_Image_Size = Read_Bitmap_Header_Bytes(FLASH_BASEADDR+FLASH_START_ADDR, BITMAP_IMAGE_SIZE_OFFSET);
if (verbose) xil_printf("\r\nBitmap image size is %d", Bitmap_Image_Size);

Bytes_Per_Row = Bitmap_Image_Size / Bitmap_Height_Pixels;
if (verbose) xil_printf("\r\nBytes per row = %d", Bytes_Per_Row);

MEM_HIGHADDR = (MEM_ROW_WIDTH * MEM_DISPLAYED_HEIGHT) * 4;

//start loading the image in reverse order, because the bitmap data is stored in reverse order
//therefore set the current address to the beginning of the highest line in the frame and
//increment at each pixel in the line, then decrement with a line at the end of each line
MEM_ADDR = MEM_HIGHADDR - (MEM_ROW_WIDTH * 4);

if (verbose) xil_printf("\r\nImage Memory High address = 0x%X, Current Address = 0x%X", MEM_HIGHADDR, MEM_ADDR);

LCDSetLine(2);

for (i = 0;  i<(Bitmap_Height_Pixels * Bytes_Per_Row); i = i + Bytes_Per_Row)
{
	//read three bytes from the FLASH memory that represent B, G and R data for a pixel
	for (j = 0; j <Bytes_Per_Row; j = j + 3)
	{
		Pixel_B = XIo_In8(FLASH_BASEADDR + FLASH_START_ADDR + Bitmap_Data_Offset + i + j);
		Pixel_G = XIo_In8(FLASH_BASEADDR + FLASH_START_ADDR + Bitmap_Data_Offset + i + (j+1));
	    Pixel_R = XIo_In8(FLASH_BASEADDR + FLASH_START_ADDR + Bitmap_Data_Offset + i + (j+2));

		Pixel_Data = ((0x00000000 | Pixel_R) << 16) | ((0x00000000 | Pixel_G) << 8) | (0x00000000 | Pixel_B);
		
		XIo_Out32(FRAME_ADDR + MEM_ADDR, Pixel_Data);
		//increment one pixel
		MEM_ADDR = MEM_ADDR + 4;
	}
	//if (verbose) xil_printf("\r\nCurrent MEM_ADDR value is 0x%X", MEM_ADDR);
	//decrement with one line
	MEM_ADDR = MEM_ADDR - ((MEM_DISPLAYED_ROW_WIDTH + MEM_ROW_WIDTH) * 4);	
	//if (verbose) xil_printf("\r\nMEM_ADDR value is 0x%X", MEM_ADDR);
	
	if (!(i&0xFFF))
	{
		LCDPrintChar('*');
		xil_printf(".");
	}

}

//set the base address of the TFT device to the beginning of the bitmap image
XTft_SetFrameBaseAddr(InstancePtr, FRAME_ADDR);
//XIo_Out32 (XPAR_XPS_TFT_0_SPLB_BASEADDR, XPAR_DDR2_SDRAM_MPMC_BASEADDR + MEM_START_ADDR);

if (verbose) xil_printf("\r\nMEM_ADDR value is 0x%X", MEM_ADDR);


return 0;

}