inline void xuart16550_init(void)
{
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(XLB_STDIO_BASEADDR, XLB_XILINX_UART16550_0_CLOCK_HZ,
XLB_STDIO_BAUDRATE);
XUartNs550_mSetLineControlReg(XLB_STDIO_BASEADDR, XUN_LCR_8_DATA_BITS);
}
int
init_platform()
{
#if __MICROBLAZE__ || __PPC__
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
#ifdef __arm__
if (Init_ScuTimer() != XST_SUCCESS) while(1);
SetupIntrSystem(&TimerInstance, TIMER_IRPT_INTR);
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
return 0;
}
int main(void)
{
int Status;
#ifdef XPAR_XUARTNS550_NUM_INSTANCES
XUartNs550_SetBaud(STDIN_BASEADDRESS, XPAR_XUARTNS550_CLOCK_HZ, 115200);
XUartNs550_mSetLineControlReg(STDIN_BASEADDRESS, XUN_LCR_8_DATA_BITS);
#endif
/*
* Call the Temac SGDMA interrupt example , specify the parameters generated
* in xparameters.h
*/
Status = TemacSgDmaIntrExample(&IntcInstance,
&TemacInstance,
&DmaInstance,
TEMAC_DEVICE_ID,
TEMAC_IRPT_INTR,
DMA_RX_IRPT_INTR, DMA_TX_IRPT_INTR);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Failure in Examples");
return XST_FAILURE;
}
TemacUtilErrorTrap("Success in Examples");
return XST_SUCCESS;
}
int
init_platform()
{
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
return 0;
}
int main (void) {
XCache_EnableICache(0x80000001);
XCache_EnableDCache(0x80000000);
/* Initialize RS232 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_mSetLineControlReg(XPAR_RS232_BASEADDR, XUN_LCR_8_DATA_BITS);
print("-- Entering main() --\r\n");
/*
* MemoryTest routine will not be run for the memory at
* 0x81000000 (FLASH_8Mx16)
* because it is a read-only memory
*/
/*
* MemoryTest routine will not be run for the memory at
* 0x00000000 (DDR_SDRAM_1)
* because it is being used to hold a part of this application program
*/
/*
* MemoryTest routine will not be run for the memory at
* 0xfffff000 (plb_bram_if_cntlr_1)
* because it is being used to hold a part of this application program
*/
print("-- Exiting main() --\r\n");
XCache_DisableDCache();
XCache_DisableICache();
return 0;
}
int main (void) {
XCache_EnableICache(0x80000001);
XCache_EnableDCache(0x80000001);
/* Initialize RS232 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_mSetLineControlReg(XPAR_RS232_BASEADDR, XUN_LCR_8_DATA_BITS);
print("-- Entering main() --\r\n");
/*
* MemoryTest routine will not be run for the memory at
* 0xffff0000 (xps_bram_if_cntlr_1)
* because it is being used to hold a part of this application program
*/
/*
* MemoryTest routine will not be run for the memory at
* 0x86000000 (FLASH_8Mx16)
* because it is a read-only memory
*/
/* Testing Memory (DDR2_SDRAM_16Mx32)*/
{
XStatus status;
print("Starting MemoryTest for DDR2_SDRAM_16Mx32:\r\n");
print(" Running 32-bit test...");
status = XUtil_MemoryTest32((Xuint32*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 1024, 0xAAAA5555, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
print(" Running 16-bit test...");
status = XUtil_MemoryTest16((Xuint16*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 2048, 0xAA55, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
print(" Running 8-bit test...");
status = XUtil_MemoryTest8((Xuint8*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 4096, 0xA5, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
}
print("-- Exiting main() --\r\n");
XCache_DisableDCache();
XCache_DisableICache();
return 0;
}
