static READ_HANDLER( z80_in_sh ) { unsigned char *ROM; int port = offset & 0xff; switch (port) { case 1: case 0x41: return YM2151ReadStatus(0); break; case 2: // M72 cmd latch case 0x42: // M97 cmd latch case 0x80: // M84 cmd latch update_irq_lines(RST18_CLEAR); return cmd_latch&0xff; break; case 0x84: // DAC memory read ROM = rom_getregion(RGN_SAMP1); if (!ROM) return 0; return ROM[sample_addr]; break; } // printf("Unknown read from port %x (PC=%x)\n", port, _z80_get_reg(Z80_REG_PC)); return 0; }
static unsigned int OD_Read(unsigned int address) { if (address == 0x201) { return YM2151ReadStatus(0); } if (address >= 0x400 && address <= 0x42f) { // if reading the command latch, lower IRQ if (address == 0x400) { cpu_set_irq_line(0, M6809_IRQ_LINE, CLEAR_LINE); } return K053260_0_r(address&0x3f); } if (address >= 0x600 && address <= 0x62f) { return K053260_1_r(address&0x3f); } if (address >= 0x800 && address <= 0xfff) { return workram[address-0x800]; } if (address >= 0x1000) { return prgrom[address]; } // printf("Unmapped read at %x\n", address); return 0; }
static unsigned int read_memory_8(unsigned int address) { /* Mirror of C00000 - C03FFFF */ if (address < 0x004000) return workram[address]; /* Read only? mirror of FE4000 - FE7FFFF */ else if ((address >= 0x4000) && (address < 0x8000)) return workram[0x10000 + (address & 0x3fff)]; else if (address == 0x400003) return YM2151ReadStatus(0); else if (address == 0x40005) return OKIM6295_status_0_r(0); else if ((address >= 0xc00000) && (address < 0xc08000)) return workram[address & 0x7fff]; else if ((address >= 0xfe0000) && (address < 0xffffff)) return workram[0x10000 + (address & 0x1ffff)]; printf("R8 @ %x\n", address); return 0xff; }
static unsigned int S1_Read(unsigned int address) { if (address <= 0x3fff) { // printf("read %x from bankrom at %x (%x)\n", prgrom[address + bankofs], address, address+bankofs); return prgrom[address + bankofs]; } if (address >= 0x4000 && address <= 0x4001) { return YM2151ReadStatus(0); } if (address >= 0x4100 && address <= 0x4fff) { return workram[address]; } if (address >= 0x5000 && address <= 0x50ff) { // printf("read at %x (PC=%x)\n", address, m6809_get_reg(REG_PC)); return namcos1_wavedata_r(address-0x5000); } if (address >= 0x5100 && address <= 0x513f) { return namcos1_sound_r(address-0x5100); } if (address >= 0x5140 && address <= 0x54ff) { return workram[address]; } if (address >= 0x6000 && address <= 0x6fff) { return workram[address]; } if (address >= 0x7000 && address <= 0x77ff) { return workram[address]; } if (address >= 0x8000 && address <= 0x9fff) { return workram[address]; } if (address >= 0xc000) { return prgrom[address]; } // printf("Unmapped read at %x\n", address); return 0; }
int YM2151_status_port_2_r(int offset) { switch(FMMode) { case CHIP_YM2151_DAC: return OPMReadStatus(2); case CHIP_YM2151_ALT: return YM2151ReadStatus(2); } return 0; }
// PSound Z80 memory read static unsigned char PsndZRead(unsigned short a) { unsigned char d=0; if (a==0xf008) { d=PsndCode; } else if (a==0xf00a) { d=PsndFade; } else if (a==0xf002) { d=nPsaStatus; // adpcm status } else if (a==0xf001) { return YM2151ReadStatus(0); } return d; }
UInt8 ym2151Read(YM2151* ym2151, UInt16 ioPort) { return (UInt8)YM2151ReadStatus(ym2151->opl); }