Example #1
0
static void SupermanFMIRQHandler(int, int nStatus)
{
	if (nStatus) {
		ZetSetIRQLine(0xFF, ZET_IRQSTATUS_ACK);
	} else {
		ZetSetIRQLine(0,    ZET_IRQSTATUS_NONE);
	}
}
Example #2
0
void toaplan1FMIRQHandler(int, int nStatus)
{
	if (nStatus) {
		ZetSetIRQLine(0xFF, ZET_IRQSTATUS_ACK);
	} else {
		ZetSetIRQLine(0,    ZET_IRQSTATUS_NONE);
	}
}
Example #3
0
inline static void DrvIRQHandler(INT32, INT32 nStatus)
{
	if (nStatus & 1) {
		ZetSetIRQLine(0,    ZET_IRQSTATUS_ACK);
	} else {
		ZetSetIRQLine(0,    ZET_IRQSTATUS_NONE);
	}
}
Example #4
0
File: ps.cpp Project: SiN13/pifba
static void drvYM2151IRQHandler(int nStatus)
{
	if (nStatus) {
		ZetSetIRQLine(0xFF, ZET_IRQSTATUS_ACK);
		ZetRun(0x0800);
	} else {
		ZetSetIRQLine(0,    ZET_IRQSTATUS_NONE);
	}
}
Example #5
0
static int qsndTimerOver(int, int)
{
//	bprintf(PRINT_NORMAL, _T("  - IRQ -> 1.\n"));
	ZetSetIRQLine(0xFF, ZET_IRQSTATUS_AUTO);

	return 0;
}
Example #6
0
void scontra_main_write(unsigned short address, unsigned char data)
{
	switch (address)
	{
		case 0x1f80:
			if (thunderx) {
				thunderx_videobank(data);
			} else {
				scontra_bankswitch(data);
			}
		return;

		case 0x1f84:
			*soundlatch = data;
		return;

		case 0x1f88:
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		return;

		case 0x1f8c:
			// watchdog
		return;

		case 0x1f98:
			thunderx_1f98_w(data);
		return;
	}

	if (address < 0x4000) {
		K052109_051960_w(address & 0x3fff, data);
		return;
	}
}
void scotrsht_main_write(unsigned short address, unsigned char data)
{
	switch (address)
	{
		case 0x2043:
			*charbank = data & 1;
		return;

		case 0x2044:
			*irq_enable = data & 2;
			*flipscreen = data & 8;
		return;

		case 0x3000:
			*palbank = (data & 0x70) >> 4;
		return;

		case 0x3100:
			*soundlatch = data;
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		return;

		case 0x3300:
			// watchdog
		return;
	}

	if ((address & 0xffe0) == 0x2000) {
		scroll[address & 0x1f] = data;
		return;
	}
}
Example #8
0
void gbusters_main_write(unsigned short address, unsigned char data)
{
	switch (address)
	{
		case 0x1f80:
			set_ram_bank(data);
		return;

		case 0x1f84:
			*soundlatch = data;
		return;

		case 0x1f88:
			ZetSetVector(0xff);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);

		return;

		case 0x1f8c:
			// watchdog
		return;

		case 0x1f98:
			K052109RMRDLine = data & 0x01;
		return;
	}

	if ((address & 0xc000) == 0x0000) {
		K052109_051960_w(address & 0x3fff, data);
		return;
	}
}
Example #9
0
void __fastcall speedspn_main_write_port(UINT16 port, UINT8 data)
{
	switch (port & 0xff)
	{
		case 0x01:
		case 0x10: // ?
		return;

		case 0x07:
			*display_enable = ~data & 1;
		return;

		case 0x12:
			bankswitch(data);
		return;

		case 0x13:
			*soundlatch = data;
			ZetClose();
			ZetOpen(1);
			ZetSetIRQLine(0, CPU_IRQSTATUS_ACK);
			ZetClose();
			ZetOpen(0);
		return;

		case 0x17:
			vidram_bankswitch(data);
		return;
	}
}
Example #10
0
unsigned char __fastcall scotrsht_sound_read(unsigned short address)
{
	if (address == 0x8000) {
		ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
		return *soundlatch;
	}

	return 0;
}
Example #11
0
static void __fastcall gradius3_main_write_byte(UINT32 address, UINT8 data)
{
	if ((address & 0xfe0000) == 0x180000) {
		DrvShareRAM2[(address & 0x1ffff)^1] = data;
		expand_graphics_single(address);
		return;
	}

	switch (address)
	{
		case 0x0c0000:
		case 0x0c0001:
		{
			// if enabling CPU B, burn off some cycles to keep things sync'd.
			if (gradius3_cpub_enable & 8 && ~data & 8) {
				INT32 cycles_to_burn = SekTotalCycles();
				SekClose();
				SekOpen(1);
				SekIdle(cycles_to_burn - SekTotalCycles());
				SekClose();
				SekOpen(0);
			}					

			gradius3_priority    =(data & 0x04)>>2;
			gradius3_cpub_enable = data & 0x08;
			irqA_enable          = data & 0x20;
		}
		return;

		case 0x0d8000:
		case 0x0d8001:
			interrupt_triggered = irqB_mask & 0x04;
		return;

		case 0x0e0000:
		case 0x0e0001:
			// watchdog
		return;

		case 0x0e8000:
			*soundlatch = data;
		return;

		case 0x0f0000:
			ZetSetVector(0xff);
			ZetSetIRQLine(0, CPU_IRQSTATUS_ACK);

		return;
	}

	if (address >= 0x14c000 && address <= 0x153fff) {
		address -= 0x14c000;
		K052109Write(address / 2, data);
		return;
	}
}
Example #12
0
void hcastle_write(UINT16 address, UINT8 data)
{
	if ((address & 0xfff8) == 0x0000) {
		playfield_write(address, data, DrvPf1Ctrl, DrvSprRAM1, DrvSprBuf1);
		return;
	}

	if ((address & 0xfff8) == 0x0200) {
		playfield_write(address, data, DrvPf2Ctrl, DrvSprRAM2, DrvSprBuf2);
		return;
	}

	if ((address & 0xff00) == 0x0000) {
		DrvKonRAM0[address & 0xff] = data;
		return;
	}

	if ((address & 0xff00) == 0x0200) {
		DrvKonRAM1[address & 0xff] = data;
		return;
	}

	switch (address)
	{
		case 0x0400:
			bankswitch(data);
		return;

		case 0x0404:
			*soundlatch = data;
		return;

		case 0x0408:
		{
			float t = konamiTotalCycles() * 1.19318167;
			t -= ZetTotalCycles();
			if (t > 1) ZetRun((INT32)t);

			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		}
		return;

		case 0x040c:
			watchdog = 0;
		return;

		case 0x0410:

		return;

		case 0x0418:
			*gfxbank = data;
		return;
	}
}
Example #13
0
void bottom9_main_write(unsigned short address, unsigned char data)
{
    switch (address)
    {
    case 0x1f80:
        bankswitch(data);
        return;

    case 0x1f90:
    {
        K052109RMRDLine      =  data & 0x04;
        bottom9_video_enable = ~data & 0x08;
        zoomreadroms         =  data & 0x10;
        K052109_selected     =  data & 0x20;
    }
    return;

    case 0x1fa0:
        // watchdog
        return;

    case 0x1fb0:
        *soundlatch = data;
        return;

    case 0x1fc0:
        ZetSetVector(0xff);
        ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
        return;
    }

    if ((address & 0xfff0) == 0x1ff0) {
        K051316WriteCtrl(0, address & 0x0f, data);
        return;
    }

    if (K052109_selected == 0) {
        if ((address & 0xf800) == 0x0000) {
            K051316Write(0, address & 0x7ff, data);
            return;
        }

        if ((address & 0xf800) == 0x2000) {
            DrvPalRAM[address & 0x7ff] = data;
            return;
        }
    }

    if ((address & 0xc000) == 0x0000) {
        K052109_051960_w(address & 0x3fff, data);
        return;
    }
}
Example #14
0
void parodius_main_write(UINT16 address, UINT8 data)
{
	switch (address)
	{
		case 0x3fc0:
			K052109RMRDLine = data & 0x08;
		return;

		case 0x3fc4:
			nDrvRomBank[1] = data;
		return;

		case 0x3fc8:
			ZetSetVector(0xff);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		return;

		case 0x3fcc:
		case 0x3fcd:
			K053260Write(0, address & 1, data);
		return;
	}

	if ((address & 0xf800) == 0x0000) {
		if (nDrvRomBank[1] & 1) {
			DrvPalRAM[((nDrvRomBank[1] & 0x04) << 9) + address] = data;
		} else {
			DrvBankRAM[address] = data;
		}
		return;
	}

	if ((address & 0xfff0) == 0x3fa0) {
		K053244Write(0, address & 0x0f, data);
		return;
	}

	if ((address & 0xfff0) == 0x3fb0) {
		K053251Write(address & 0x0f, data);
		return;
	}

	if ((address & 0xf800) == 0x2000) {
		if (nDrvRomBank[1] & 0x02) {
			K053245Write(0, address & 0x7ff, data);
			return;
		}
	}

	if (address >= 0x2000 && address <= 0x5fff) {
		K052109Write(address - 0x2000, data);
	}
}
Example #15
0
void __fastcall Wc90b1Write1(UINT16 a, UINT8 d)
{
	switch (a) {
		case 0xfc00: {
			INT32 BankAddress;

			BankAddress = 0x10000 + ((d & 0xf8) << 8);
			ZetMapArea(0xf000, 0xf7ff, 0, Wc90b1Z80Rom1 + BankAddress);
			ZetMapArea(0xf000, 0xf7ff, 2, Wc90b1Z80Rom1 + BankAddress);
			return;
		}
		
		case 0xfd00: {
			Wc90b1SoundLatch = d;
			ZetClose();
			ZetOpen(2);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
			ZetClose();
			ZetOpen(0);
			return;
		}
		
		case 0xfd04: {
			Wc90b1Scroll0Y = d;
			return;
		}
		
		case 0xfd06: {
			Wc90b1Scroll0X = d;
			return;
		}
		
		case 0xfd08: {
			Wc90b1Scroll1Y = d;
			return;
		}
		
		case 0xfd0a: {
			Wc90b1Scroll1X = d;
			return;
		}
		
		case 0xfd0e: {
			Wc90b1ScrollXLo = d;
			return;
		}
		
		default: {
			bprintf(PRINT_NORMAL, _T("Z80 #1 Write => %04X, %02X\n"), a, d);
		}
	}
}
Example #16
0
unsigned char __fastcall speedspn_sound_read(unsigned short address)
{
	switch (address)
	{
		case 0x9800:
			return MSM6295ReadStatus(0);

		case 0xa000:
			ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
			return *soundlatch;
	}

	return 0;
}
Example #17
0
/*
static ADDRESS_MAP_START( tmnt_writemem, ADDRESS_SPACE_PROGRAM, 16 )

	AM_RANGE(0x0a0000, 0x0a0001) AM_WRITE(tmnt_0a0000_w)
	AM_RANGE(0x0a0008, 0x0a0009) AM_WRITE(tmnt_sound_command_w)
	AM_RANGE(0x0a0010, 0x0a0011) AM_WRITE(watchdog_reset16_w)
//  AM_RANGE(0x10e800, 0x10e801) AM_WRITE(MWA16_NOP) ???
	AM_RANGE(0x140000, 0x140007) AM_WRITE(K051937_word_w)
ADDRESS_MAP_END
*/
void __fastcall TmntWriteByte(unsigned int a,unsigned char d)
{
	unsigned int ab;
	static int last;
	ab=(a>>16)&0xff;
	if (ab==0x08)
	{
		TmntPalWrite(a,d);
		return;
	} // Palette write

	switch (a)
	{
	case 0xa0001:
		{

		/* bit 3 high then low triggers irq on sound CPU */
		if (last == 0x08 && (d & 0x08) == 0)
		{
			ZetSetIRQLine(0xff, ZET_IRQSTATUS_AUTO);
			//cpunum_set_input_line_and_vector(1,0,HOLD_LINE,0xff);
		}

		last = d & 0x08;

		if (d&0x20) 
		{
			bInt5=1;
		}
		else 
		{
			bInt5=0;
		}
		return;
		}
	case 0x0a0011:  // watchdog reset
		return;
	case 0x0a0009: // sound code
		tmnt_soundlatch = d&0xFF;
		return;




	default:
		bprintf(PRINT_NORMAL, _T("TmntWriteByte: value %x to location %x\n"), d, a);
		break;

	}
}
Example #18
0
void Sf2mdtSoundCommand(UINT16 d)
{
	INT32 nCyclesToDo = ((INT64)SekTotalCycles() * nCpsZ80Cycles / nCpsCycles) - ZetTotalCycles();
	INT32 nEnd = Sf2mdtSoundPos + (INT64)Sf2mdtMSM5205Interleave * nCyclesToDo / nCpsZ80Cycles;
	
	for (INT32 i = Sf2mdtSoundPos; i < nEnd; i++) {
		ZetRun(Sf2mdtCyclesPerSegment);
		MSM5205Update();
		Sf2mdtSoundPos = i;
	}
	
	Sf2mdtSoundLatch = d & 0xff;
	ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
}
Example #19
0
UINT8 __fastcall speedspn_sound_read(UINT16 address)
{
	switch (address)
	{
		case 0x9800:
			return MSM6295ReadStatus(0); 

		case 0xa000:
			ZetSetIRQLine(0, CPU_IRQSTATUS_NONE);
			return *soundlatch;
	}

	return 0;
}
Example #20
0
void __fastcall gradius3_main_write_byte(unsigned int address, unsigned char data)
{
	switch (address)
	{
		case 0x0c0000:
		case 0x0c0001:
		{
			// if enabling CPU B, burn off some cycles to keep things sync'd.
			if (gradius3_cpub_enable & 8 && ~data & 8) {
				int cycles_to_burn = SekTotalCycles();
				SekClose();
				SekOpen(1);
				SekIdle(cycles_to_burn - SekTotalCycles());
				SekClose();
				SekOpen(0);
			}					

			gradius3_priority    = data & 0x04;
			gradius3_cpub_enable = data & 0x08;
			irqA_enable          = data & 0x20;
		}
		return;

		case 0x0d8000:
		case 0x0d8001:
			interrupt_triggered = irqB_mask & 0x04;
		return;

		case 0x0e0000:
		case 0x0e0001:
			// watchdog
		return;

		case 0x0e8000:
			*soundlatch = data;
		return;

		case 0x0f0000:
			ZetSetVector(0xff);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);

		return;
	}

	if (address >= 0x14c000 && address <= 0x153fff) {
		address -= 0x14c000;
		K052109Write(address / 2, data);
		return;
	}
}
Example #21
0
void crimfght_main_write(UINT16 address, UINT8 data)
{
	switch (address)
	{
		case 0x3f8c:
			*soundlatch = data;
			ZetSetVector(0xff);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		break;
	}

	if (address >= 0x2000 && address <= 0x5fff) {
		K052109_051960_w(address - 0x2000, data);
		return;
	}
}
Example #22
0
void rollerg_main_write(unsigned short address, unsigned char data)
{
	switch (address)
	{
		case 0x0010:
			readzoomroms = data & 0x04;
			K051316WrapEnable(0, data & 0x20);
		return;

		case 0x0020:
			// watchdog
		return;

		case 0x0030:
		case 0x0031:
			K053260Write(0, address & 1, data);
		return;

		case 0x0040:
			ZetSetVector(0xff);
		//	ZetRaiseIrq(0);
			ZetSetIRQLine(0, ZET_IRQSTATUS_ACK);
		return;
	}

	if ((address & 0xfff0) == 0x0200) {
		K051316WriteCtrl(0, address & 0x0f, data);
		return;
	}

	if ((address & 0xfff0) == 0x0300) {
		K053244Write(0, address & 0x0f, data);
		return;
	}

	if ((address & 0xf800) == 0x0800) {
		K051316Write(0, address & 0x7ff, data);
		return;
	}

	if ((address & 0xf800) == 0x1000) {
		K053245Write(0, address & 0x7ff, data);
		return;
	}
}
Example #23
0
UINT8 __fastcall parodius_sound_read(UINT16 address)
{
	switch (address)
	{
		case 0xf800:
			return 0xff;
		case 0xf801:
			return BurnYM2151ReadStatus();
	}

	if (address >= 0xfc00 && address <= 0xfc2f) {
		if ((address & 0x3e) == 0x00) ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);

		return K053260Read(0, address & 0x3f);
	}

	return 0;
}
Example #24
0
unsigned char __fastcall scontra_sound_read(unsigned short address)
{
	if ((address & 0xfff0) == 0xb000) {
		return K007232ReadReg(0, address & 0x0f);
	}

	switch (address)
	{
		case 0xa000:
			ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
			return *soundlatch;

		case 0xc001:
			return BurnYM2151ReadStatus();
	}

	return 0;
}
Example #25
0
unsigned char __fastcall rollerg_sound_read(unsigned short address)
{
	switch (address)
	{
		case 0xc000:
		case 0xc001:
			return BurnYM3812Read(address & 1);
	}

	if (address >= 0xa000 && address <= 0xa02f) {
		// not sure...
		if ((address & 0x3e) == 0x00) ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);

		return K053260Read(0, address & 0x3f);
	}

	return 0;
}
Example #26
0
void rollerg_main_write(UINT16 address, UINT8 data)
{
	switch (address)
	{
		case 0x0010:
			readzoomroms = data & 0x04;
			K051316WrapEnable(0, data & 0x20);
		return;

		case 0x0020:
			// watchdog
		return;

		case 0x0030:
		case 0x0031:
			K053260Write(0, address & 1, data);
		return;

		case 0x0040:
			ZetSetVector(0xff);
			ZetSetIRQLine(0, CPU_IRQSTATUS_ACK);
		return;
	}

	if ((address & 0xfff0) == 0x0200) {
		K051316WriteCtrl(0, address & 0x0f, data);
		return;
	}

	if ((address & 0xfff0) == 0x0300) {
		K053244Write(0, address & 0x0f, data);
		return;
	}

	if ((address & 0xf800) == 0x0800) {
		K051316Write(0, address & 0x7ff, data);
		return;
	}

	if ((address & 0xf800) == 0x1000) {
		K053245Write(0, address & 0x7ff, data);
		return;
	}
}
Example #27
0
UINT8 __fastcall Wc90b1Read3(UINT16 a)
{
	switch (a) {
		case 0xe800: {
			return BurnYM2203Read(0, 0);
		}
		
		case 0xf800: {
			ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
			return Wc90b1SoundLatch;
		}
		
		default: {
			bprintf(PRINT_NORMAL, _T("Z80 #3 Read => %04X\n"), a);
		}
	}

	return 0;
}
Example #28
0
static INT32 DrvFrame()
{
	if (DrvReset) {
		DrvDoReset();
	}

	{
		memset (DrvInputs, 0xff, 3);
		for (INT32 i = 0; i < 8; i++) {
			DrvInputs[0] ^= DrvJoy1[i] << i;
			DrvInputs[1] ^= DrvJoy2[i] << i;
			DrvInputs[2] ^= DrvJoy3[i] << i;
		}
	}

	INT32 nInterleave = 10;
	INT32 nCyclesTotal[2] = { 6000000 / 60, 6000000 / 60 };
	INT32 nCyclesDone[2] = { 0, 0 };

	for (INT32 i = 0; i < nInterleave; i++) {
		INT32 nSegment;

		ZetOpen(0);
		nSegment = nCyclesTotal[0] / nInterleave;
		nCyclesDone[0] += ZetRun(nSegment);
		if (i == (nInterleave - 1)) ZetSetIRQLine(0, CPU_IRQSTATUS_AUTO);
		ZetClose();

		ZetOpen(1);
		nCyclesDone[1] += ZetRun(nSegment);
		ZetClose();
	}

	if (pBurnSoundOut) {
		MSM6295Render(0,pBurnSoundOut, nBurnSoundLen);
	}

	if (pBurnDraw) {
		DrvDraw();
	}

	return 0;
}
Example #29
0
UINT8 __fastcall hcastle_sound_read(UINT16 address)
{
	if (address >= 0xb000 && address <= 0xb00d) {
		return K007232ReadReg(0, address & 0x0f);
	}

	switch (address)
	{
		case 0xa000:
		case 0xa001:
			return BurnYM3812Read(address & 1);

		case 0xd000:
			ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
			return *soundlatch;
	}

	return 0;
}
Example #30
0
UINT8 __fastcall aliens_sound_read(UINT16 address)
{
	if ((address & 0xfff0) == 0xe000) {
		return K007232ReadReg(0, address & 0x0f);
	}

	switch (address)
	{
		case 0xa000:
		case 0xa001:
			return BurnYM2151ReadStatus();

		case 0xc000:
			ZetSetIRQLine(0, ZET_IRQSTATUS_NONE);
			return *soundlatch;
	}

	return 0;
}